summaryrefslogtreecommitdiff
path: root/usrp2/fpga/opencores/spi/bench/verilog
ModeNameSize
d---------CVS141logplain
-rw-r--r--spi_slave_model.v3637logplain
-rw-r--r--tb_spi_top.v12701logplain
-rw-r--r--wb_master_model.v5722logplain