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path: root/usrp/fpga/megacells/addsub16_inst.v
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addsub16	addsub16_inst (
	.add_sub ( add_sub_sig ),
	.dataa ( dataa_sig ),
	.datab ( datab_sig ),
	.clock ( clock_sig ),
	.aclr ( aclr_sig ),
	.clken ( clken_sig ),
	.result ( result_sig )
	);