path: root/usrp-hw/usrp/clock.sch

v 20050820 1
C 46800 59800 1 0 0 vctcxo.sym
{
T 48400 61200 5 10 1 1 0 6 1
refdes=X2
}
C 46100 61300 1 0 0 generic-power.sym
{
T 46300 61550 5 10 1 1 0 3 1
net=DVDD_CLK:1
}
C 46200 59300 1 0 0 gnd-1.sym
C 46100 61000 1 270 0 capacitor-1.sym
{
T 45800 60200 5 10 1 1 0 0 1
refdes=C803
T 45800 60000 5 10 1 1 0 0 1
value=0.1uF
T 46100 61000 5 10 0 1 0 0 1
footprint=0603
}
N 46300 60100 46300 59600 4
N 46300 61000 46300 61300 4
N 46300 61200 46700 61200 4
N 46700 61200 46700 60700 4
N 46700 60700 46900 60700 4
N 46300 59800 46700 59800 4
N 46700 59800 46700 60300 4
N 46700 60300 46900 60300 4
C 45300 61000 1 270 0 capacitor-1.sym
{
T 45000 60200 5 10 1 1 0 0 1
refdes=C805
T 44900 60000 5 10 1 1 0 0 1
value=220pF
T 45300 61000 5 10 0 1 0 0 1
footprint=0603
}
N 46300 61200 45500 61200 4
N 45500 61200 45500 61000 4
N 45500 60100 45500 59800 4
N 45500 59800 46300 59800 4
C 50200 59900 1 270 0 generic-power.sym
{
T 50450 59700 5 10 1 1 270 3 1
net=DVDD:1
}
N 50000 59700 50200 59700 4
C 56800 53200 1 0 1 resistor-1.sym
{
T 56600 53500 5 10 1 1 180 2 1
refdes=R1011
T 56800 53200 5 10 0 1 180 2 1
footprint=0603
T 56200 53000 5 10 1 1 0 0 1
value=50
}
C 56800 52400 1 0 1 resistor-1.sym
{
T 56600 52700 5 10 1 1 180 2 1
refdes=R1012
T 56800 52400 5 10 0 1 180 2 1
footprint=0603
T 56200 52200 5 10 1 1 0 0 1
value=50
}
C 56800 51600 1 0 1 resistor-1.sym
{
T 56600 51900 5 10 1 1 180 2 1
refdes=R1013
T 56800 51600 5 10 0 1 180 2 1
footprint=0603
T 56200 51400 5 10 1 1 0 0 1
value=50
}
N 55200 53300 55200 51700 4
N 55900 52500 55200 52500 4
C 57100 50300 1 270 0 capacitor-1.sym
{
T 57400 49500 5 10 1 1 0 0 1
refdes=C1014
T 57400 49300 5 10 1 1 0 0 1
value=220pF
T 57100 50300 5 10 0 1 0 0 1
footprint=0603
}
C 57400 48900 1 0 1 gnd-1.sym
C 57200 50500 1 270 1 resistor-1.sym
{
T 58000 51100 5 10 1 1 180 2 1
refdes=R1014
T 57200 50500 5 10 0 1 90 2 1
footprint=0603
T 57500 50900 5 10 1 1 0 0 1
value=50
}
N 57300 49200 57300 49400 4
N 57300 50300 57300 50500 4
C 58000 50300 1 270 0 capacitor-1.sym
{
T 58300 49500 5 10 1 1 0 0 1
refdes=C1015
T 58300 49300 5 10 1 1 0 0 1
value=220pF
T 58000 50300 5 10 0 1 0 0 1
footprint=0603
}
C 58300 48900 1 0 1 gnd-1.sym
C 58100 50500 1 270 1 resistor-1.sym
{
T 58900 51100 5 10 1 1 180 2 1
refdes=R1015
T 58100 50500 5 10 0 1 90 2 1
footprint=0603
T 58400 50900 5 10 1 1 0 0 1
value=50
}
N 58200 49200 58200 49400 4
N 58200 50300 58200 50500 4
C 58900 50300 1 270 0 capacitor-1.sym
{
T 59200 49500 5 10 1 1 0 0 1
refdes=C1016
T 59200 49300 5 10 1 1 0 0 1
value=220pF
T 58900 50300 5 10 0 1 0 0 1
footprint=0603
}
C 59200 48900 1 0 1 gnd-1.sym
C 59000 50500 1 270 1 resistor-1.sym
{
T 59800 51100 5 10 1 1 180 2 1
refdes=R1016
T 59000 50500 5 10 0 1 90 2 1
footprint=0603
T 59300 50900 5 10 1 1 0 0 1
value=50
}
N 59100 49200 59100 49400 4
N 59100 50300 59100 50500 4
N 56800 51700 57300 51700 4
{
T 57000 51700 5 10 1 1 0 0 1
netname=CLK_CODEC_B
}
N 57300 51400 57300 51700 4
N 58200 51400 58200 52500 4
N 58200 52500 56800 52500 4
{
T 56900 52500 5 10 1 1 0 0 1
netname=CLK_CODEC_A
}
N 56800 53300 59100 53300 4
{
T 56900 53300 5 10 1 1 0 0 1
netname=CLK_FPGA
}
N 59100 53300 59100 51400 4
C 51600 59800 1 0 0 SMA-5.sym
{
T 51100 60000 5 10 1 1 0 0 1
refdes=J2001
T 51600 59800 5 10 0 1 0 6 1
footprint=SMA_VERT
}
N 52100 60300 52500 60300 4
C 51800 59300 1 0 1 gnd-1.sym
N 51700 59600 51700 59800 4
N 48900 60700 49500 60700 4
C 50000 59600 1 0 1 resistor-1.sym
{
T 49600 59900 5 10 1 1 180 2 1
refdes=R2029
T 50000 59600 5 10 0 1 180 2 1
footprint=0603
T 49800 59900 5 10 1 1 0 0 1
value=0
}
C 48600 59600 1 0 1 resistor-1.sym
{
T 47900 59400 5 10 1 1 180 2 1
refdes=R2030
T 48600 59600 5 10 0 1 180 2 1
footprint=0603
T 48000 59400 5 10 1 1 0 0 1
value=NONE
}
C 47200 59600 1 270 1 gnd-1.sym
N 47500 59700 47700 59700 4
N 48600 59700 49100 59700 4
N 48900 60300 49000 60300 4
N 49000 60300 49000 59700 4
C 43900 56000 1 270 0 capacitor-2.sym
{
T 43600 55200 5 10 1 1 0 0 1
refdes=C910
T 43600 55000 5 10 1 1 0 0 1
value=4.7uF
T 43900 56000 5 10 0 1 0 0 1
footprint=1206
}
C 44500 54500 1 0 0 adp3336.sym
{
T 46200 56700 5 10 1 1 0 6 1
refdes=U701
}
N 46600 55400 46800 55400 4
N 46800 55400 46800 56200 4
N 46800 55800 46600 55800 4
C 46800 56700 1 0 0 generic-power.sym
{
T 47000 56950 5 10 1 1 0 3 1
net=DVDD_CLK:1
}
N 46600 56200 47000 56200 4
C 43300 56000 1 270 0 capacitor-1.sym
{
T 43000 55200 5 10 1 1 0 0 1
refdes=C911
T 43000 55000 5 10 1 1 0 0 1
value=0.1uF
T 43300 56000 5 10 0 1 0 0 1
footprint=0603
}
N 44100 54800 44100 55100 4
N 44100 56000 44100 56300 4
N 43500 54800 43500 55100 4
N 43500 56000 43500 56300 4
N 43500 56300 44400 56300 4
N 44400 55800 44600 55800 4
N 44400 56200 44600 56200 4
N 43500 54800 44400 54800 4
N 44400 54800 44400 55000 4
N 44400 55000 44600 55000 4
C 46900 56000 1 270 0 resistor-1.sym
{
T 47200 55600 5 10 1 1 180 8 1
refdes=R901
T 46900 56000 5 10 0 1 90 8 1
footprint=0603
T 47200 55400 5 10 1 1 0 0 1
value=140K
}
C 46900 54900 1 270 0 resistor-1.sym
{
T 47200 54500 5 10 1 1 180 8 1
refdes=R902
T 46900 54900 5 10 0 1 90 8 1
footprint=0603
T 47200 54300 5 10 1 1 0 0 1
value=78.7K
}
N 47000 53900 47000 54000 4
N 46600 55000 47000 55000 4
N 47000 54900 47000 55100 4
N 47000 56000 47000 56700 4
C 47900 56100 1 90 1 capacitor-1.sym
{
T 47800 55800 5 10 1 1 0 0 1
refdes=C912
T 47800 55400 5 10 1 1 0 0 1
value=470pF
T 47900 56100 5 10 0 1 0 6 1
footprint=0603
}
N 47000 55000 47700 55000 4
N 47700 55000 47700 55200 4
N 47700 56200 47700 56100 4
C 44100 56500 1 0 1 generic-power.sym
{
T 43900 56750 5 10 1 1 180 5 1
net=5V:1
}
C 43800 54200 1 0 0 gnd-1.sym
N 44400 55400 44400 56300 4
N 44400 55400 44600 55400 4
N 43900 54500 43900 54800 4
N 43900 56300 43900 56500 4
C 46900 53600 1 0 0 gnd-1.sym
C 48600 56100 1 90 1 capacitor-2.sym
{
T 48900 55300 5 10 1 1 0 6 1
refdes=C913
T 48900 55100 5 10 1 1 0 6 1
value=4.7uF
T 48600 56100 5 10 0 1 0 6 1
footprint=1206
}
N 47000 56200 48400 56200 4
N 48400 56200 48400 56100 4
N 48400 55200 48400 54700 4
C 48300 54400 1 0 0 gnd-1.sym
C 64700 48600 1 0 1 ad986X-CLK.sym
{
T 63300 51100 5 10 1 1 0 0 1
refdes=U601
}
C 63800 57500 1 0 0 ep1c12-pq240-CLKA.sym
{
T 65200 59100 5 10 1 1 0 6 1
refdes=U101
}
C 63800 60900 1 180 1 ep1c12-pq240-CLKB.sym
{
T 65200 61000 5 10 1 1 180 0 1
refdes=U101
}
C 64700 52600 1 0 1 ad986X-CLK.sym
{
T 63300 55100 5 10 1 1 0 0 1
refdes=U602
}
N 62600 58400 63900 58400 4
{
T 63000 58400 5 10 1 1 0 0 1
netname=IFCLK
}
N 62600 60000 63900 60000 4
{
T 63800 60000 5 10 1 1 0 6 1
netname=SEN_FPGA
}
N 65600 50300 64600 50300 4
{
T 64700 50400 5 10 1 1 180 6 1
netname=CLK_CODEC_A
}
N 64600 54300 65600 54300 4
{
T 66100 54300 5 10 1 1 0 6 1
netname=CLK_CODEC_B
}
N 62600 60400 63900 60400 4
{
T 63800 60400 5 10 1 1 0 6 1
netname=CLK_FPGA
}
C 66100 52500 1 270 1 resistor-1.sym
{
T 66400 53000 5 10 1 1 0 2 1
refdes=R858
T 66100 52500 5 10 0 1 90 2 1
footprint=0603
T 66400 52700 5 10 1 1 0 0 1
value=NONE
}
C 66300 52100 1 0 1 gnd-1.sym
C 66400 54600 1 0 1 generic-power.sym
{
T 66200 54850 5 10 1 1 0 3 1
net=DVDD:1
}
C 66100 53600 1 270 1 resistor-1.sym
{
T 66400 54200 5 10 1 1 0 2 1
refdes=R859
T 66100 53600 5 10 0 1 90 2 1
footprint=0603
T 66400 53900 5 10 1 1 0 0 1
value=0
}
N 66200 52400 66200 52500 4
N 66200 53400 66200 53600 4
N 64600 53500 66200 53500 4
N 66200 54500 66200 54600 4
C 66300 48500 1 90 0 resistor-1.sym
{
T 66400 48900 5 10 1 1 0 0 1
refdes=R860
T 66300 48500 5 10 0 1 90 0 1
footprint=0603
T 66400 48700 5 10 1 1 0 0 1
value=NONE
}
C 66100 48100 1 0 0 gnd-1.sym
C 66000 50600 1 0 0 generic-power.sym
{
T 66200 50850 5 10 1 1 0 3 1
net=DVDD:1
}
C 66300 49600 1 90 0 resistor-1.sym
{
T 66400 50000 5 10 1 1 0 0 1
refdes=R861
T 66300 49600 5 10 0 1 90 0 1
footprint=0603
T 66400 49800 5 10 1 1 0 0 1
value=0
}
N 66200 48400 66200 48500 4
N 66200 49400 66200 49600 4
N 66200 50500 66200 50600 4
N 64600 49500 66200 49500 4
N 62600 58000 63900 58000 4
{
T 63000 58000 5 10 1 1 0 0 1
netname=SCLK
}
C 55000 57900 1 0 0 ad9513-CLK.sym
{
T 56200 61400 5 10 1 1 0 6 1
refdes=U702
}
C 39700 43200 1 0 0 ad9513-CTRL.sym
{
T 40800 48400 5 10 1 1 0 6 1
refdes=U702
}
C 56800 46600 1 270 0 ad9513-PWR.sym
{
T 57500 46300 5 10 1 1 0 6 1
refdes=U702
}
C 62600 46100 1 270 0 capacitor-1.sym
{
T 62300 45300 5 10 1 1 0 0 1
refdes=C914
T 62300 45100 5 10 1 1 0 0 1
value=0.1uF
T 62600 46100 5 10 0 1 0 0 1
footprint=0603
}
C 61900 46100 1 270 0 capacitor-2.sym
{
T 61600 45300 5 10 1 1 0 0 1
refdes=C915
T 61600 45100 5 10 1 1 0 0 1
value=4.7uF
T 61900 46100 5 10 0 1 0 0 1
footprint=1206
}
N 57600 46500 57600 46700 4
N 57600 46700 67600 46700 4
N 62800 46700 62800 46100 4
N 60400 44300 67600 44300 4
N 62800 44300 62800 45200 4
N 62100 44300 62100 45200 4
N 62100 46700 62100 46100 4
N 58000 46500 58000 46700 4
N 58400 46500 58400 46700 4
N 58800 46500 58800 46700 4
N 59200 46500 59200 46700 4
N 59600 46500 59600 46700 4
N 60000 46500 60000 46700 4
N 60400 46500 60400 46700 4
N 60800 46500 60800 46700 4
C 63200 46100 1 270 0 capacitor-1.sym
{
T 62900 45300 5 10 1 1 0 0 1
refdes=C916
T 62900 45100 5 10 1 1 0 0 1
value=0.1uF
T 63200 46100 5 10 0 1 0 0 1
footprint=0603
}
N 63400 46700 63400 46100 4
N 63400 44300 63400 45200 4
C 63800 46100 1 270 0 capacitor-1.sym
{
T 63500 45300 5 10 1 1 0 0 1
refdes=C917
T 63500 45100 5 10 1 1 0 0 1
value=0.1uF
T 63800 46100 5 10 0 1 0 0 1
footprint=0603
}
N 64000 46700 64000 46100 4
N 64000 44300 64000 45200 4
C 64400 46100 1 270 0 capacitor-1.sym
{
T 64100 45300 5 10 1 1 0 0 1
refdes=C918
T 64100 45100 5 10 1 1 0 0 1
value=0.1uF
T 64400 46100 5 10 0 1 0 0 1
footprint=0603
}
N 64600 46700 64600 46100 4
N 64600 44300 64600 45200 4
C 65000 46100 1 270 0 capacitor-1.sym
{
T 64700 45300 5 10 1 1 0 0 1
refdes=C919
T 64700 45100 5 10 1 1 0 0 1
value=0.1uF
T 65000 46100 5 10 0 1 0 0 1
footprint=0603
}
N 65200 46700 65200 46100 4
N 65200 44300 65200 45200 4
C 65600 46100 1 270 0 capacitor-1.sym
{
T 65300 45300 5 10 1 1 0 0 1
refdes=C920
T 65300 45100 5 10 1 1 0 0 1
value=0.1uF
T 65600 46100 5 10 0 1 0 0 1
footprint=0603
}
N 65800 46700 65800 46100 4
N 65800 44300 65800 45200 4
C 66200 46100 1 270 0 capacitor-1.sym
{
T 65900 45300 5 10 1 1 0 0 1
refdes=C921
T 65900 45100 5 10 1 1 0 0 1
value=0.1uF
T 66200 46100 5 10 0 1 0 0 1
footprint=0603
}
N 66400 46700 66400 46100 4
N 66400 44300 66400 45200 4
C 66800 46100 1 270 0 capacitor-1.sym
{
T 66500 45300 5 10 1 1 0 0 1
refdes=C922
T 66500 45100 5 10 1 1 0 0 1
value=0.1uF
T 66800 46100 5 10 0 1 0 0 1
footprint=0603
}
N 67000 46700 67000 46100 4
N 67000 44300 67000 45200 4
C 67400 46100 1 270 0 capacitor-1.sym
{
T 67100 45300 5 10 1 1 0 0 1
refdes=C923
T 67100 45100 5 10 1 1 0 0 1
value=0.1uF
T 67400 46100 5 10 0 1 0 0 1
footprint=0603
}
N 67600 46700 67600 46100 4
N 67600 44300 67600 45200 4
N 60800 44500 60800 44300 4
C 60300 43700 1 0 0 gnd-1.sym
N 60400 44000 60400 44500 4
C 56600 44600 1 270 1 resistor-1.sym
{
T 56500 45000 5 10 1 1 0 6 1
refdes=R903
T 56600 44600 5 10 0 1 90 2 1
footprint=0603
T 56500 44800 5 10 1 1 0 6 1
value=4.12K
}
N 56900 45800 56700 45800 4
N 56700 45800 56700 45500 4
N 56700 44600 56700 44300 4
N 56700 44300 60400 44300 4
C 49500 60500 1 0 0 capacitor-1.sym
{
T 49300 61000 5 10 1 1 0 0 1
refdes=C924
T 49300 60800 5 10 1 1 0 0 1
value=220pF
T 49500 60500 5 10 0 1 90 0 1
footprint=0603
}
N 55100 60700 50400 60700 4
C 54400 59900 1 270 0 capacitor-1.sym
{
T 54700 59100 5 10 1 1 0 0 1
refdes=C925
T 54700 58900 5 10 1 1 0 0 1
value=220pF
T 54400 59900 5 10 0 1 0 0 1
footprint=0603
}
C 54700 58500 1 0 1 gnd-1.sym
N 54600 58800 54600 59000 4
C 53500 59900 1 270 0 capacitor-1.sym
{
T 53800 59100 5 10 1 1 0 0 1
refdes=C926
T 53800 58900 5 10 1 1 0 0 1
value=NONE
T 53500 59900 5 10 0 1 0 0 1
footprint=0603
}
C 53800 58500 1 0 1 gnd-1.sym
N 53700 58800 53700 59000 4
N 55100 60300 53400 60300 4
N 54600 59900 54600 60300 4
N 53700 59900 53700 60700 4
C 52500 60100 1 0 0 capacitor-1.sym
{
T 52300 60600 5 10 1 1 0 0 1
refdes=C927
T 52300 60400 5 10 1 1 0 0 1
value=220pF
T 52500 60100 5 10 0 1 90 0 1
footprint=0603
}
C 59600 59800 1 0 1 SMA-5.sym
{
T 60100 60500 5 10 1 1 0 6 1
refdes=J2002
T 59600 59800 5 10 0 1 0 0 1
footprint=SMA_VERT
}
N 59100 60300 58700 60300 4
C 59400 59300 1 0 0 gnd-1.sym
N 59500 59600 59500 59800 4
N 57100 60300 57800 60300 4
C 58700 60200 1 0 1 resistor-1.sym
{
T 58300 60500 5 10 1 1 180 2 1
refdes=R2028
T 58700 60200 5 10 0 1 180 2 1
footprint=0603
T 58500 60500 5 10 1 1 0 0 1
value=10
}
C 56000 57800 1 180 0 generic-power.sym
{
T 55800 57550 5 10 1 1 180 3 1
net=DVDD_CLK:1
}
N 55800 57800 55800 58000 4
N 55900 53300 55200 53300 4
N 55900 51700 55200 51700 4
N 57100 60700 58800 60700 4
{
T 57400 60700 5 10 1 1 0 0 1
netname=master_clock
}
N 53500 52500 55200 52500 4
{
T 53800 52500 5 10 1 1 0 0 1
netname=master_clock
}
N 57100 59900 58800 59900 4
{
T 57400 59900 5 10 1 1 0 0 1
netname=clock_db_a_p
}
N 57100 59500 58800 59500 4
{
T 57400 59500 5 10 1 1 0 0 1
netname=clock_db_a_n
}
N 57100 59100 58800 59100 4
{
T 57400 59100 5 10 1 1 0 0 1
netname=clock_db_b_p
}
N 57100 58700 58800 58700 4
{
T 57400 58700 5 10 1 1 0 0 1
netname=clock_db_b_n
}
C 42600 50400 1 180 0 gnd-1.sym
C 42600 50200 1 0 0 generic-power.sym
{
T 42800 50450 5 10 1 1 0 3 1
net=DVDD_CLK:1
}
C 42600 49600 1 90 1 resistor-1.sym
{
T 42300 48900 5 10 1 1 90 2 1
refdes=R904
T 42600 49600 5 10 0 1 270 2 1
footprint=0402
T 42400 49400 5 10 1 1 90 0 1
value=NONE
}
C 42900 49600 1 90 1 resistor-1.sym
{
T 42600 48900 5 10 1 1 90 2 1
refdes=R905
T 42900 49600 5 10 0 1 270 2 1
footprint=0402
T 42700 49400 5 10 1 1 90 0 1
value=NONE
}
C 42300 49600 1 90 1 resistor-1.sym
{
T 42000 48900 5 10 1 1 90 2 1
refdes=R906
T 42300 49600 5 10 0 1 270 2 1
footprint=0402
T 42100 49400 5 10 1 1 90 0 1
value=0
}
C 43600 49600 1 90 1 resistor-1.sym
{
T 43300 48900 5 10 1 1 90 2 1
refdes=R907
T 43600 49600 5 10 0 1 270 2 1
footprint=0402
T 43400 49400 5 10 1 1 90 0 1
value=NONE
}
C 43900 49600 1 90 1 resistor-1.sym
{
T 43600 48900 5 10 1 1 90 2 1
refdes=R908
T 43900 49600 5 10 0 1 270 2 1
footprint=0402
T 43700 49400 5 10 1 1 90 0 1
value=NONE
}
C 43300 49600 1 90 1 resistor-1.sym
{
T 43000 48900 5 10 1 1 90 2 1
refdes=R909
T 43300 49600 5 10 0 1 270 2 1
footprint=0402
T 43100 49400 5 10 1 1 90 0 1
value=0
}
C 44600 49600 1 90 1 resistor-1.sym
{
T 44300 48900 5 10 1 1 90 2 1
refdes=R910
T 44600 49600 5 10 0 1 270 2 1
footprint=0402
T 44400 49400 5 10 1 1 90 0 1
value=NONE
}
C 44900 49600 1 90 1 resistor-1.sym
{
T 44600 48900 5 10 1 1 90 2 1
refdes=R911
T 44900 49600 5 10 0 1 270 2 1
footprint=0402
T 44700 49400 5 10 1 1 90 0 1
value=NONE
}
C 44300 49600 1 90 1 resistor-1.sym
{
T 44000 48900 5 10 1 1 90 2 1
refdes=R912
T 44300 49600 5 10 0 1 270 2 1
footprint=0402
T 44100 49400 5 10 1 1 90 0 1
value=0
}
C 45600 49600 1 90 1 resistor-1.sym
{
T 45300 48900 5 10 1 1 90 2 1
refdes=R913
T 45600 49600 5 10 0 1 270 2 1
footprint=0402
T 45400 49400 5 10 1 1 90 0 1
value=NONE
}
C 45900 49600 1 90 1 resistor-1.sym
{
T 45600 48900 5 10 1 1 90 2 1
refdes=R914
T 45900 49600 5 10 0 1 270 2 1
footprint=0402
T 45700 49400 5 10 1 1 90 0 1
value=NONE
}
C 45300 49600 1 90 1 resistor-1.sym
{
T 45000 48900 5 10 1 1 90 2 1
refdes=R915
T 45300 49600 5 10 0 1 270 2 1
footprint=0402
T 45100 49400 5 10 1 1 90 0 1
value=0
}
C 46600 49600 1 90 1 resistor-1.sym
{
T 46300 48900 5 10 1 1 90 2 1
refdes=R916
T 46600 49600 5 10 0 1 270 2 1
footprint=0402
T 46400 49400 5 10 1 1 90 0 1
value=NONE
}
C 46900 49600 1 90 1 resistor-1.sym
{
T 46600 48900 5 10 1 1 90 2 1
refdes=R917
T 46900 49600 5 10 0 1 270 2 1
footprint=0402
T 46700 49400 5 10 1 1 90 0 1
value=NONE
}
C 46300 49600 1 90 1 resistor-1.sym
{
T 46000 48900 5 10 1 1 90 2 1
refdes=R918
T 46300 49600 5 10 0 1 270 2 1
footprint=0402
T 46100 49400 5 10 1 1 90 0 1
value=0
}
C 47600 49600 1 90 1 resistor-1.sym
{
T 47300 48900 5 10 1 1 90 2 1
refdes=R919
T 47600 49600 5 10 0 1 270 2 1
footprint=0402
T 47400 49400 5 10 1 1 90 0 1
value=NONE
}
C 47900 49600 1 90 1 resistor-1.sym
{
T 47600 48900 5 10 1 1 90 2 1
refdes=R920
T 47900 49600 5 10 0 1 270 2 1
footprint=0402
T 47700 49400 5 10 1 1 90 0 1
value=NONE
}
C 47300 49600 1 90 1 resistor-1.sym
{
T 47000 48900 5 10 1 1 90 2 1
refdes=R921
T 47300 49600 5 10 0 1 270 2 1
footprint=0402
T 47100 49400 5 10 1 1 90 0 1
value=0
}
C 48600 49600 1 90 1 resistor-1.sym
{
T 48300 48900 5 10 1 1 90 2 1
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footprint=0402
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value=NONE
}
C 48900 49600 1 90 1 resistor-1.sym
{
T 48600 48900 5 10 1 1 90 2 1
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footprint=0402
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value=NONE
}
C 48300 49600 1 90 1 resistor-1.sym
{
T 48000 48900 5 10 1 1 90 2 1
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value=0
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C 49600 49600 1 90 1 resistor-1.sym
{
T 49300 48900 5 10 1 1 90 2 1
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footprint=0402
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value=NONE
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C 49900 49600 1 90 1 resistor-1.sym
{
T 49600 48900 5 10 1 1 90 2 1
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footprint=0402
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value=NONE
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C 49300 49600 1 90 1 resistor-1.sym
{
T 49000 48900 5 10 1 1 90 2 1
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footprint=0402
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value=0
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C 50600 49600 1 90 1 resistor-1.sym
{
T 50300 48900 5 10 1 1 90 2 1
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C 50900 49600 1 90 1 resistor-1.sym
{
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C 50300 49600 1 90 1 resistor-1.sym
{
T 50000 48900 5 10 1 1 90 2 1
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C 51600 49600 1 90 1 resistor-1.sym
{
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C 51900 49600 1 90 1 resistor-1.sym
{
T 51600 48900 5 10 1 1 90 2 1
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C 51300 49600 1 90 1 resistor-1.sym
{
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C 52600 49600 1 90 1 resistor-1.sym
{
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C 52900 49600 1 90 1 resistor-1.sym
{
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value=NONE
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C 52300 49600 1 90 1 resistor-1.sym
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T 52000 48900 5 10 1 1 90 2 1
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C 48600 50200 1 0 0 generic-power.sym
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date=$Date: 2005/12/15 21:36:13 $
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rev=$Revision: 1.3 $
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auth=$Author: matt $
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fname=$Source: /opt/usrp-hw-cvs/usrp-hw/usrp-b/clock.sch,v $
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title=USRP-B Clocking
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