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# This is the template file for creating symbols with tragesym
# every line starting with '#' is a comment line.

[options]
# rotate_labels rotates the pintext of top and bottom pins
# wordswap swaps labels if the pin is on the right side an looks like this:
# "PB1 (CLK)"
wordswap=yes
rotate_labels=yes
sort_labels=no
generate_pinseq=yes
sym_width=2800
pinwidthvertikal=400
pinwidthhorizontal=400

[geda_attr]
# name will be printed in the top of the symbol
# if you have a device with slots, you'll have to use slot= and slotdef=
# use comment= if there are special information you want to add
version=20030525
name=EP2C20-F484-IO8
device=EP2C20-F484
refdes=U?
footprint=FG484
description=EP2C20 Cyclone II FPGA
documentation=http://www.altera.com
author=mettus
numslots=0
#slot=1
#slotdef=1:
#slotdef=2:
#slotdef=3:
#slotdef=4:
#comment=
#comment=
#comment=

[pins]
# tabseparated list of pin descriptions
# pinnr is the physical number of the pin
# seq is the pinseq= attribute, leave it blank if it doesn't matter
# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
# style can be (line,dot,clk,dotclk,none). none if only want to add a net
# posit. can be (l,r,t,b) or empty for nets
# net specifies the name of the Vcc or GND name
# label represents the pinlabel. 
#	negation lines can be added with _Q_ 
#	if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
#-----------------------------------------------------
#pinnr	seq	type	style	posit.	net	label	
#-----------------------------------------------------
AA3		io	line	l		IO/_LVDS127N_/DEV\_OE
AB3		io	line	l		IO/LVDS127P
AB4		io	line	l		IO/LVDS126P
AA4		io	line	l		IO/_LVDS126N_
Y5		io	line	l		IO/LVDS125P
Y6		io	line	l		IO/_LVDS125N_
AB5		io	line	l		IO/LVDS124P
AA5		io	line	l		IO/_LVDS124N_
T8		io	line	l		IO/LVDS123P
T7		io	line	l		IO/_LVDS123N_
U8		io	line	l		IO
Y7		io	line	l		IO/VREFB8N1
P9		io	line	l		IO/LVDS122P
P8		io	line	l		IO/_LVDS122N_
AB6		io	line	l		IO/LVDS121P
AA6		io	line	l		IO/_LVDS121N_
V8		io	line	l		IO/LVDS120P
W7		io	line	l		IO/_LVDS120N_
W8		io	line	l		IO/LVDS119P
V9		io	line	l		IO/_LVDS119N_
AB7		io	line	l		IO/LVDS118P
AA7		io	line	l		IO/_LVDS118N_
Y9		io	line	l		IO/LVDS117P
W9		io	line	l		IO/_LVDS117N_
U9		io	line	l		IO/LVDS116P
U10		io	line	l		IO/_LVDS116N_
R10		io	line	l		IO/LVDS115P
R9		io	line	l		IO/_LVDS115N_
AB8		io	line	l		IO/LVDS114P
AA8		io	line	l		IO/_LVDS114N_
Y10		io	line	l		IO/VREFB8N0
AB9		io	line	l		IO/LVDS113P
AA9		io	line	l		IO/_LVDS113N_
T11		io	line	l		IO/LVDS112P
R11		io	line	l		IO/_LVDS112N_
W11		io	line	l		IO/LVDS111P
V11		io	line	l		IO/_LVDS111N_
AB10		io	line	l		IO/LVDS110P
AA10		io	line	l		IO/_LVDS110N_
AB11		io	line	l		IO/LVDS109P
AA11		io	line	l		IO/_LVDS109N_
U11		clk	clk	r		CLK15/LVDSCLK7P
U12		clk	clk	r		CLK14/_LVDSCLK7N_