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# This is the template file for creating symbols with tragesym
# every line starting with '#' is a comment line.
[options]
# rotate_labels rotates the pintext of top and bottom pins
# wordswap swaps labels if the pin is on the right side an looks like this:
# "PB1 (CLK)"
wordswap=yes
rotate_labels=no
sort_labels=yes
generate_pinseq=yes
sym_width=1400
pinwidthvertikal=400
pinwidthhorizontal=400
[geda_attr]
# name will be printed in the top of the symbol
# if you have a device with slots, you'll have to use slot= and slotdef=
# use comment= if there are special information you want to add
version=20030525
name=AD9513-CLK
device=AD9513
refdes=U?
footprint=LFCSP32
description=Clock Divider
documentation=http://www.analog.com
author=mettus
numslots=0
#slot=1
#slotdef=1:
#slotdef=2:
#slotdef=3:
#slotdef=4:
comment=ADF4360
comment=Part 2 of 3
#comment=
[pins]
# tabseparated list of pin descriptions
# pinnr is the physical number of the pin
# seq is the pinseq= attribute, leave it blank if it doesn't matter
# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
# style can be (line,dot,clk,dotclk,none). none if only want to add a net
# posit. can be (l,r,t,b) or empty for nets
# net specifies the name of the Vcc or GND name
# label represents the pinlabel.
# negation lines can be added with _Q_
# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
#-----------------------------------------------------
#pinnr seq type style posit. net label
#-----------------------------------------------------
2 clk clk l CLK
3 clk dotclk l _CLKB_
5 in line b SYNCB
28 out line r OUT0
27 out dot r _OUT0B_
23 out line r OUT1
22 out dot r _OUT1B_
19 out line r OUT2
18 out dot r _OUT2B_
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