diff options
Diffstat (limited to 'usrp')
| -rwxr-xr-x | usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf | bin | 176948 -> 177079 bytes | |||
| -rwxr-xr-x | usrp/fpga/rbf/rev2/std_4rx_0tx.rbf | bin | 173865 -> 174171 bytes | |||
| -rwxr-xr-x | usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf | bin | 176948 -> 177079 bytes | |||
| -rwxr-xr-x | usrp/fpga/rbf/rev4/std_4rx_0tx.rbf | bin | 173865 -> 174171 bytes | |||
| -rw-r--r-- | usrp/fpga/sdr_lib/tx_buffer.v | 20 | ||||
| -rw-r--r-- | usrp/fpga/toplevel/usrp_std/usrp_std.qsf | 2 |
6 files changed, 11 insertions, 11 deletions
diff --git a/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf b/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf Binary files differindex 44fd06f77..966bae865 100755 --- a/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf +++ b/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf diff --git a/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf b/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf Binary files differindex e8a8b6ee9..a5a5cf99d 100755 --- a/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf +++ b/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf diff --git a/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf b/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf Binary files differindex 44fd06f77..966bae865 100755 --- a/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf +++ b/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf diff --git a/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf b/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf Binary files differindex e8a8b6ee9..a5a5cf99d 100755 --- a/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf +++ b/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf diff --git a/usrp/fpga/sdr_lib/tx_buffer.v b/usrp/fpga/sdr_lib/tx_buffer.v index ff8fd839d..63202c9df 100644 --- a/usrp/fpga/sdr_lib/tx_buffer.v +++ b/usrp/fpga/sdr_lib/tx_buffer.v @@ -66,20 +66,20 @@ module tx_buffer load_next <= #1 4'd0; end else - if((load_next != channels) & !tx_empty) + if(load_next != channels) begin load_next <= #1 load_next + 4'd1; case(load_next) - 4'd0 : tx_i_0 <= #1 fifodata; - 4'd1 : tx_q_0 <= #1 fifodata; - 4'd2 : tx_i_1 <= #1 fifodata; - 4'd3 : tx_q_1 <= #1 fifodata; - 4'd4 : tx_i_2 <= #1 fifodata; - 4'd5 : tx_q_2 <= #1 fifodata; - 4'd6 : tx_i_3 <= #1 fifodata; - 4'd7 : tx_q_3 <= #1 fifodata; + 4'd0 : tx_i_0 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd1 : tx_q_0 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd2 : tx_i_1 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd3 : tx_q_1 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd4 : tx_i_2 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd5 : tx_q_2 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd6 : tx_i_3 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd7 : tx_q_3 <= #1 tx_empty ? 16'd0 : fifodata; endcase // case(load_next) - end // if ((load_next != channels) & !tx_empty) + end // if (load_next != channels) else if(txstrobe & (load_next == channels)) begin load_next <= #1 4'd0; diff --git a/usrp/fpga/toplevel/usrp_std/usrp_std.qsf b/usrp/fpga/toplevel/usrp_std/usrp_std.qsf index 1503c8cc6..8297f0f7b 100644 --- a/usrp/fpga/toplevel/usrp_std/usrp_std.qsf +++ b/usrp/fpga/toplevel/usrp_std/usrp_std.qsf @@ -27,7 +27,7 @@ # ======================== set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003" -set_global_assignment -name LAST_QUARTUS_VERSION "6.0 SP1" +set_global_assignment -name LAST_QUARTUS_VERSION 6.1 # Pin & Location Assignments # ========================== |