diff options
Diffstat (limited to 'usrp/host/lib/db_wbxng_adf4350.cc')
| -rw-r--r-- | usrp/host/lib/db_wbxng_adf4350.cc | 40 |
1 files changed, 26 insertions, 14 deletions
diff --git a/usrp/host/lib/db_wbxng_adf4350.cc b/usrp/host/lib/db_wbxng_adf4350.cc index a1f024b4f..6e74bf0c1 100644 --- a/usrp/host/lib/db_wbxng_adf4350.cc +++ b/usrp/host/lib/db_wbxng_adf4350.cc @@ -13,11 +13,11 @@ //#include "io.h" //#include "spi.h" -#define INPUT_REF_FREQ FREQ_C(10e6) +#define INPUT_REF_FREQ FREQ_C(32e6) #define DIV_ROUND(num, denom) (((num) + ((denom)/2))/(denom)) -#define FREQ_C(freq) ((uint32_t)DIV_ROUND(freq, (uint32_t)1000)) +#define FREQ_C(freq) ((uint64_t)DIV_ROUND(freq, (uint64_t)1000)) #define INPUT_REF_FREQ_2X (2*INPUT_REF_FREQ) /* input ref freq with doubler turned on */ -#define MIN_INT_DIV uint16_t(23) /* minimum int divider, prescaler 4/5 only */ +#define MIN_INT_DIV uint16_t(300) /* minimum int divider, prescaler 4/5 only */ #define MAX_RF_DIV uint8_t(16) /* max rf divider, divides rf output */ #define MIN_VCO_FREQ FREQ_C(2.2e9) /* minimum vco freq */ #define MAX_VCO_FREQ FREQ_C(4.4e9) /* minimum vco freq */ @@ -40,12 +40,23 @@ adf4350::adf4350(usrp_basic_sptr _usrp, int _which, int _spi_enable){ d_regs = new adf4350_regs(this); /* Outputs */ - d_usrp->_write_oe(d_which, (CE_PIN | PDB_RF_PIN), 0xffff); + d_usrp->_write_oe(d_which, (CE_PIN | PDB_RF_PIN), (CE_PIN | PDB_RF_PIN)); + d_usrp->write_io(d_which, (CE_PIN), (CE_PIN | PDB_RF_PIN)); /* Initialize the pin levels. */ _enable(true); /* Initialize the registers. */ - d_regs->_load_register(5); + /* + timespec t; + t.tv_sec = 1; + t.tv_nsec = 0; + while (1) { + */ + d_regs->_load_register(5); + /* + nanosleep(&t, NULL); + } + */ d_regs->_load_register(4); d_regs->_load_register(3); d_regs->_load_register(2); @@ -75,9 +86,9 @@ adf4350::_get_locked(void){ void adf4350::_enable(bool enable){ if (enable){ /* chip enable */ - d_usrp->write_io(d_which, 1, CE_PIN); + d_usrp->write_io(d_which, (CE_PIN | PDB_RF_PIN), (CE_PIN | PDB_RF_PIN)); }else{ - d_usrp->write_io(d_which, 0, CE_PIN); + d_usrp->write_io(d_which, 0, (CE_PIN | PDB_RF_PIN)); } } @@ -91,9 +102,10 @@ adf4350::_write(uint8_t addr, uint32_t data){ s[1] = (char)((data >> 16) & 0xff); s[2] = (char)((data >> 8) & 0xff); s[3] = (char)(data & 0xff); - std::string str(s, 3); + std::string str(s, 4); d_usrp->_write_spi(0, d_spi_enable, d_spi_format, str); + fprintf(stderr, "Wrote to WBXNG SPI address %d with data %8x\n", addr, data); /* pulse latch */ //d_usrp->write_io(d_which, 1, LE_PIN); //d_usrp->write_io(d_which, 0, LE_PIN); @@ -110,26 +122,26 @@ adf4350::_set_freq(freq_t freq){ d_regs->d_divider_select++; //double the divider } /* Ramp up the R divider until the N divider is at least the minimum. */ - d_regs->d_10_bit_r_counter = INPUT_REF_FREQ_2X*MIN_INT_DIV/freq; + d_regs->d_10_bit_r_counter = INPUT_REF_FREQ*MIN_INT_DIV/freq; uint64_t n_mod; do{ d_regs->d_10_bit_r_counter++; n_mod = freq; n_mod *= d_regs->d_10_bit_r_counter; n_mod *= d_regs->d_mod; - n_mod /= INPUT_REF_FREQ_2X; + n_mod /= INPUT_REF_FREQ; /* calculate int and frac */ d_regs->d_int = n_mod/d_regs->d_mod; d_regs->d_frac = (n_mod - (freq_t)d_regs->d_int*d_regs->d_mod) & uint16_t(0xfff); - /*printf( + fprintf(stderr, "VCO %lu KHz, Int %u, Frac %u, Mod %u, R %u, Div %u\n", freq, d_regs->d_int, d_regs->d_frac, d_regs->d_mod, d_regs->d_10_bit_r_counter, (1 << d_regs->d_divider_select) - );*/ + ); }while(d_regs->d_int < MIN_INT_DIV); /* calculate the band select so PFD is under 125 KHz */ d_regs->d_8_bit_band_select_clock_divider_value = \ - INPUT_REF_FREQ_2X/(FREQ_C(125e3)*d_regs->d_10_bit_r_counter) + 1; + INPUT_REF_FREQ/(FREQ_C(125e3)*d_regs->d_10_bit_r_counter) + 1; /* load involved registers */ d_regs->_load_register(2); d_regs->_load_register(4); @@ -148,7 +160,7 @@ adf4350::_get_freq(void){ temp = d_regs->d_int; temp *= d_regs->d_mod; temp += d_regs->d_frac; - temp *= INPUT_REF_FREQ_2X; + temp *= INPUT_REF_FREQ; temp /= d_regs->d_mod; temp /= d_regs->d_10_bit_r_counter; temp /= (1 << d_regs->d_divider_select); |