1 files changed, 0 insertions, 17 deletions
diff --git a/usrp/fpga/models/bustri.v b/usrp/fpga/models/bustri.v
deleted file mode 100644
index 6e5a0f74c..000000000
--- a/usrp/fpga/models/bustri.v
+++ /dev/null
@@ -1,17 +0,0 @@
-
-// Model for tristate bus on altera
-// FIXME do we really need to use a megacell for this?
-
-module bustri (data,
-	       enabledt,
-	       tridata);
-   
-   input [15:0]  data;
-   input 	 enabledt;
-   inout [15:0]  tridata;
-   
-   assign 	 tridata = enabledt ? data :16'bz;
-   
-endmodule // bustri
-
-