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-rw-r--r--usrp-hw/sym/generated/adf4360-ANLG.src63
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diff --git a/usrp-hw/sym/generated/adf4360-ANLG.src b/usrp-hw/sym/generated/adf4360-ANLG.src
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--- a/usrp-hw/sym/generated/adf4360-ANLG.src
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-# This is the template file for creating symbols with tragesym
-# every line starting with '#' is a comment line.
-
-[options]
-# rotate_labels rotates the pintext of top and bottom pins
-# wordswap swaps labels if the pin is on the right side an looks like this:
-# "PB1 (CLK)"
-wordswap=yes
-rotate_labels=no
-sort_labels=no
-generate_pinseq=yes
-sym_width=1400
-pinwidthvertikal=400
-pinwidthhorizontal=400
-
-[geda_attr]
-# name will be printed in the top of the symbol
-# if you have a device with slots, you'll have to use slot= and slotdef=
-# use comment= if there are special information you want to add
-version=20030525
-name=ADF4360-ANLG
-device=ADF4360
-refdes=U?
-footprint=CP-24
-description=Family of VCO/PLL Combo chips
-documentation=http://www.analog.com
-author=mettus
-numslots=0
-#slot=1
-#slotdef=1:
-#slotdef=2:
-#slotdef=3:
-#slotdef=4:
-comment=ADF4360-1 through -7
-comment=Part 3 of 3
-#comment=
-
-[pins]
-# tabseparated list of pin descriptions
-# pinnr is the physical number of the pin
-# seq is the pinseq= attribute, leave it blank if it doesn't matter
-# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
-# style can be (line,dot,clk,dotclk,none). none if only want to add a net
-# posit. can be (l,r,t,b) or empty for nets
-# net specifies the name of the Vcc or GND name
-# label represents the pinlabel.
-# negation lines can be added with _Q_
-# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
-#-----------------------------------------------------
-#pinnr seq type style posit. net label
-#-----------------------------------------------------
-4 out line r RFOUTA
-5 out line r _RFOUTB_
-9 io line r L1/AGND
-10 io line r L2/AGND
-24 out line r CP
-16 in line l REFin
-14 io line l Cn
-13 out line l Rset
-12 io line l Cc
-7 in line l Vtune
-
-