1 files changed, 0 insertions, 58 deletions
diff --git a/usrp-hw/sym/generated/ad9510-PLL.src b/usrp-hw/sym/generated/ad9510-PLL.src
deleted file mode 100644
index 715831981..000000000
--- a/usrp-hw/sym/generated/ad9510-PLL.src
+++ /dev/null
@@ -1,58 +0,0 @@
-# This is the template file for creating symbols with tragesym
-# every line starting with '#' is a comment line.
-
-[options]
-# rotate_labels rotates the pintext of top and bottom pins
-# wordswap swaps labels if the pin is on the right side an looks like this:
-# "PB1 (CLK)"
-wordswap=yes
-rotate_labels=no
-sort_labels=no
-generate_pinseq=yes
-sym_width=1400
-pinwidthvertikal=400
-pinwidthhorizontal=400
-
-[geda_attr]
-# name will be printed in the top of the symbol
-# if you have a device with slots, you'll have to use slot= and slotdef=
-# use comment= if there are special information you want to add
-version=20030525
-name=AD9510-PLL
-device=AD9510
-refdes=U?
-footprint=LFCSP64
-description=Clock Divider and PLL
-documentation=http://www.analog.com
-author=mettus
-numslots=0
-#slot=1
-#slotdef=1:
-#slotdef=2:
-#slotdef=3:
-#slotdef=4:
-comment=AD9510
-comment=Part 3 of 5
-#comment=
-
-[pins]
-# tabseparated list of pin descriptions
-# pinnr is the physical number of the pin
-# seq is the pinseq= attribute, leave it blank if it doesn't matter
-# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
-# style can be (line,dot,clk,dotclk,none). none if only want to add a net
-# posit. can be (l,r,t,b) or empty for nets
-# net specifies the name of the Vcc or GND name
-# label represents the pinlabel. 
-#	negation lines can be added with _Q_ 
-#	if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
-#-----------------------------------------------------
-#pinnr	seq	type	style	posit.	net	label	
-#-----------------------------------------------------
-1		clk	clk	l		REFIN\_P
-2		clk	dotclk	l		_REFIN\_N_
-14		clk	clk	l		CLK1\_P
-15		clk	dotclk	l		_CLK1\_N_
-10		clk	clk	l		CLK2\_P
-11		clk	dotclk	l		_CLK2\_N_
-6		out	line	r		CP