diff options
Diffstat (limited to 'usrp-hw/basic-lf')
| -rw-r--r-- | usrp-hw/basic-lf/ChangeLog | 0 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/gnetlistrc | 3 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/gschemrc | 3 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/lfrx.pcb | 2492 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/lfrx.prj | 6 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/lfrx.sch | 1116 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/lftx.pcb | 2697 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/lftx.prj | 6 | ||||
| -rw-r--r-- | usrp-hw/basic-lf/lftx.sch | 1348 | ||||
| -rwxr-xr-x | usrp-hw/basic-lf/netlist_cmd | 6 |
10 files changed, 7677 insertions, 0 deletions
diff --git a/usrp-hw/basic-lf/ChangeLog b/usrp-hw/basic-lf/ChangeLog new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/usrp-hw/basic-lf/ChangeLog diff --git a/usrp-hw/basic-lf/gnetlistrc b/usrp-hw/basic-lf/gnetlistrc new file mode 100644 index 000000000..6bbd9c292 --- /dev/null +++ b/usrp-hw/basic-lf/gnetlistrc @@ -0,0 +1,3 @@ +(component-library "../sym") +(component-library "../sym/generated") + diff --git a/usrp-hw/basic-lf/gschemrc b/usrp-hw/basic-lf/gschemrc new file mode 100644 index 000000000..6bbd9c292 --- /dev/null +++ b/usrp-hw/basic-lf/gschemrc @@ -0,0 +1,3 @@ +(component-library "../sym") +(component-library "../sym/generated") + diff --git a/usrp-hw/basic-lf/lfrx.pcb b/usrp-hw/basic-lf/lfrx.pcb new file mode 100644 index 000000000..a606f90b9 --- /dev/null +++ b/usrp-hw/basic-lf/lfrx.pcb @@ -0,0 +1,2492 @@ +# release: pcb-bin 1.99q +# date: Thu Mar 2 12:12:18 2006 +# user: matt (Matt Ettus) +# host: localhost.localdomain + +PCB["RX Daughterboard" 275000 250000] + +Grid[1000.00000000 0 0 1] +Cursor[195412 138504 3.180460] +Thermal[0.500000] +DRC[699 400 800 800] +Flags(0x0000000000001ad8) +Groups("1,s:4,c:2:3:5,6,7,8:") +Styles["Signal,1000,4000,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,800,3600,2000,1000"] + +Symbol[' ' 1800] +( +) +Symbol['!' 1200] +( + SymbolLine[0 3500 0 4000 800] + SymbolLine[0 0 0 2500 800] +) +Symbol['"' 1200] +( + SymbolLine[0 0 0 1000 800] + SymbolLine[1000 0 1000 1000 800] +) +Symbol['#' 1200] +( + SymbolLine[0 2500 2000 2500 800] + SymbolLine[0 1500 2000 1500 800] + SymbolLine[1500 1000 1500 3000 800] + SymbolLine[500 1000 500 3000 800] +) +Symbol['$' 1200] +( + SymbolLine[1500 500 2000 1000 800] + SymbolLine[500 500 1500 500 800] + SymbolLine[0 1000 500 500 800] + SymbolLine[0 1000 0 1500 800] + SymbolLine[0 1500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[2000 2500 2000 3000 800] + SymbolLine[1500 3500 2000 3000 800] + SymbolLine[500 3500 1500 3500 800] + SymbolLine[0 3000 500 3500 800] + SymbolLine[1000 0 1000 4000 800] +) +Symbol['%' 1200] +( + SymbolLine[0 500 0 1000 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1000 0 800] + SymbolLine[1000 0 1500 500 800] + SymbolLine[1500 500 1500 1000 800] + SymbolLine[1000 1500 1500 1000 800] + SymbolLine[500 1500 1000 1500 800] + SymbolLine[0 1000 500 1500 800] + SymbolLine[0 4000 4000 0 800] + SymbolLine[3500 4000 4000 3500 800] + SymbolLine[4000 3000 4000 3500 800] + SymbolLine[3500 2500 4000 3000 800] + SymbolLine[3000 2500 3500 2500 800] + SymbolLine[2500 3000 3000 2500 800] + SymbolLine[2500 3000 2500 3500 800] + SymbolLine[2500 3500 3000 4000 800] + SymbolLine[3000 4000 3500 4000 800] +) +Symbol['&' 1200] +( + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 500 0 1500 800] + SymbolLine[0 500 500 0 800] + SymbolLine[0 2500 1500 1000 800] + SymbolLine[500 4000 1000 4000 800] + SymbolLine[1000 4000 2000 3000 800] + SymbolLine[0 1500 2500 4000 800] + SymbolLine[500 0 1000 0 800] + SymbolLine[1000 0 1500 500 800] + SymbolLine[1500 500 1500 1000 800] + SymbolLine[0 2500 0 3500 800] +) +Symbol[''' 1200] +( + SymbolLine[0 1000 1000 0 800] +) +Symbol['(' 1200] +( + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 500 500 0 800] + SymbolLine[0 500 0 3500 800] +) +Symbol[')' 1200] +( + SymbolLine[0 0 500 500 800] + SymbolLine[500 500 500 3500 800] + SymbolLine[0 4000 500 3500 800] +) +Symbol['*' 1200] +( + SymbolLine[0 1000 2000 3000 800] + SymbolLine[0 3000 2000 1000 800] + SymbolLine[0 2000 2000 2000 800] + SymbolLine[1000 1000 1000 3000 800] +) +Symbol['+' 1200] +( + SymbolLine[0 2000 2000 2000 800] + SymbolLine[1000 1000 1000 3000 800] +) +Symbol[',' 1200] +( + SymbolLine[0 5000 1000 4000 800] +) +Symbol['-' 1200] +( + SymbolLine[0 2000 2000 2000 800] +) +Symbol['.' 1200] +( + SymbolLine[0 4000 500 4000 800] +) +Symbol['/' 1200] +( + SymbolLine[0 3500 3000 500 800] +) +Symbol['0' 1200] +( + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 500 0 3500 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[1500 0 2000 500 800] + SymbolLine[2000 500 2000 3500 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3000 2000 1000 800] +) +Symbol['1' 1200] +( + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1000 0 1000 4000 800] + SymbolLine[0 1000 1000 0 800] +) +Symbol['2' 1200] +( + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 2000 0 800] + SymbolLine[2000 0 2500 500 800] + SymbolLine[2500 500 2500 1500 800] + SymbolLine[0 4000 2500 1500 800] + SymbolLine[0 4000 2500 4000 800] +) +Symbol['3' 1200] +( + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[1500 0 2000 500 800] + SymbolLine[2000 500 2000 3500 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 2000 2000 2000 800] +) +Symbol['4' 1200] +( + SymbolLine[0 2000 2000 0 800] + SymbolLine[0 2000 2500 2000 800] + SymbolLine[2000 0 2000 4000 800] +) +Symbol['5' 1200] +( + SymbolLine[0 0 2000 0 800] + SymbolLine[0 0 0 2000 800] + SymbolLine[0 2000 500 1500 800] + SymbolLine[500 1500 1500 1500 800] + SymbolLine[1500 1500 2000 2000 800] + SymbolLine[2000 2000 2000 3500 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3500 500 4000 800] +) +Symbol['6' 1200] +( + SymbolLine[1500 0 2000 500 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[0 500 500 0 800] + SymbolLine[0 500 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[0 2000 1500 2000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[2000 2500 2000 3500 800] +) +Symbol['7' 1200] +( + SymbolLine[0 4000 2500 1500 800] + SymbolLine[2500 0 2500 1500 800] + SymbolLine[0 0 2500 0 800] +) +Symbol['8' 1200] +( + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[2000 2500 2000 3500 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 1500 500 2000 800] + SymbolLine[0 500 0 1500 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[1500 0 2000 500 800] + SymbolLine[2000 500 2000 1500 800] + SymbolLine[1500 2000 2000 1500 800] +) +Symbol['9' 1200] +( + SymbolLine[0 4000 2000 2000 800] + SymbolLine[2000 500 2000 2000 800] + SymbolLine[1500 0 2000 500 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[0 500 500 0 800] + SymbolLine[0 500 0 1500 800] + SymbolLine[0 1500 500 2000 800] + SymbolLine[500 2000 2000 2000 800] +) +Symbol[':' 1200] +( + SymbolLine[0 1500 500 1500 800] + SymbolLine[0 2500 500 2500 800] +) +Symbol[';' 1200] +( + SymbolLine[0 4000 1000 3000 800] + SymbolLine[1000 1500 1000 2000 800] +) +Symbol['<' 1200] +( + SymbolLine[0 2000 1000 1000 800] + SymbolLine[0 2000 1000 3000 800] +) +Symbol['=' 1200] +( + SymbolLine[0 1500 2000 1500 800] + SymbolLine[0 2500 2000 2500 800] +) +Symbol['>' 1200] +( + SymbolLine[0 1000 1000 2000 800] + SymbolLine[0 3000 1000 2000 800] +) +Symbol['?' 1200] +( + SymbolLine[1000 2000 1000 2500 800] + SymbolLine[1000 3500 1000 4000 800] + SymbolLine[0 500 0 1000 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[1500 0 2000 500 800] + SymbolLine[2000 500 2000 1000 800] + SymbolLine[1000 2000 2000 1000 800] +) +Symbol['A' 1200] +( + SymbolLine[0 500 0 4000 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 2000 0 800] + SymbolLine[2000 0 2500 500 800] + SymbolLine[2500 500 2500 4000 800] + SymbolLine[0 2000 2500 2000 800] +) +Symbol['B' 1200] +( + SymbolLine[0 4000 2000 4000 800] + SymbolLine[2000 4000 2500 3500 800] + SymbolLine[2500 2500 2500 3500 800] + SymbolLine[2000 2000 2500 2500 800] + SymbolLine[500 2000 2000 2000 800] + SymbolLine[500 0 500 4000 800] + SymbolLine[0 0 2000 0 800] + SymbolLine[2000 0 2500 500 800] + SymbolLine[2500 500 2500 1500 800] + SymbolLine[2000 2000 2500 1500 800] +) +Symbol['C' 1200] +( + SymbolLine[500 4000 2000 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 500 0 3500 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 2000 0 800] +) +Symbol['D' 1200] +( + SymbolLine[500 0 500 4000 800] + SymbolLine[2000 0 2500 500 800] + SymbolLine[2500 500 2500 3500 800] + SymbolLine[2000 4000 2500 3500 800] + SymbolLine[0 4000 2000 4000 800] + SymbolLine[0 0 2000 0 800] +) +Symbol['E' 1200] +( + SymbolLine[0 2000 1500 2000 800] + SymbolLine[0 4000 2000 4000 800] + SymbolLine[0 0 0 4000 800] + SymbolLine[0 0 2000 0 800] +) +Symbol['F' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 0 2000 0 800] + SymbolLine[0 2000 1500 2000 800] +) +Symbol['G' 1200] +( + SymbolLine[2000 0 2500 500 800] + SymbolLine[500 0 2000 0 800] + SymbolLine[0 500 500 0 800] + SymbolLine[0 500 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 2000 4000 800] + SymbolLine[2000 4000 2500 3500 800] + SymbolLine[2500 2500 2500 3500 800] + SymbolLine[2000 2000 2500 2500 800] + SymbolLine[1000 2000 2000 2000 800] +) +Symbol['H' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[2500 0 2500 4000 800] + SymbolLine[0 2000 2500 2000 800] +) +Symbol['I' 1200] +( + SymbolLine[0 0 1000 0 800] + SymbolLine[500 0 500 4000 800] + SymbolLine[0 4000 1000 4000 800] +) +Symbol['J' 1200] +( + SymbolLine[0 0 1500 0 800] + SymbolLine[1500 0 1500 3500 800] + SymbolLine[1000 4000 1500 3500 800] + SymbolLine[500 4000 1000 4000 800] + SymbolLine[0 3500 500 4000 800] +) +Symbol['K' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 2000 2000 0 800] + SymbolLine[0 2000 2000 4000 800] +) +Symbol['L' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 4000 2000 4000 800] +) +Symbol['M' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 0 1500 1500 800] + SymbolLine[1500 1500 3000 0 800] + SymbolLine[3000 0 3000 4000 800] +) +Symbol['N' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 0 0 500 800] + SymbolLine[0 500 2500 3000 800] + SymbolLine[2500 0 2500 4000 800] +) +Symbol['O' 1200] +( + SymbolLine[0 500 0 3500 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[1500 0 2000 500 800] + SymbolLine[2000 500 2000 3500 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3500 500 4000 800] +) +Symbol['P' 1200] +( + SymbolLine[500 0 500 4000 800] + SymbolLine[0 0 2000 0 800] + SymbolLine[2000 0 2500 500 800] + SymbolLine[2500 500 2500 1500 800] + SymbolLine[2000 2000 2500 1500 800] + SymbolLine[500 2000 2000 2000 800] +) +Symbol['Q' 1200] +( + SymbolLine[0 500 0 3500 800] + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1500 0 800] + SymbolLine[1500 0 2000 500 800] + SymbolLine[2000 500 2000 3500 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[1000 3000 2000 4000 800] +) +Symbol['R' 1200] +( + SymbolLine[0 0 2000 0 800] + SymbolLine[2000 0 2500 500 800] + SymbolLine[2500 500 2500 1500 800] + SymbolLine[2000 2000 2500 1500 800] + SymbolLine[500 2000 2000 2000 800] + SymbolLine[500 0 500 4000 800] + SymbolLine[500 2000 2500 4000 800] +) +Symbol['S' 1200] +( + SymbolLine[2000 0 2500 500 800] + SymbolLine[500 0 2000 0 800] + SymbolLine[0 500 500 0 800] + SymbolLine[0 500 0 1500 800] + SymbolLine[0 1500 500 2000 800] + SymbolLine[500 2000 2000 2000 800] + SymbolLine[2000 2000 2500 2500 800] + SymbolLine[2500 2500 2500 3500 800] + SymbolLine[2000 4000 2500 3500 800] + SymbolLine[500 4000 2000 4000 800] + SymbolLine[0 3500 500 4000 800] +) +Symbol['T' 1200] +( + SymbolLine[0 0 2000 0 800] + SymbolLine[1000 0 1000 4000 800] +) +Symbol['U' 1200] +( + SymbolLine[0 0 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[2000 0 2000 3500 800] +) +Symbol['V' 1200] +( + SymbolLine[0 0 0 3000 800] + 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+( + SymbolLine[500 2000 2000 2000 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 2000 4000 800] +) +Symbol['d' 1200] +( + SymbolLine[2000 0 2000 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] +) +Symbol['e' 1200] +( + SymbolLine[500 4000 2000 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[0 3000 2000 3000 800] + SymbolLine[2000 3000 2000 2500 800] +) +Symbol['f' 1000] +( + SymbolLine[500 500 500 4000 800] + SymbolLine[500 500 1000 0 800] + SymbolLine[1000 0 1500 0 800] + SymbolLine[0 2000 1000 2000 800] +) +Symbol['g' 1200] +( + SymbolLine[1500 2000 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800] +) +Symbol['x' 1200] +( + SymbolLine[0 2000 2000 4000 800] + SymbolLine[0 4000 2000 2000 800] +) +Symbol['y' 1200] +( + SymbolLine[0 2000 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[2000 2000 2000 5000 800] + SymbolLine[1500 5500 2000 5000 800] + SymbolLine[500 5500 1500 5500 800] + SymbolLine[0 5000 500 5500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] +) +Symbol['z' 1200] +( + SymbolLine[0 2000 2000 2000 800] + SymbolLine[0 4000 2000 2000 800] + SymbolLine[0 4000 2000 4000 800] +) +Symbol['{' 1200] +( + SymbolLine[500 500 1000 0 800] + SymbolLine[500 500 500 1500 800] + SymbolLine[0 2000 500 1500 800] + SymbolLine[0 2000 500 2500 800] + SymbolLine[500 2500 500 3500 800] + SymbolLine[500 3500 1000 4000 800] +) +Symbol['|' 1200] +( + SymbolLine[0 0 0 4000 800] +) +Symbol['}' 1200] +( + SymbolLine[0 0 500 500 800] + SymbolLine[500 500 500 1500 800] + SymbolLine[500 1500 1000 2000 800] + SymbolLine[500 2500 1000 2000 800] + SymbolLine[500 2500 500 3500 800] + SymbolLine[0 4000 500 3500 800] +) +Symbol['~' 1200] +( + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1000 2000 800] + SymbolLine[1000 2000 1500 2500 800] + SymbolLine[1500 2500 2000 2500 800] + SymbolLine[2000 2500 2500 2000 800] +) +Via[15000 235000 13200 2000 11000 12800 "" "hole"] +Via[92500 132000 4000 2000 0 2000 "" ""] +Via[260000 15000 13200 2000 11000 12800 "" "hole"] +Via[260000 235000 13200 2000 11000 12800 "" "hole"] +Via[82000 199000 4000 2000 0 2000 "" "thermal(1)"] +Via[55000 55000 13200 2000 11000 12800 "" "hole"] +Via[223000 113000 4000 2000 0 2000 "" "thermal(1)"] +Via[141499 133398 4000 2000 0 2000 "" "auto"] +Via[85000 115000 4000 2000 0 2000 "" "thermal(1)"] +Via[202500 120500 4000 2000 0 2000 "" ""] +Via[106000 123000 4000 2000 0 2000 "" "auto"] +Via[141499 139901 4000 2000 0 2000 "" "auto"] +Via[165500 79000 4000 2000 0 2000 "" "thermal(1)"] +Via[156792 122699 4000 2000 0 2000 "" "auto"] +Via[159900 135400 4000 2000 0 2000 "" "auto"] +Via[123500 127000 4000 2000 0 2000 "" ""] +Via[99500 141000 4000 2000 0 2000 "" ""] +Via[109500 127000 4000 2000 0 2000 "" ""] +Via[87000 91500 4000 2000 0 2000 "" "thermal(1)"] +Via[188000 74000 4000 2000 0 2000 "" ""] +Via[194000 74000 4000 2000 0 2000 "" ""] +Via[211000 74000 4000 2000 0 2000 "" ""] +Via[216000 77000 4000 2000 0 2000 "" ""] +Via[196000 162000 4000 2000 0 2000 "" "thermal(1)"] +Via[224000 195000 4000 2000 0 2000 "" "thermal(1)"] +Via[157000 196000 4000 2000 0 2000 "" "thermal(1)"] +Via[159000 189000 4000 2000 0 2000 "" "usetherm,thermal(2)"] +Via[226000 188000 4000 2000 0 2000 "" "usetherm,thermal(2)"] +Via[198000 186000 4000 2000 0 2000 "" "usetherm,thermal(2)"] +Via[206000 178000 3600 2000 0 2000 "" ""] +Via[229000 199000 3600 2000 0 2000 "" ""] +Via[128000 183000 3600 2000 0 2000 "" ""] +Via[137000 176000 3600 2000 0 2000 "" ""] +Via[191000 231000 3600 2000 0 2000 "" "thermal(2)"] + +Element["" "0603" "R3" "49.9" 167000 209000 6000 -2000 0 100 ""] +( + Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "square"] + Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "square"] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + + ) + +Element["" "0603" "R32" "24.9" 245000 217000 4000 -1200 0 100 ""] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["onsolder" "PMC-REVERSE" "J2" "unknown" 94993 95811 -18000 9000 0 100 "auto"] +( + Pin[-6693 7189 7200 2000 7200 5800 "" "1" "hole,edge2"] + Pin[128740 7189 7200 2000 7200 5800 "" "2" "hole,edge2"] + Pad[0 9900 0 19000 2400 1000 3400 "" "1" "auto,edge2"] + Pad[122047 -4622 122047 4478 2400 1000 3400 "" "64" "auto"] + Pad[7874 9900 7874 19000 2400 1000 3400 "" "5" "auto,edge2"] + Pad[3937 9900 3937 19000 2400 1000 3400 "" "3" "auto,edge2"] + Pad[11811 9900 11811 19000 2400 1000 3400 "" "7" "auto,edge2"] + Pad[0 -4622 0 4478 2400 1000 3400 "" "2" "auto"] + Pad[15748 9900 15748 19000 2400 1000 3400 "" "9" "auto,edge2"] + Pad[7874 -4622 7874 4478 2400 1000 3400 "" "6" "auto"] + Pad[19685 9900 19685 19000 2400 1000 3400 "" "11" "auto,edge2"] + Pad[11811 -4622 11811 4478 2400 1000 3400 "" "8" "auto"] + Pad[23622 9900 23622 19000 2400 1000 3400 "" "13" "auto,edge2"] + Pad[15748 -4622 15748 4478 2400 1000 3400 "" "10" "auto"] + Pad[27559 9900 27559 19000 2400 1000 3400 "" "15" "auto,edge2"] + Pad[19685 -4622 19685 4478 2400 1000 3400 "" "12" "auto"] + Pad[31496 9900 31496 19000 2400 1000 3400 "" "17" "auto,edge2"] + Pad[23622 -4622 23622 4478 2400 1000 3400 "" "14" "auto"] + Pad[35433 9900 35433 19000 2400 1000 3400 "" "19" "auto,edge2"] + Pad[27559 -4622 27559 4478 2400 1000 3400 "" "16" "auto"] + Pad[39370 9900 39370 19000 2400 1000 3400 "" "21" "auto,edge2"] + Pad[31496 -4622 31496 4478 2400 1000 3400 "" "18" "auto"] + Pad[35433 -4622 35433 4478 2400 1000 3400 "" "20" "auto"] + Pad[39370 -4622 39370 4478 2400 1000 3400 "" "22" "auto"] + Pad[43307 -4622 43307 4478 2400 1000 3400 "" "24" "auto"] + Pad[47244 -4622 47244 4478 2400 1000 3400 "" "26" "auto"] + Pad[51181 -4622 51181 4478 2400 1000 3400 "" "28" "auto"] + Pad[55118 -4622 55118 4478 2400 1000 3400 "" "30" "auto"] + Pad[59055 -4622 59055 4478 2400 1000 3400 "" "32" "auto"] + Pad[62992 -4622 62992 4478 2400 1000 3400 "" "34" "auto"] + Pad[66929 -4622 66929 4478 2400 1000 3400 "" "36" "auto"] + Pad[70866 -4622 70866 4478 2400 1000 3400 "" "38" "auto"] + Pad[74803 -4622 74803 4478 2400 1000 3400 "" "40" "auto"] + Pad[78740 -4622 78740 4478 2400 1000 3400 "" "42" "auto"] + Pad[82677 -4622 82677 4478 2400 1000 3400 "" "44" "auto"] + Pad[86614 -4622 86614 4478 2400 1000 3400 "" "46" "auto"] + Pad[90551 -4622 90551 4478 2400 1000 3400 "" "48" "auto"] + Pad[98425 -4622 98425 4478 2400 1000 3400 "" "52" "auto"] + Pad[94488 -4622 94488 4478 2400 1000 3400 "" "50" "auto"] + Pad[102362 -4622 102362 4478 2400 1000 3400 "" "54" "auto"] + Pad[106299 -4622 106299 4478 2400 1000 3400 "" "56" "auto"] + Pad[110236 -4622 110236 4478 2400 1000 3400 "" "58" "auto"] + Pad[114173 -4622 114173 4478 2400 1000 3400 "" "60" "auto"] + Pad[3937 -4622 3937 4478 2400 1000 3400 "" "4" "auto"] + Pad[43307 9900 43307 19000 2400 1000 3400 "" "23" "auto,edge2"] + Pad[47244 9900 47244 19000 2400 1000 3400 "" "25" "auto,edge2"] + Pad[51181 9900 51181 19000 2400 1000 3400 "" "27" "auto,edge2"] + Pad[55118 9900 55118 19000 2400 1000 3400 "" "29" "auto,edge2"] + Pad[59055 9900 59055 19000 2400 1000 3400 "" "31" "auto,edge2"] + Pad[62992 9900 62992 19000 2400 1000 3400 "" "33" "auto,edge2"] + Pad[66929 9900 66929 19000 2400 1000 3400 "" "35" "auto,edge2"] + Pad[70866 9900 70866 19000 2400 1000 3400 "" "37" "auto,edge2"] + Pad[74803 9900 74803 19000 2400 1000 3400 "" "39" "auto,edge2"] + Pad[78740 9900 78740 19000 2400 1000 3400 "" "41" "auto,edge2"] + Pad[82677 9900 82677 19000 2400 1000 3400 "" "43" "auto,edge2"] + Pad[86614 9900 86614 19000 2400 1000 3400 "" "45" "auto,edge2"] + Pad[90551 9900 90551 19000 2400 1000 3400 "" "47" "auto,edge2"] + Pad[94488 9900 94488 19000 2400 1000 3400 "" "49" "auto,edge2"] + Pad[98425 9900 98425 19000 2400 1000 3400 "" "51" "auto,edge2"] + Pad[102362 9900 102362 19000 2400 1000 3400 "" "53" "auto,edge2"] + Pad[106299 9900 106299 19000 2400 1000 3400 "" "55" "auto,edge2"] + Pad[110236 9900 110236 19000 2400 1000 3400 "" "57" "auto,edge2"] + Pad[114173 9900 114173 19000 2400 1000 3400 "" "59" "auto,edge2"] + Pad[118110 9900 118110 19000 2400 1000 3400 "" "61" "auto,edge2"] + Pad[122047 9900 122047 19000 2400 1000 3400 "" "63" "auto,edge2"] + Pad[118110 -4622 118110 4478 2400 1000 3400 "" "62" "auto"] + ElementLine [134000 -9000 134000 24000 1000] + ElementLine [-11000 24000 134000 24000 1000] + ElementLine [-11000 -9000 134000 -9000 1000] + ElementLine [-11000 -9000 -11000 24000 1000] + + ) + +Element["" "0603" "R10" "49.9" 218000 170500 4500 5000 1 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "CONNECTOR-10-2" "J15" "unknown" 77000 40500 -17200 -13200 0 100 ""] +( + Pin[0 0 6000 3000 6600 4000 "1" "1" "square,edge2"] + Pin[0 -10000 6000 3000 6600 4000 "2" "2" "edge2"] + Pin[10000 0 6000 3000 6600 4000 "3" "3" "edge2"] + Pin[10000 -10000 6000 3000 6600 4000 "4" "4" "edge2"] + Pin[20000 0 6000 3000 6600 4000 "5" "5" "edge2"] + Pin[20000 -10000 6000 3000 6600 4000 "6" "6" "edge2"] + Pin[30000 0 6000 3000 6600 4000 "7" "7" "edge2"] + Pin[30000 -10000 6000 3000 6600 4000 "8" "8" "edge2"] + Pin[40000 0 6000 3000 6600 4000 "9" "9" "edge2"] + Pin[40000 -10000 6000 3000 6600 4000 "10" "10" "edge2"] + Pin[50000 0 6000 3000 6600 4000 "11" "11" "edge2"] + Pin[50000 -10000 6000 3000 6600 4000 "12" "12" "edge2"] + Pin[60000 0 6000 3000 6600 4000 "13" "13" "edge2"] + Pin[60000 -10000 6000 3000 6600 4000 "14" "14" "edge2"] + Pin[70000 0 6000 3000 6600 4000 "15" "15" "edge2"] + Pin[70000 -10000 6000 3000 6600 4000 "16" "16" "edge2"] + Pin[80000 0 6000 3000 6600 4000 "17" "17" "edge2"] + Pin[80000 -10000 6000 3000 6600 4000 "18" "18" "edge2"] + Pin[90000 0 6000 3000 6600 4000 "19" "19" "edge2"] + Pin[90000 -10000 6000 3000 6600 4000 "20" "20" "edge2,thermal(1)"] + ElementLine [-5000 -5000 5000 -5000 1000] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 -15000 -5000 5000 2000] + ElementLine [-5000 -15000 95000 -15000 2000] + ElementLine [95000 -15000 95000 5000 2000] + ElementLine [-5000 5000 95000 5000 2000] + + ) + +Element["" "CONNECTOR-5-2" "J17" "unknown" 183500 137500 49000 -12000 0 100 ""] +( + Pin[0 0 6000 3000 6600 4000 "1" "1" "square,usetherm,edge2,thermal(2)"] + Pin[0 -10000 6000 3000 6600 4000 "2" "2" "edge2"] + Pin[10000 0 6000 3000 6600 4000 "3" "3" "edge2"] + Pin[10000 -10000 6000 3000 6600 4000 "4" "4" "edge2"] + Pin[20000 0 6000 3000 6600 4000 "5" "5" "edge2"] + Pin[20000 -10000 6000 3000 6600 4000 "6" "6" "edge2"] + Pin[30000 0 6000 3000 6600 4000 "7" "7" "edge2"] + Pin[30000 -10000 6000 3000 6600 4000 "8" "8" "edge2"] + Pin[40000 0 6000 3000 6600 4000 "9" "9" "edge2,thermal(1)"] + Pin[40000 -10000 6000 3000 6600 4000 "10" "10" "edge2,thermal(1)"] + ElementLine [-5000 -5000 5000 -5000 1000] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 -15000 -5000 5000 2000] + ElementLine [-5000 -15000 45000 -15000 2000] + ElementLine [45000 -15000 45000 5000 2000] + ElementLine [-5000 5000 45000 5000 2000] + + ) + +Element["" "SMA_VERT" "J18" "unknown" 160500 231500 17000 12000 0 100 ""] +( + Pin[0 0 9000 3000 9000 6000 "1" "1" ""] + Pin[-10000 -10000 9000 3000 9000 6000 "2" "2" "thermal(1,6)"] + Pin[10000 -10000 9000 3000 9000 6000 "3" "3" "thermal(1,6)"] + Pin[-10000 10000 9000 3000 9000 6000 "4" "4" "thermal(1,6)"] + Pin[10000 10000 9000 3000 9000 6000 "5" "5" "thermal(1,6)"] + ElementLine [-16000 -16000 16000 -16000 1000] + ElementLine [-16000 -16000 -16000 16000 1000] + ElementLine [-16000 16000 16000 16000 1000] + ElementLine [16000 -16000 16000 16000 1000] + + ) + +Element["" "SMA_VERT" "J19" "unknown" 223500 231500 18000 11000 0 100 ""] +( + Pin[0 0 9000 3000 9000 6000 "1" "1" ""] + Pin[-10000 -10000 9000 3000 9000 6000 "2" "2" "thermal(1,6)"] + Pin[10000 -10000 9000 3000 9000 6000 "3" "3" "thermal(1,6)"] + Pin[-10000 10000 9000 3000 9000 6000 "4" "4" "thermal(1,6)"] + Pin[10000 10000 9000 3000 9000 6000 "5" "5" "thermal(1,6)"] + ElementLine [-16000 -16000 16000 -16000 1000] + ElementLine [-16000 -16000 -16000 16000 1000] + ElementLine [-16000 16000 16000 16000 1000] + ElementLine [16000 -16000 16000 16000 1000] + + ) + +Element["" "0603" "R5" "49.9" 166000 174000 3500 -3000 0 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "0603" "R11" "49.9" 231000 171000 5000 3500 1 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["onsolder" "0603" "C25" "82pF" 216000 81000 -3000 -4500 0 100 "auto"] +( + Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "auto,square"] + Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "auto,square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [4200 2700 4200 -2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 2700 -4200 -2700 600] + + ) + +Element["onsolder" "0603" "C26" "82pF" 206000 81000 -4000 -4000 0 100 "auto"] +( + Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "auto,square"] + Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "auto,square"] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 2700 -4200 -2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [4200 2700 4200 -2700 600] + + ) + +Element["" "0603" "R9" "49.9" 229000 211000 5000 -1500 0 100 ""] +( + Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "square"] + Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "square"] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + + ) + +Element["" "0603" "C24" ".1uF" 197000 175000 3000 -9000 0 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 4200 2700 4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [-2700 -4200 -2700 4200 600] + + ) + +Element["" "0603" "R6" "1K" 188500 179500 -10500 -4000 0 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "0603" "R7" "1K" 189000 170000 -5500 -10000 0 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "0603" "R4" "49.9" 158000 174000 -10500 1500 0 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["onsolder" "0603" "C22" "82pF" 186000 81000 -6500 -4500 0 100 "auto"] +( + Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "auto,square"] + Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "auto,square"] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 2700 -4200 -2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [4200 2700 4200 -2700 600] + + ) + +Element["" "0603" "R28" "0" 120000 184000 -6500 4500 0 100 ""] +( + Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "selected,square"] + Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "CONNECTOR-8-2" "J16" "unknown" 70500 162500 -16000 -9000 0 100 ""] +( + Pin[0 0 6000 3000 6600 4000 "1" "1" "square,edge2"] + Pin[0 -10000 6000 3000 6600 4000 "2" "2" "edge2,thermal(1)"] + Pin[10000 0 6000 3000 6600 4000 "3" "3" "edge2"] + Pin[10000 -10000 6000 3000 6600 4000 "4" "4" "edge2,thermal(1)"] + Pin[20000 0 6000 3000 6600 4000 "5" "5" "edge2"] + Pin[20000 -10000 6000 3000 6600 4000 "6" "6" "edge2"] + Pin[30000 0 6000 3000 6600 4000 "7" "7" "edge2"] + Pin[30000 -10000 6000 3000 6600 4000 "8" "8" "edge2"] + Pin[40000 0 6000 3000 6600 4000 "9" "9" "edge2"] + Pin[40000 -10000 6000 3000 6600 4000 "10" "10" "edge2"] + Pin[50000 0 6000 3000 6600 4000 "11" "11" "edge2"] + Pin[50000 -10000 6000 3000 6600 4000 "12" "12" "edge2"] + Pin[60000 0 6000 3000 6600 4000 "13" "13" "edge2"] + Pin[60000 -10000 6000 3000 6600 4000 "14" "14" "edge2"] + Pin[70000 0 6000 3000 6600 4000 "15" "15" "edge2"] + Pin[70000 -10000 6000 3000 6600 4000 "16" "16" "edge2,thermal(1)"] + ElementLine [-5000 -5000 5000 -5000 1000] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 -15000 -5000 5000 2000] + ElementLine [-5000 -15000 75000 -15000 2000] + ElementLine [75000 -15000 75000 5000 2000] + ElementLine [-5000 5000 75000 5000 2000] + + ) + +Element["" "0603" "R37" "348" 156000 209000 -16000 -2200 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "CONNECTOR-8-2" "J24" "unknown" 10500 132500 19800 -3100 0 100 ""] +( + Pin[0 0 6000 3000 6600 4000 "1" "1" "square"] + Pin[10000 0 6000 3000 6600 4000 "2" "2" "thermal(1)"] + Pin[0 10000 6000 3000 6600 4000 "3" "3" ""] + Pin[10000 10000 6000 3000 6600 4000 "4" "4" "thermal(1)"] + Pin[0 20000 6000 3000 6600 4000 "5" "5" ""] + Pin[10000 20000 6000 3000 6600 4000 "6" "6" "thermal(1)"] + Pin[0 30000 6000 3000 6600 4000 "7" "7" ""] + Pin[10000 30000 6000 3000 6600 4000 "8" "8" "thermal(1)"] + Pin[0 40000 6000 3000 6600 4000 "9" "9" ""] + Pin[10000 40000 6000 3000 6600 4000 "10" "10" "thermal(1)"] + Pin[0 50000 6000 3000 6600 4000 "11" "11" ""] + Pin[10000 50000 6000 3000 6600 4000 "12" "12" "thermal(1)"] + Pin[0 60000 6000 3000 6600 4000 "13" "13" ""] + Pin[10000 60000 6000 3000 6600 4000 "14" "14" "thermal(1)"] + Pin[0 70000 6000 3000 6600 4000 "15" "15" ""] + Pin[10000 70000 6000 3000 6600 4000 "16" "16" "thermal(1)"] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 5000 5000 5000 1000] + ElementLine [-5000 -5000 15000 -5000 2000] + ElementLine [15000 -5000 15000 75000 2000] + ElementLine [-5000 75000 15000 75000 2000] + ElementLine [-5000 -5000 -5000 75000 2000] + + ) + +Element["" "CONNECTOR-8-2" "J25" "unknown" 11000 15000 19200 -2600 0 100 ""] +( + Pin[0 0 6000 3000 6600 4000 "1" "1" "square"] + Pin[10000 0 6000 3000 6600 4000 "2" "2" "thermal(1)"] + Pin[0 10000 6000 3000 6600 4000 "3" "3" ""] + Pin[10000 10000 6000 3000 6600 4000 "4" "4" "thermal(1)"] + Pin[0 20000 6000 3000 6600 4000 "5" "5" ""] + Pin[10000 20000 6000 3000 6600 4000 "6" "6" "thermal(1)"] + Pin[0 30000 6000 3000 6600 4000 "7" "7" ""] + Pin[10000 30000 6000 3000 6600 4000 "8" "8" "thermal(1)"] + Pin[0 40000 6000 3000 6600 4000 "9" "9" ""] + Pin[10000 40000 6000 3000 6600 4000 "10" "10" "thermal(1)"] + Pin[0 50000 6000 3000 6600 4000 "11" "11" ""] + Pin[10000 50000 6000 3000 6600 4000 "12" "12" "thermal(1)"] + Pin[0 60000 6000 3000 6600 4000 "13" "13" ""] + Pin[10000 60000 6000 3000 6600 4000 "14" "14" "thermal(1)"] + Pin[0 70000 6000 3000 6600 4000 "15" "15" ""] + Pin[10000 70000 6000 3000 6600 4000 "16" "16" "thermal(1)"] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 5000 5000 5000 1000] + ElementLine [-5000 -5000 15000 -5000 2000] + ElementLine [15000 -5000 15000 75000 2000] + ElementLine [-5000 75000 15000 75000 2000] + ElementLine [-5000 -5000 -5000 75000 2000] + + ) + +Element["" "0603" "R33" "348" 245000 208000 4000 -1200 0 100 ""] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "0603" "R34" "348" 246000 193000 5000 -2200 0 100 ""] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "SO8" "U1" "unknown" 88500 179000 18000 20000 0 100 ""] +( + Pad[-1900 0 900 0 2000 3000 2000 "1" "1" ""] + Pad[-1900 5000 900 5000 2000 3000 2000 "2" "2" "square"] + Pad[-1900 10000 900 10000 2000 3000 2000 "3" "3" "square"] + Pad[-1900 15000 900 15000 2000 3000 2000 "4" "4" "square"] + Pad[18500 15000 21300 15000 2000 3000 2000 "5" "5" "square,edge2"] + Pad[18500 10000 21300 10000 2000 3000 2000 "6" "6" "square,edge2"] + Pad[18500 5000 21300 5000 2000 3000 2000 "7" "7" "square,edge2"] + Pad[18500 0 21300 0 2000 3000 2000 "8" "8" "square,edge2"] + ElementLine [-2900 -2500 -2900 17500 1000] + ElementLine [-2900 17500 22300 17500 1000] + ElementLine [22300 -2500 22300 17500 1000] + ElementLine [7200 -2500 22300 -2500 1000] + ElementLine [-2900 -2500 12200 -2500 1000] + ElementArc [9700 -2500 2500 2500 0 180 1000] + + ) + +Element["" "SO8" "U2" "unknown" 225000 194000 -3000 -15000 0 100 ""] +( + Pad[7000 7500 13500 7500 2000 1000 3000 "1" "1" "square,edge2"] + Pad[7000 2500 13500 2500 2000 1000 3000 "2" "2" "square,edge2"] + Pad[7000 -2500 13500 -2500 2000 1000 3000 "3" "3" "square,edge2"] + Pad[7000 -7500 13500 -7500 2000 1000 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Connect("U1-1") + ) + Net("I2C_A1" "(unknown)") + ( + Connect("J2-19") + Connect("J16-6") + Connect("U1-2") + ) + Net("io_rx_00" "(unknown)") + ( + Connect("J2-36") + Connect("J15-19") + Connect("J24-15") + ) + Net("io_rx_01" "(unknown)") + ( + Connect("J2-34") + Connect("J15-18") + Connect("J24-13") + ) + Net("io_rx_02" "(unknown)") + ( + Connect("J2-32") + Connect("J15-17") + Connect("J24-11") + ) + Net("io_rx_03" "(unknown)") + ( + Connect("J2-30") + Connect("J15-16") + Connect("J24-9") + ) + Net("io_rx_04" "(unknown)") + ( + Connect("J2-28") + Connect("J15-15") + Connect("J24-7") + ) + Net("io_rx_05" "(unknown)") + ( + Connect("J2-26") + Connect("J15-14") + Connect("J24-5") + ) + Net("io_rx_06" "(unknown)") + ( + Connect("J2-24") + Connect("J15-13") + Connect("J24-3") + ) + Net("io_rx_07" "(unknown)") + ( + Connect("J2-22") + Connect("J15-12") + Connect("J24-1") + ) + Net("io_rx_08" "(unknown)") + ( + Connect("J2-20") + Connect("J15-11") + Connect("J25-15") + ) + Net("io_rx_09" "(unknown)") + ( + Connect("J2-18") + Connect("J15-10") + Connect("J25-13") + ) + Net("io_rx_10" "(unknown)") + ( + Connect("J2-16") + Connect("J15-9") + Connect("J25-11") + ) + Net("io_rx_11" "(unknown)") + ( + Connect("J2-14") + Connect("J15-8") + Connect("J25-9") + ) + Net("io_rx_12" "(unknown)") + ( + Connect("J2-12") + Connect("J15-7") + Connect("J25-7") + ) + Net("io_rx_13" "(unknown)") + ( + Connect("J2-10") + Connect("J15-6") + Connect("J25-5") + ) + Net("io_rx_14" "(unknown)") + ( + Connect("J2-8") + Connect("J15-5") + Connect("J25-3") + ) + Net("io_rx_15" "(unknown)") + ( + Connect("J2-6") + Connect("J15-4") + Connect("J25-1") + ) + Net("RESET" "(unknown)") + ( + Connect("J2-27") + Connect("J16-15") + ) + Net("RS232_RXD" "(unknown)") + ( + Connect("J2-25") + Connect("J16-10") + ) + Net("RS232_TXD" "(unknown)") + ( + Connect("J2-23") + Connect("J16-9") + ) + Net("SCL" "(unknown)") + ( + Connect("J2-15") + Connect("J16-7") + Connect("U1-6") + ) + Net("SCLK" "(unknown)") + ( + Connect("J2-29") + Connect("J16-12") + ) + Net("SDA" "(unknown)") + ( + Connect("J2-17") + Connect("J16-8") + Connect("U1-5") + ) + Net("SDI" "(unknown)") + ( + Connect("J2-33") + Connect("J16-13") + ) + Net("SDO" "(unknown)") + ( + Connect("J2-31") + Connect("J16-11") + ) + Net("SEN_RX" "(unknown)") + ( + Connect("J2-35") + Connect("J16-14") + ) + Net("unnamed_net1" "(unknown)") + ( + Connect("R28-2") + Connect("U1-7") + ) + Net("unnamed_net2" "(unknown)") + ( + Connect("J18-1") + Connect("R3-1") + Connect("R37-1") + ) + Net("unnamed_net3" "(unknown)") + ( + Connect("R4-1") + Connect("R38-2") + Connect("U3-5") + ) + Net("unnamed_net4" "(unknown)") + ( + Connect("R5-1") + Connect("R39-2") + Connect("U3-4") + ) + Net("unnamed_net5" "(unknown)") + ( + Connect("J19-1") + Connect("R9-1") + Connect("R30-1") + ) + Net("unnamed_net6" "(unknown)") + ( + Connect("R10-1") + Connect("R31-2") + Connect("U2-5") + ) + Net("unnamed_net7" "(unknown)") + ( + Connect("R11-1") + Connect("R34-2") + Connect("U2-4") + ) + Net("unnamed_net8" "(unknown)") + ( + Connect("R37-2") + Connect("R38-1") + Connect("U3-8") + ) + Net("unnamed_net9" "(unknown)") + ( + Connect("R36-2") + Connect("R39-1") + Connect("U3-1") + ) + Net("unnamed_net10" "(unknown)") + ( + Connect("R35-2") + Connect("R36-1") + ) + Net("unnamed_net11" "(unknown)") + ( + Connect("R30-2") + Connect("R31-1") + Connect("U2-8") + ) + Net("unnamed_net12" "(unknown)") + ( + Connect("R33-2") + Connect("R34-1") + Connect("U2-1") + ) + Net("unnamed_net13" "(unknown)") + ( + Connect("R32-2") + Connect("R33-1") + ) + Net("V_BIAS" "(unknown)") + ( + Connect("C24-1") + Connect("R6-2") + Connect("R7-1") + Connect("U2-2") + Connect("U3-2") + ) + Net("VINN_A" "(unknown)") + ( + Connect("C26-1") + Connect("J2-60") + Connect("R11-2") + ) + Net("VINN_B" "(unknown)") + ( + Connect("C23-1") + Connect("J2-52") + Connect("R5-2") + ) + Net("VINP_A" "(unknown)") + ( + Connect("C25-1") + Connect("J2-62") + Connect("R10-2") + ) + Net("VINP_B" "(unknown)") + ( + Connect("C22-1") + Connect("J2-50") + Connect("R4-2") + ) + Net("VREF" "(unknown)") + ( + Connect("J2-56") + ) +) diff --git a/usrp-hw/basic-lf/lfrx.prj b/usrp-hw/basic-lf/lfrx.prj new file mode 100644 index 000000000..5f20a95a5 --- /dev/null +++ b/usrp-hw/basic-lf/lfrx.prj @@ -0,0 +1,6 @@ +# List all schematics +schematics lfrx.sch + +output-name lfrx + +elements-dir ../pkg/newlib diff --git a/usrp-hw/basic-lf/lfrx.sch b/usrp-hw/basic-lf/lfrx.sch new file mode 100644 index 000000000..a5e2a8792 --- /dev/null +++ b/usrp-hw/basic-lf/lfrx.sch @@ -0,0 +1,1116 @@ +v 20050820 1 +C 75900 43000 1 180 1 pmc64.sym +{ +T 76600 29800 5 10 1 1 0 2 1 +refdes=J2 +T 75900 43000 5 10 0 1 90 6 1 +footprint=PMC-REVERSE +} +N 77400 37900 79100 37900 4 +{ +T 77700 37900 5 10 1 1 0 0 1 +netname=RS232_RXD +} +N 77400 38300 79100 38300 4 +{ +T 77700 38300 5 10 1 1 0 0 1 +netname=RS232_TXD +} +C 75800 30100 1 90 0 generic-power.sym +{ +T 75550 30300 5 10 1 1 90 3 1 +net=AGND:1 +} +N 75800 30300 76000 30300 4 +N 77400 39100 78700 39100 4 +{ +T 77800 39100 5 10 1 1 0 0 1 +netname=I2C_A1 +} +C 78000 42600 1 90 0 gnd-1.sym +N 77400 42700 77700 42700 4 +C 75400 42800 1 270 0 gnd-1.sym +N 76000 42700 75700 42700 4 +C 77600 30500 1 270 0 generic-power.sym +{ +T 77850 30300 5 10 1 1 270 3 1 +net=AGND:1 +} +N 77600 30300 77400 30300 4 +N 77400 35900 78600 35900 4 +{ +T 77500 35900 5 10 1 1 0 0 1 +netname=SEN_RX +} +C 75500 35600 1 270 0 gnd-1.sym +N 76000 35500 75800 35500 4 +C 77900 35400 1 90 0 gnd-1.sym +N 77400 35500 77600 35500 4 +C 75800 34500 1 90 0 generic-power.sym +{ +T 75550 34700 5 10 1 1 90 3 1 +net=AGND:1 +} +N 75800 34700 76000 34700 4 +C 77600 34900 1 270 0 generic-power.sym +{ +T 77850 34700 5 10 1 1 270 3 1 +net=AGND:1 +} +N 77600 34700 77400 34700 4 +N 77400 31100 79000 31100 4 +{ +T 77400 31100 5 10 1 1 0 0 1 +netname=AUX_ADC_A1 +} +N 77400 30700 79000 30700 4 +{ +T 77400 30700 5 10 1 1 0 0 1 +netname=AUX_ADC_B1 +} +C 75800 31300 1 90 0 generic-power.sym +{ +T 75550 31500 5 10 1 1 90 3 1 +net=AGND:1 +} +N 75800 31500 76000 31500 4 +C 75800 32100 1 90 0 generic-power.sym +{ +T 75550 32300 5 10 1 1 90 3 1 +net=AGND:1 +} +N 75800 32300 76000 32300 4 +C 75800 33300 1 90 0 generic-power.sym +{ +T 75550 33500 5 10 1 1 90 3 1 +net=AGND:1 +} +N 75800 33500 76000 33500 4 +N 74400 30700 76000 30700 4 +{ +T 74400 30700 5 10 1 1 0 0 1 +netname=VINP_A +} +N 74400 31100 76000 31100 4 +{ +T 74400 31100 5 10 1 1 0 0 1 +netname=VINN_A +} +N 74400 33100 76000 33100 4 +{ +T 74400 33100 5 10 1 1 0 0 1 +netname=VINP_B +} +N 74400 32700 76000 32700 4 +{ +T 74400 32700 5 10 1 1 0 0 1 +netname=VINN_B +} +N 76000 31900 74400 31900 4 +{ +T 74500 31900 5 10 1 1 0 0 1 +netname=VREF +} +C 77600 33700 1 270 0 generic-power.sym +{ +T 77850 33500 5 10 1 1 270 3 1 +net=AGND:1 +} +N 77600 33500 77400 33500 4 +C 78200 34100 1 270 0 generic-power.sym +{ +T 78450 33900 5 10 1 1 270 3 1 +net=AVDD:1 +} +N 77400 34300 77900 34300 4 +N 77400 33900 78200 33900 4 +C 77900 34500 1 270 0 generic-power.sym +{ +T 78150 34300 5 10 1 1 270 3 1 +net=AVDD:1 +} +C 78100 42500 1 270 0 generic-power.sym +{ +T 78350 42300 5 10 1 1 270 3 1 +net=5V:1 +} +C 75200 34100 1 90 1 generic-power.sym +{ +T 74950 33900 5 10 1 1 90 3 1 +net=AVDD:1 +} +N 76000 33900 75200 33900 4 +N 76000 34300 75500 34300 4 +C 75500 34500 1 90 1 generic-power.sym +{ +T 75250 34300 5 10 1 1 90 3 1 +net=AVDD:1 +} +N 77400 42300 78100 42300 4 +N 77400 41900 77900 41900 4 +C 77900 41300 1 270 0 generic-power.sym +{ +T 78150 41100 5 10 1 1 270 3 1 +net=DVDD:1 +} +N 77400 41100 77900 41100 4 +N 77400 41500 77700 41500 4 +N 77900 41900 77900 42300 4 +N 77700 41500 77700 41100 4 +N 74000 41900 76000 41900 4 +{ +T 74300 41900 5 10 1 1 0 0 1 +netname=io_rx_15 +} +N 74000 41500 76000 41500 4 +{ +T 74300 41500 5 10 1 1 0 0 1 +netname=io_rx_14 +} +N 74000 40300 76000 40300 4 +{ +T 74300 40300 5 10 1 1 0 0 1 +netname=io_rx_11 +} +N 74000 41100 76000 41100 4 +{ +T 74300 41100 5 10 1 1 0 0 1 +netname=io_rx_13 +} +N 74000 40700 76000 40700 4 +{ +T 74300 40700 5 10 1 1 0 0 1 +netname=io_rx_12 +} +N 74000 39100 76000 39100 4 +{ +T 74300 39100 5 10 1 1 0 0 1 +netname=io_rx_08 +} +N 74000 39900 76000 39900 4 +{ +T 74300 39900 5 10 1 1 0 0 1 +netname=io_rx_10 +} +N 74000 39500 76000 39500 4 +{ +T 74300 39500 5 10 1 1 0 0 1 +netname=io_rx_09 +} +N 74000 37900 76000 37900 4 +{ +T 74300 37900 5 10 1 1 0 0 1 +netname=io_rx_05 +} +N 74000 38700 76000 38700 4 +{ +T 74300 38700 5 10 1 1 0 0 1 +netname=io_rx_07 +} +N 74000 38300 76000 38300 4 +{ +T 74300 38300 5 10 1 1 0 0 1 +netname=io_rx_06 +} +N 74000 36700 76000 36700 4 +{ +T 74300 36700 5 10 1 1 0 0 1 +netname=io_rx_02 +} +N 74000 37500 76000 37500 4 +{ +T 74300 37500 5 10 1 1 0 0 1 +netname=io_rx_04 +} +N 74000 37100 76000 37100 4 +{ +T 74300 37100 5 10 1 1 0 0 1 +netname=io_rx_03 +} +N 74000 35900 76000 35900 4 +{ +T 74300 35900 5 10 1 1 0 0 1 +netname=io_rx_00 +} +N 74000 36300 76000 36300 4 +{ +T 74300 36300 5 10 1 1 0 0 1 +netname=io_rx_01 +} +C 65600 29400 0 0 0 title-bordered-C.sym +T 82500 30300 5 10 1 1 0 0 1 +date=$Date: 2006/01/13 18:46:59 $ +T 84400 30000 5 10 1 1 0 0 1 +rev=$Revision: 1.4 $ +T 84500 29700 5 10 1 1 0 0 1 +auth=$Author: matt $ +T 80300 30000 5 10 1 1 0 0 1 +fname=$Source: /opt/usrp-hw-cvs/usrp-hw/basic-lf/lfrx.sch,v $ +T 83700 30700 8 14 1 1 0 4 1 +title=LFRX Daughterboard +T 81300 29700 9 10 1 0 0 0 1 +1 +T 82100 29700 9 10 1 0 0 0 1 +1 +N 77400 40700 78800 40700 4 +{ +T 77600 40700 5 10 1 1 0 0 1 +netname=CLKOUT1 +} +N 77400 40300 78800 40300 4 +{ +T 77500 40300 5 10 1 1 0 0 1 +netname=CLKOUT2 +} +N 77400 39900 78500 39900 4 +{ +T 77700 39900 5 10 1 1 0 0 1 +netname=SCL +} +N 77400 39500 78500 39500 4 +{ +T 77700 39500 5 10 1 1 0 0 1 +netname=SDA +} +N 77400 37100 78800 37100 4 +{ +T 77800 37100 5 10 1 1 0 0 1 +netname=SCLK +} +N 77400 36700 78800 36700 4 +{ +T 77800 36700 5 10 1 1 0 0 1 +netname=SDO +} +N 77400 36300 78800 36300 4 +{ +T 77800 36300 5 10 1 1 0 0 1 +netname=SDI +} +N 77400 32700 79100 32700 4 +{ +T 77600 32700 5 10 1 1 0 0 1 +netname=AUX_DAC_A +} +N 77400 32300 79100 32300 4 +{ +T 77600 32300 5 10 1 1 0 0 1 +netname=AUX_DAC_B +} +N 77400 31900 79100 31900 4 +{ +T 77600 31900 5 10 1 1 0 0 1 +netname=AUX_DAC_C +} +N 77400 31500 79100 31500 4 +{ +T 77500 31500 5 10 1 1 0 0 1 +netname=AUX_ADC_REF +} +N 77400 33100 79100 33100 4 +{ +T 77600 33100 5 10 1 1 0 0 1 +netname=AUX_DAC_D +} +C 76300 44700 1 0 0 24Cxx-1.sym +{ +T 76800 45900 5 10 1 1 0 0 1 +refdes=U1 +T 76300 44700 5 10 0 1 0 0 1 +footprint=SO8 +T 76600 44500 5 10 1 1 0 0 1 +device=24LC025B +T 76600 44100 5 10 1 1 0 0 1 +net=GND:4 +T 76600 44300 5 10 1 1 0 0 1 +net=DVDD:8 +} +N 77600 45000 79000 45000 4 +{ +T 78500 45000 5 10 1 1 0 0 1 +netname=SCL +} +N 77600 44800 79000 44800 4 +{ +T 78500 44800 5 10 1 1 0 0 1 +netname=SDA +} +C 78600 45300 1 180 0 resistor-1.sym +{ +T 78500 45300 5 10 1 1 0 0 1 +value=0 +T 78600 45300 5 10 0 1 180 0 1 +footprint=0603 +T 77600 45300 5 10 1 1 0 0 1 +refdes=R28 +} +N 77600 45200 77700 45200 4 +C 79000 45100 1 90 0 gnd-1.sym +N 78600 45200 78700 45200 4 +C 69200 36700 1 0 0 header20-2.sym +{ +T 69800 40800 5 10 1 1 0 0 1 +refdes=J15 +T 69200 36700 5 10 0 1 0 0 1 +footprint=CONNECTOR 10 2 +} +C 71100 36800 1 90 0 gnd-1.sym +N 70600 36900 70800 36900 4 +N 67200 36900 69200 36900 4 +{ +T 67500 36900 5 10 1 1 0 0 1 +netname=io_rx_00 +} +N 70600 37300 72600 37300 4 +{ +T 70900 37300 5 10 1 1 0 0 1 +netname=io_rx_01 +} +N 67200 37300 69200 37300 4 +{ +T 67500 37300 5 10 1 1 0 0 1 +netname=io_rx_02 +} +N 67200 37700 69200 37700 4 +{ +T 67500 37700 5 10 1 1 0 0 1 +netname=io_rx_04 +} +N 67200 38100 69200 38100 4 +{ +T 67500 38100 5 10 1 1 0 0 1 +netname=io_rx_06 +} +N 67200 38500 69200 38500 4 +{ +T 67500 38500 5 10 1 1 0 0 1 +netname=io_rx_08 +} +N 67200 38900 69200 38900 4 +{ +T 67500 38900 5 10 1 1 0 0 1 +netname=io_rx_10 +} +N 67200 39300 69200 39300 4 +{ +T 67500 39300 5 10 1 1 0 0 1 +netname=io_rx_12 +} +N 67200 39700 69200 39700 4 +{ +T 67500 39700 5 10 1 1 0 0 1 +netname=io_rx_14 +} +N 70600 37700 72600 37700 4 +{ +T 70900 37700 5 10 1 1 0 0 1 +netname=io_rx_03 +} +N 70600 38100 72600 38100 4 +{ +T 70900 38100 5 10 1 1 0 0 1 +netname=io_rx_05 +} +N 70600 38500 72600 38500 4 +{ +T 70900 38500 5 10 1 1 0 0 1 +netname=io_rx_07 +} +N 70600 38900 72600 38900 4 +{ +T 70900 38900 5 10 1 1 0 0 1 +netname=io_rx_09 +} +N 70600 39300 72600 39300 4 +{ +T 70900 39300 5 10 1 1 0 0 1 +netname=io_rx_11 +} +N 70600 39700 72600 39700 4 +{ +T 70900 39700 5 10 1 1 0 0 1 +netname=io_rx_13 +} +N 70600 40100 72600 40100 4 +{ +T 70900 40100 5 10 1 1 0 0 1 +netname=io_rx_15 +} +N 77400 38700 78700 38700 4 +{ +T 77800 38700 5 10 1 1 0 0 1 +netname=I2C_A0 +} +N 75300 45200 76300 45200 4 +{ +T 75400 45200 5 10 1 1 0 0 1 +netname=I2C_A1 +} +N 75300 45400 76300 45400 4 +{ +T 75400 45400 5 10 1 1 0 0 1 +netname=I2C_A0 +} +C 75300 44800 1 90 0 generic-power.sym +{ +T 75050 45000 5 10 1 1 90 3 1 +net=DVDD:1 +} +N 75300 45000 76300 45000 4 +N 85800 44200 85000 44200 4 +{ +T 85800 44200 5 10 1 1 0 6 1 +netname=VINP_A +} +N 85800 43200 85000 43200 4 +{ +T 85800 43200 5 10 1 1 0 6 1 +netname=VINN_A +} +C 79100 38500 1 0 0 SMA-5.sym +{ +T 79100 39300 5 10 1 1 0 0 1 +refdes=J18 +T 79100 38500 5 10 0 1 0 6 1 +footprint=SMA_VERT +} +C 79000 36500 1 180 1 generic-power.sym +{ +T 79200 36250 5 10 1 1 180 3 1 +net=AGND:1 +} +N 79200 38500 79200 36500 4 +C 79600 38300 1 270 0 resistor-1.sym +{ +T 79900 37900 5 10 1 1 0 0 1 +refdes=R3 +T 79900 37600 5 10 1 1 0 0 1 +value=49.9 +T 79600 38300 5 10 0 1 270 0 1 +footprint=0603 +} +N 79600 39000 80900 39000 4 +N 79700 39000 79700 38300 4 +N 79700 36600 79700 37400 4 +C 84200 38900 1 0 0 resistor-1.sym +{ +T 84800 39300 5 10 1 1 180 0 1 +refdes=R4 +T 84800 38800 5 10 1 1 180 0 1 +value=49.9 +T 84200 38900 5 10 0 1 0 0 1 +footprint=0603 +} +C 84200 37900 1 0 0 resistor-1.sym +{ +T 84800 38300 5 10 1 1 180 0 1 +refdes=R5 +T 84800 37800 5 10 1 1 180 0 1 +value=49.9 +T 84200 37900 5 10 0 1 0 0 1 +footprint=0603 +} +C 85900 38800 1 0 0 capacitor-1.sym +{ +T 86500 39100 5 10 1 1 0 0 1 +refdes=C22 +T 86500 38700 5 10 1 1 0 0 1 +value=82pF +T 85900 38800 5 10 0 1 90 0 1 +footprint=0603 +} +C 85900 37800 1 0 0 capacitor-1.sym +{ +T 86500 38100 5 10 1 1 0 0 1 +refdes=C23 +T 86500 37700 5 10 1 1 0 0 1 +value=82pF +T 85900 37800 5 10 0 1 90 0 1 +footprint=0603 +} +C 87000 38800 1 270 1 generic-power.sym +{ +T 87250 39000 5 10 1 1 270 3 1 +net=AGND:1 +} +N 86800 39000 87000 39000 4 +C 87000 37800 1 270 1 generic-power.sym +{ +T 87250 38000 5 10 1 1 270 3 1 +net=AGND:1 +} +N 86800 38000 87000 38000 4 +N 84000 39000 84200 39000 4 +N 84000 38000 84200 38000 4 +C 83200 35100 1 0 1 generic-power.sym +{ +T 83000 35350 5 10 1 1 0 3 1 +net=AVDD:1 +} +C 83200 32100 1 180 0 generic-power.sym +{ +T 83000 31850 5 10 1 1 180 3 1 +net=AGND:1 +} +C 82900 34800 1 270 0 resistor-1.sym +{ +T 83300 34200 5 10 1 1 90 0 1 +refdes=R6 +T 82800 34200 5 10 1 1 90 0 1 +value=1K +T 82900 34800 5 10 0 1 270 0 1 +footprint=0603 +} +C 82100 33500 1 270 0 capacitor-1.sym +{ +T 82400 32900 5 10 1 1 270 0 1 +refdes=C24 +T 82000 32900 5 10 1 1 270 0 1 +value=.1uF +T 82100 33500 5 10 0 1 0 0 1 +footprint=0603 +} +C 82900 33500 1 270 0 resistor-1.sym +{ +T 83300 32900 5 10 1 1 90 0 1 +refdes=R7 +T 82800 32900 5 10 1 1 90 0 1 +value=1K +T 82900 33500 5 10 0 1 270 0 1 +footprint=0603 +} +N 83000 35100 83000 34800 4 +N 83000 33900 83000 33500 4 +N 83000 32600 83000 32100 4 +N 83000 32400 82300 32400 4 +N 82300 32400 82300 32600 4 +N 82300 33700 82300 33500 4 +N 85900 39000 85100 39000 4 +{ +T 85900 39000 5 10 1 1 0 6 1 +netname=VINP_B +} +N 85900 38000 85100 38000 4 +{ +T 85900 38000 5 10 1 1 0 6 1 +netname=VINN_B +} +C 79100 43700 1 0 0 SMA-5.sym +{ +T 79100 44500 5 10 1 1 0 0 1 +refdes=J19 +T 79100 43700 5 10 0 1 0 6 1 +footprint=SMA_VERT +} +C 79000 41400 1 180 1 generic-power.sym +{ +T 79200 41150 5 10 1 1 180 3 1 +net=AGND:1 +} +N 79200 43700 79200 41400 4 +C 79600 43600 1 270 0 resistor-1.sym +{ +T 79900 43400 5 10 1 1 0 0 1 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3500 500 4000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[2000 0 2000 3500 800] +) +Symbol['V' 1200] +( + SymbolLine[0 0 0 3000 800] + SymbolLine[0 3000 1000 4000 800] + SymbolLine[1000 4000 2000 3000 800] + SymbolLine[2000 0 2000 3000 800] +) +Symbol['W' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 4000 1500 2500 800] + SymbolLine[1500 2500 3000 4000 800] + SymbolLine[3000 0 3000 4000 800] +) +Symbol['X' 1200] +( + SymbolLine[0 0 0 500 800] + SymbolLine[0 500 2500 3000 800] + SymbolLine[2500 3000 2500 4000 800] + SymbolLine[0 3000 0 4000 800] + SymbolLine[0 3000 2500 500 800] + SymbolLine[2500 0 2500 500 800] +) +Symbol['Y' 1200] +( + SymbolLine[0 0 0 500 800] + SymbolLine[0 500 1000 1500 800] + SymbolLine[1000 1500 2000 500 800] + SymbolLine[2000 0 2000 500 800] + SymbolLine[1000 1500 1000 4000 800] +) +Symbol['Z' 1200] +( + SymbolLine[0 0 2500 0 800] + SymbolLine[2500 0 2500 500 800] + SymbolLine[0 3000 2500 500 800] + SymbolLine[0 3000 0 4000 800] + SymbolLine[0 4000 2500 4000 800] +) +Symbol['[' 1200] +( + SymbolLine[0 0 500 0 800] + SymbolLine[0 0 0 4000 800] + SymbolLine[0 4000 500 4000 800] +) +Symbol['\' 1200] +( + SymbolLine[0 500 3000 3500 800] +) +Symbol[']' 1200] +( + SymbolLine[0 0 500 0 800] + SymbolLine[500 0 500 4000 800] + SymbolLine[0 4000 500 4000 800] +) +Symbol['^' 1200] +( + SymbolLine[0 500 500 0 800] + SymbolLine[500 0 1000 500 800] +) +Symbol['_' 1200] +( + SymbolLine[0 4000 2000 4000 800] +) +Symbol['a' 1200] +( + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[2000 2000 2000 3500 800] + SymbolLine[2000 3500 2500 4000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] +) +Symbol['b' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[2000 2500 2000 3500 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[0 2500 500 2000 800] +) +Symbol['c' 1200] +( + SymbolLine[500 2000 2000 2000 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 2000 4000 800] +) +Symbol['d' 1200] +( + SymbolLine[2000 0 2000 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] +) +Symbol['e' 1200] +( + SymbolLine[500 4000 2000 4000 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[0 3000 2000 3000 800] + SymbolLine[2000 3000 2000 2500 800] +) +Symbol['f' 1000] +( + SymbolLine[500 500 500 4000 800] + SymbolLine[500 500 1000 0 800] + SymbolLine[1000 0 1500 0 800] + SymbolLine[0 2000 1000 2000 800] +) +Symbol['g' 1200] +( + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[0 5000 500 5500 800] + SymbolLine[500 5500 1500 5500 800] + SymbolLine[1500 5500 2000 5000 800] + SymbolLine[2000 2000 2000 5000 800] +) +Symbol['h' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[2000 2500 2000 4000 800] +) +Symbol['i' 1000] +( + SymbolLine[0 1000 0 1500 800] + SymbolLine[0 2500 0 4000 800] +) +Symbol['j' 1000] +( + SymbolLine[500 1000 500 1500 800] + SymbolLine[500 2500 500 5000 800] + SymbolLine[0 5500 500 5000 800] +) +Symbol['k' 1200] +( + SymbolLine[0 0 0 4000 800] + SymbolLine[0 2500 1500 4000 800] + SymbolLine[0 2500 1000 1500 800] +) +Symbol['l' 1000] +( + SymbolLine[0 0 0 3500 800] + SymbolLine[0 3500 500 4000 800] +) +Symbol['m' 1200] +( + SymbolLine[500 2500 500 4000 800] + SymbolLine[500 2500 1000 2000 800] + SymbolLine[1000 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[2000 2500 2000 4000 800] + SymbolLine[2000 2500 2500 2000 800] + SymbolLine[2500 2000 3000 2000 800] + SymbolLine[3000 2000 3500 2500 800] + SymbolLine[3500 2500 3500 4000 800] + SymbolLine[0 2000 500 2500 800] +) +Symbol['n' 1200] +( + SymbolLine[500 2500 500 4000 800] + SymbolLine[500 2500 1000 2000 800] + SymbolLine[1000 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[2000 2500 2000 4000 800] + SymbolLine[0 2000 500 2500 800] +) +Symbol['o' 1200] +( + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[2000 2500 2000 3500 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[0 3500 500 4000 800] +) +Symbol['p' 1200] +( + SymbolLine[500 2500 500 5500 800] + SymbolLine[0 2000 500 2500 800] + SymbolLine[500 2500 1000 2000 800] + SymbolLine[1000 2000 2000 2000 800] + SymbolLine[2000 2000 2500 2500 800] + SymbolLine[2500 2500 2500 3500 800] + SymbolLine[2000 4000 2500 3500 800] + SymbolLine[1000 4000 2000 4000 800] + SymbolLine[500 3500 1000 4000 800] +) +Symbol['q' 1200] +( + SymbolLine[2000 2500 2000 5500 800] + SymbolLine[1500 2000 2000 2500 800] + SymbolLine[500 2000 1500 2000 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[0 2500 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] +) +Symbol['r' 1200] +( + SymbolLine[500 2500 500 4000 800] + SymbolLine[500 2500 1000 2000 800] + SymbolLine[1000 2000 2000 2000 800] + SymbolLine[0 2000 500 2500 800] +) +Symbol['s' 1200] +( + SymbolLine[500 4000 2000 4000 800] + SymbolLine[2000 4000 2500 3500 800] + SymbolLine[2000 3000 2500 3500 800] + SymbolLine[500 3000 2000 3000 800] + SymbolLine[0 2500 500 3000 800] + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 2000 2000 800] + SymbolLine[2000 2000 2500 2500 800] + SymbolLine[0 3500 500 4000 800] +) +Symbol['t' 1000] +( + SymbolLine[500 0 500 3500 800] + SymbolLine[500 3500 1000 4000 800] + SymbolLine[0 1500 1000 1500 800] +) +Symbol['u' 1200] +( + SymbolLine[0 2000 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] + SymbolLine[2000 2000 2000 3500 800] +) +Symbol['v' 1200] +( + SymbolLine[0 2000 0 3000 800] + SymbolLine[0 3000 1000 4000 800] + SymbolLine[1000 4000 2000 3000 800] + SymbolLine[2000 2000 2000 3000 800] +) +Symbol['w' 1200] +( + SymbolLine[0 2000 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[500 4000 1000 4000 800] + SymbolLine[1000 4000 1500 3500 800] + SymbolLine[1500 2000 1500 3500 800] + SymbolLine[1500 3500 2000 4000 800] + SymbolLine[2000 4000 2500 4000 800] + SymbolLine[2500 4000 3000 3500 800] + SymbolLine[3000 2000 3000 3500 800] +) +Symbol['x' 1200] +( + SymbolLine[0 2000 2000 4000 800] + SymbolLine[0 4000 2000 2000 800] +) +Symbol['y' 1200] +( + SymbolLine[0 2000 0 3500 800] + SymbolLine[0 3500 500 4000 800] + SymbolLine[2000 2000 2000 5000 800] + SymbolLine[1500 5500 2000 5000 800] + SymbolLine[500 5500 1500 5500 800] + SymbolLine[0 5000 500 5500 800] + SymbolLine[500 4000 1500 4000 800] + SymbolLine[1500 4000 2000 3500 800] +) +Symbol['z' 1200] +( + SymbolLine[0 2000 2000 2000 800] + SymbolLine[0 4000 2000 2000 800] + SymbolLine[0 4000 2000 4000 800] +) +Symbol['{' 1200] +( + SymbolLine[500 500 1000 0 800] + SymbolLine[500 500 500 1500 800] + SymbolLine[0 2000 500 1500 800] + SymbolLine[0 2000 500 2500 800] + SymbolLine[500 2500 500 3500 800] + SymbolLine[500 3500 1000 4000 800] +) +Symbol['|' 1200] +( + SymbolLine[0 0 0 4000 800] +) +Symbol['}' 1200] +( + SymbolLine[0 0 500 500 800] + SymbolLine[500 500 500 1500 800] + SymbolLine[500 1500 1000 2000 800] + SymbolLine[500 2500 1000 2000 800] + SymbolLine[500 2500 500 3500 800] + SymbolLine[0 4000 500 3500 800] +) +Symbol['~' 1200] +( + SymbolLine[0 2500 500 2000 800] + SymbolLine[500 2000 1000 2000 800] + SymbolLine[1000 2000 1500 2500 800] + SymbolLine[1500 2500 2000 2500 800] + SymbolLine[2000 2500 2500 2000 800] +) +Via[15000 15000 13200 2000 0 12800 "" "hole"] +Via[260000 15000 13200 2000 0 12800 "" "hole"] +Via[260000 235000 13200 2000 0 12800 "" "hole"] +Via[111000 56000 4000 2000 0 2000 "" ""] +Via[166000 131000 4000 2000 0 2000 "" "thermal(1)"] +Via[189000 121000 4000 2000 0 2000 "" ""] +Via[201000 121000 4000 2000 0 2000 "" ""] +Via[197000 114000 4000 2000 0 2000 "" ""] +Via[149000 103000 4000 2000 0 2000 "" ""] +Via[146000 117000 4000 2000 0 2000 "" ""] +Via[130000 118000 4000 2000 0 2000 "" ""] +Via[134000 124000 4000 2000 0 2000 "" ""] +Via[55000 195000 13200 2000 0 12800 "" "hole"] +Via[108000 126000 4000 2000 0 2000 "" ""] +Via[90000 157000 4000 2000 0 2000 "" "thermal(1)"] +Via[184000 126000 4000 2000 0 2000 "" "thermal(1)"] +Via[174000 126000 4000 2000 0 2000 "" "thermal(1)"] +Via[148000 62000 4000 2000 0 2000 "" "thermal(1)"] +Via[90000 139000 4000 2000 0 2000 "" "thermal(1)"] +Via[62500 73000 6000 2000 0 3500 "" ""] +Via[53000 46500 6000 2000 0 3500 "" "thermal(1)"] +Via[53500 36500 6000 2000 0 3500 "" "thermal(1)"] +Via[63000 29000 6000 2000 0 3500 "" "thermal(1)"] +Via[103000 23500 6000 2000 0 3500 "" "thermal(1)"] +Via[114500 15000 6000 2000 0 3500 "" "thermal(1)"] +Via[124500 21500 6000 2000 0 3500 "" "thermal(1)"] +Via[152000 9500 6000 2000 0 3500 "" "thermal(1)"] +Via[159000 35000 6000 2000 0 3500 "" "thermal(1)"] +Via[69000 45500 4000 2000 0 2000 "" ""] +Via[77500 23000 4000 2000 0 2000 "" ""] +Via[217000 127000 4000 2000 0 2000 "" "thermal(1)"] +Via[259500 197000 6000 2000 0 2800 "" "thermal(1)"] +Via[154000 206500 6000 2000 0 2800 "" "thermal(1)"] +Via[203000 195500 6000 2000 0 2800 "" "thermal(1)"] +Via[209500 191000 3600 2000 0 2000 "" ""] +Via[216000 191500 3600 2000 0 2000 "" ""] +Via[180000 186000 3600 2000 0 2000 "" ""] +Via[177500 192500 3600 2000 0 2000 "" ""] +Via[147500 49000 6000 2000 0 3500 "" "thermal(2)"] +Via[169500 206500 6000 2000 0 3500 "" "thermal(2)"] +Via[137500 7500 6000 2000 0 3500 "" "thermal(2)"] +Via[180000 167500 6000 2000 0 3500 "" "thermal(2)"] +Via[235000 179000 6000 2000 0 3500 "" "thermal(2)"] +Via[225500 212000 6000 2000 0 3500 "" "thermal(2)"] + +Element["" "SO8" "U52" "unknown" 106000 57000 -14000 8000 0 100 ""] +( + Pad[-1900 0 900 0 2000 3000 2000 "1" "1" ""] + Pad[-1900 5000 900 5000 2000 3000 2000 "2" "2" "square"] + Pad[-1900 10000 900 10000 2000 3000 2000 "3" "3" "square"] + Pad[-1900 15000 900 15000 2000 3000 2000 "4" "4" "square"] + Pad[18500 15000 21300 15000 2000 3000 2000 "5" "5" "square,edge2"] + Pad[18500 10000 21300 10000 2000 3000 2000 "6" "6" "square,edge2"] + Pad[18500 5000 21300 5000 2000 3000 2000 "7" "7" "square,edge2"] + Pad[18500 0 21300 0 2000 3000 2000 "8" "8" "square,edge2"] + ElementLine [-2900 -2500 12200 -2500 1000] + ElementLine [7200 -2500 22300 -2500 1000] + ElementLine [22300 -2500 22300 17500 1000] + ElementLine [-2900 17500 22300 17500 1000] + ElementLine [-2900 -2500 -2900 17500 1000] + ElementArc [9700 -2500 2500 2500 0 180 1000] + + ) + +Element["" "0603" "R29" "0" 137000 62000 -5000 -9000 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "CONNECTOR-8-2" "J50" "unknown" 19000 137000 -3500 -81500 0 100 ""] +( + Pin[0 0 6000 3000 6600 4000 "1" "1" "square"] + Pin[-10000 0 6000 3000 6600 4000 "2" "2" "thermal(1)"] + Pin[0 -10000 6000 3000 6600 4000 "3" "3" ""] + Pin[-10000 -10000 6000 3000 6600 4000 "4" "4" "thermal(1)"] + Pin[0 -20000 6000 3000 6600 4000 "5" "5" ""] + Pin[-10000 -20000 6000 3000 6600 4000 "6" "6" "thermal(1)"] + Pin[0 -30000 6000 3000 6600 4000 "7" "7" ""] + Pin[-10000 -30000 6000 3000 6600 4000 "8" "8" "thermal(1)"] + Pin[0 -40000 6000 3000 6600 4000 "9" "9" ""] + Pin[-10000 -40000 6000 3000 6600 4000 "10" "10" "thermal(1)"] + Pin[0 -50000 6000 3000 6600 4000 "11" "11" ""] + Pin[-10000 -50000 6000 3000 6600 4000 "12" "12" "thermal(1)"] + Pin[0 -60000 6000 3000 6600 4000 "13" "13" ""] + Pin[-10000 -60000 6000 3000 6600 4000 "14" "14" "thermal(1)"] + Pin[0 -70000 6000 3000 6600 4000 "15" "15" ""] + Pin[-10000 -70000 6000 3000 6600 4000 "16" "16" "thermal(1)"] + ElementLine [-5000 -5000 -5000 5000 1000] + ElementLine [-5000 -5000 5000 -5000 1000] + ElementLine [-15000 5000 5000 5000 2000] + ElementLine [-15000 -75000 -15000 5000 2000] + ElementLine [-15000 -75000 5000 -75000 2000] + ElementLine [5000 -75000 5000 5000 2000] + + ) + +Element["" "SMA_VERT" "J49" "unknown" 169000 229500 -26500 -3500 0 100 ""] +( + Pin[0 0 9000 3000 9000 6000 "1" "1" ""] + Pin[-10000 10000 9000 3000 9000 6000 "2" "2" "thermal(1,6)"] + Pin[-10000 -10000 9000 3000 9000 6000 "3" "3" "thermal(1,6)"] + Pin[10000 10000 9000 3000 9000 6000 "4" "4" "thermal(1,6)"] + Pin[10000 -10000 9000 3000 9000 6000 "5" "5" "thermal(1,6)"] + ElementLine [-16000 -16000 16000 -16000 1000] + ElementLine [16000 -16000 16000 16000 1000] + ElementLine [16000 16000 -16000 16000 1000] + ElementLine [-16000 16000 -16000 -16000 1000] + + ) + +Element["" "CONNECTOR-8-2" "J46" "unknown" 86000 96000 77000 1000 0 100 ""] +( + Pin[0 0 6000 3000 6000 4000 "1" "1" "square,edge2"] + Pin[0 -10000 6000 3000 6000 4000 "2" "2" "edge2,thermal(1)"] + Pin[10000 0 6000 3000 6000 4000 "3" "3" "edge2"] + Pin[10000 -10000 6000 3000 6000 4000 "4" "4" "edge2,thermal(1)"] + Pin[20000 0 6000 3000 6000 4000 "5" "5" "edge2"] + Pin[20000 -10000 6000 3000 6000 4000 "6" "6" "edge2"] + Pin[30000 0 6000 3000 6000 4000 "7" "7" "edge2"] + Pin[30000 -10000 6000 3000 6000 4000 "8" "8" "edge2"] + Pin[40000 0 6000 3000 6000 4000 "9" "9" "edge2"] + Pin[40000 -10000 6000 3000 6000 4000 "10" "10" "edge2"] + Pin[50000 0 6000 3000 6000 4000 "11" "11" "edge2"] + Pin[50000 -10000 6000 3000 6000 4000 "12" "12" "edge2"] + Pin[60000 0 6000 3000 6000 4000 "13" "13" "edge2"] + Pin[60000 -10000 6000 3000 6000 4000 "14" "14" "edge2"] + Pin[70000 0 6000 3000 6000 4000 "15" "15" "edge2"] + Pin[70000 -10000 6000 3000 6000 4000 "16" "16" "edge2,thermal(1)"] + ElementLine [-5000 -5000 5000 -5000 1000] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 -15000 -5000 5000 2000] + ElementLine [-5000 -15000 75000 -15000 2000] + ElementLine [75000 -15000 75000 5000 2000] + ElementLine [-5000 5000 75000 5000 2000] + + ) + +Element["" "SMA_VERT" "J48" "unknown" 226000 231500 -26500 13000 0 100 ""] +( + Pin[0 0 9000 3000 9000 6000 "1" "1" ""] + Pin[-10000 10000 9000 3000 9000 6000 "2" "2" "thermal(1,6)"] + Pin[-10000 -10000 9000 3000 9000 6000 "3" "3" "thermal(1,6)"] + Pin[10000 10000 9000 3000 9000 6000 "4" "4" "thermal(1,6)"] + Pin[10000 -10000 9000 3000 9000 6000 "5" "5" "thermal(1,6)"] + ElementLine [-16000 -16000 16000 -16000 1000] + ElementLine [16000 -16000 16000 16000 1000] + ElementLine [16000 16000 -16000 16000 1000] + ElementLine [-16000 16000 -16000 -16000 1000] + + ) + +Element["" "1206" "FB2" "unknown" 134000 34000 -5000 7600 0 100 ""] +( + Pad[-4800 -1800 -4800 1800 4800 2000 5400 "1" "1" "square"] + Pad[4800 -1800 4800 1800 4800 2000 5400 "2" "2" "square"] + ElementLine [8400 -5400 -8400 -5400 1000] + ElementLine [8400 5400 8400 -5400 1000] + ElementLine [-8400 5400 8400 5400 1000] + ElementLine [-8400 -5400 -8400 5400 1000] + + ) + +Element["" "CONNECTOR-5-2" "J47" "unknown" 189000 96000 -17000 -12000 0 100 ""] +( + Pin[0 0 6000 3000 6000 4000 "1" "1" "square,edge2"] + Pin[0 -10000 6000 3000 6000 4000 "2" "2" "edge2"] + Pin[10000 0 6000 3000 6000 4000 "3" "3" "edge2"] + Pin[10000 -10000 6000 3000 6000 4000 "4" "4" "edge2"] + Pin[20000 0 6000 3000 6000 4000 "5" "5" "edge2"] + Pin[20000 -10000 6000 3000 6000 4000 "6" "6" "edge2"] + Pin[30000 0 6000 3000 6000 4000 "7" "7" "edge2"] + Pin[30000 -10000 6000 3000 6000 4000 "8" "8" "edge2"] + Pin[40000 0 6000 3000 6000 4000 "9" "9" "edge2,thermal(1,6)"] + Pin[40000 -10000 6000 3000 6000 4000 "10" "10" "edge2,thermal(1,6)"] + ElementLine [-5000 -5000 5000 -5000 1000] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 -15000 -5000 5000 2000] + ElementLine [-5000 -15000 45000 -15000 2000] + ElementLine [45000 -15000 45000 5000 2000] + ElementLine [-5000 5000 45000 5000 2000] + + ) + +Element["onsolder" "0603" "R35" "25" 186000 175500 -18000 -2500 2 100 "auto"] +( + Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "auto,square"] + Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "auto,square"] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + + ) + +Element["" "0603" "R37" "500" 158500 192500 -16500 -3000 0 100 ""] +( + Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "square"] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + + ) + +Element["" "0603" "R32" "500" 212500 197000 -12500 3500 0 100 ""] +( + Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "square"] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + + ) + +Element["onsolder" "0603" "R33" "25" 216000 176000 31500 -2500 2 100 "auto"] +( + Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "auto,square"] + Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "auto,square"] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + + ) + +Element["" "0603" "R34" "25" 247000 210000 3500 -5000 0 100 ""] +( + Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"] + ElementLine [-2700 4200 2700 4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [-2700 -4200 -2700 4200 600] + + ) + +Element["" "CONNECTOR-10-2" "J45" "unknown" 45000 237000 45000 -38000 0 100 ""] +( + Pin[0 0 6000 3000 6000 4000 "1" "1" "square,edge2"] + Pin[0 -10000 6000 3000 6000 4000 "2" "2" "edge2"] + Pin[10000 0 6000 3000 6000 4000 "3" "3" "edge2"] + Pin[10000 -10000 6000 3000 6000 4000 "4" "4" "edge2"] + Pin[20000 0 6000 3000 6000 4000 "5" "5" "edge2"] + Pin[20000 -10000 6000 3000 6000 4000 "6" "6" "edge2"] + Pin[30000 0 6000 3000 6000 4000 "7" "7" "edge2"] + Pin[30000 -10000 6000 3000 6000 4000 "8" "8" "edge2"] + Pin[40000 0 6000 3000 6000 4000 "9" "9" "edge2"] + Pin[40000 -10000 6000 3000 6000 4000 "10" "10" "edge2"] + Pin[50000 0 6000 3000 6000 4000 "11" "11" "edge2"] + Pin[50000 -10000 6000 3000 6000 4000 "12" "12" "edge2"] + Pin[60000 0 6000 3000 6000 4000 "13" "13" "edge2"] + Pin[60000 -10000 6000 3000 6000 4000 "14" "14" "edge2"] + Pin[70000 0 6000 3000 6000 4000 "15" "15" "edge2"] + Pin[70000 -10000 6000 3000 6000 4000 "16" "16" "edge2"] + Pin[80000 0 6000 3000 6000 4000 "17" "17" "edge2"] + Pin[80000 -10000 6000 3000 6000 4000 "18" "18" "edge2"] + Pin[90000 0 6000 3000 6000 4000 "19" "19" "edge2"] + Pin[90000 -10000 6000 3000 6000 4000 "20" "20" "edge2,thermal(1,6)"] + ElementLine [-5000 5000 95000 5000 2000] + ElementLine [95000 -15000 95000 5000 2000] + ElementLine [-5000 -15000 95000 -15000 2000] + ElementLine [-5000 -15000 -5000 5000 2000] + ElementLine [5000 -5000 5000 5000 1000] + ElementLine [-5000 -5000 5000 -5000 1000] + + ) + +Element["" "TSOT23-95P-280L1-6N__LTC_S6_Package" "U3" "unknown" 77500 29000 -15000 -7200 0 100 ""] +( + Pad[-6350 -3700 -3950 -3700 2400 2000 4400 "" "1" "square"] + Pad[-6350 0 -3950 0 2400 2000 4400 "" "2" "square"] + Pad[-6350 3700 -3950 3700 2400 2000 4400 "" "3" "square"] + Pad[3950 3700 6350 3700 2400 2000 4400 "" "4" "square,edge2"] + Pad[3950 0 6350 0 2400 2000 4400 "" "5" "square,edge2"] + Pad[3950 -3700 6350 -3700 2400 2000 4400 "" "6" "square,edge2"] + ElementLine [1750 5700 1750 2200 1000] + ElementLine [-1750 5700 1750 5700 1000] + ElementLine [-1750 2200 -1750 5700 1000] + ElementLine [1750 -5700 1750 -2200 1000] + ElementLine [-525 -5700 1750 -5700 1000] + ElementLine [-1750 -4475 -525 -5700 1000] + ElementLine [-1750 -2200 -1750 -4475 1000] + + ) + +Element["" "CONNECTOR-8-2" "J51" "unknown" 19000 238000 -1000 -82000 0 100 ""] +( + Pin[0 0 6000 3000 6600 4000 "1" "1" "square"] + Pin[-10000 0 6000 3000 6600 4000 "2" "2" "thermal(1)"] + Pin[0 -10000 6000 3000 6600 4000 "3" "3" ""] + Pin[-10000 -10000 6000 3000 6600 4000 "4" "4" "thermal(1)"] + Pin[0 -20000 6000 3000 6600 4000 "5" "5" ""] + Pin[-10000 -20000 6000 3000 6600 4000 "6" "6" "thermal(1)"] + Pin[0 -30000 6000 3000 6600 4000 "7" "7" ""] + Pin[-10000 -30000 6000 3000 6600 4000 "8" "8" "thermal(1)"] + Pin[0 -40000 6000 3000 6600 4000 "9" "9" ""] + Pin[-10000 -40000 6000 3000 6600 4000 "10" "10" "thermal(1)"] + Pin[0 -50000 6000 3000 6600 4000 "11" "11" ""] + Pin[-10000 -50000 6000 3000 6600 4000 "12" "12" "thermal(1)"] + Pin[0 -60000 6000 3000 6600 4000 "13" "13" ""] + Pin[-10000 -60000 6000 3000 6600 4000 "14" "14" "thermal(1)"] + Pin[0 -70000 6000 3000 6600 4000 "15" "15" ""] + Pin[-10000 -70000 6000 3000 6600 4000 "16" "16" "thermal(1)"] + ElementLine [-5000 -5000 -5000 5000 1000] + ElementLine [-5000 -5000 5000 -5000 1000] + ElementLine [-15000 5000 5000 5000 2000] + ElementLine [-15000 -75000 -15000 5000 2000] + ElementLine [-15000 -75000 5000 -75000 2000] + ElementLine [5000 -75000 5000 5000 2000] + + ) + +Element["" "0603" "R1" "68.1K" 76500 39500 5500 -1700 0 100 ""] +( + Pad[-2400 -900 -2400 900 2400 2000 3000 "1" "1" "square"] + Pad[2400 -900 2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [4200 -2700 -4200 -2700 600] + ElementLine [4200 2700 4200 -2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + + ) + +Element["" "0603" "R38" "25" 191000 214500 3500 -2700 0 100 ""] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "square"] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["onsolder" "0603" "R39" "25" 206500 176000 25000 -2200 2 100 "auto"] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "auto,square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "auto,square"] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "0603" "R2" "178K" 76500 54000 5000 -1700 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["onsolder" "0603" "R3" "225" 215000 184500 26700 3500 3 100 "auto"] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "auto,square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "auto,square"] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "0603" "R4" "500" 234000 204000 5500 -2200 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["onsolder" "0603" "R5" "225" 208500 184000 21700 3000 3 100 "auto"] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "auto,square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "auto,square"] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["onsolder" "0603" "R6" "225" 187500 183500 -20300 1000 3 100 "auto"] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "auto,square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "auto,square"] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "0603" "R7" "500" 181500 203000 5000 -1700 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["onsolder" "0603" "R8" "225" 194500 183500 -16300 1000 3 100 "auto"] +( + Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "auto,square"] + Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "auto,square"] + ElementLine [2700 -4200 2700 4200 600] + ElementLine [-2700 -4200 2700 -4200 600] + ElementLine [-2700 -4200 -2700 4200 600] + ElementLine [-2700 4200 2700 4200 600] + + ) + +Element["" "0603" "C1" "1uF" 76500 6500 -10200 3000 1 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "0603" "C2" "1uF" 62500 37000 -19500 -3200 0 100 ""] +( + Pad[-2400 -900 -2400 900 2400 2000 3000 "1" "1" "square"] + Pad[2400 -900 2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + + ) + +Element["" "1206" "C3" "10uF" 113000 29000 -3500 9600 0 100 ""] +( + Pad[-1800 4800 1800 4800 4800 2000 5400 "1" "1" "square"] + Pad[-1800 -4800 1800 -4800 4800 2000 5400 "2" "2" "square"] + ElementLine [-5400 -8400 -5400 8400 1000] + ElementLine [-5400 -8400 5400 -8400 1000] + ElementLine [5400 -8400 5400 8400 1000] + ElementLine [-5400 8400 5400 8400 1000] + + ) + +Element["" "0603" "C4" "22pF" 76500 46500 5500 -1700 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "0603" "C10" "220pF" 149500 38000 6000 1800 0 100 ""] +( + Pad[-2400 -900 -2400 900 2400 2000 3000 "1" "1" "square"] + Pad[2400 -900 2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [4200 -2700 -4200 -2700 600] + ElementLine [4200 2700 4200 -2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + + ) + +Element["" "1206" "C11" "10uF" 147500 19500 11000 -5400 0 100 ""] +( + Pad[-4800 -1800 -4800 1800 4800 2000 5400 "1" "1" "square"] + Pad[4800 -1800 4800 1800 4800 2000 5400 "2" "2" "square"] + ElementLine [8400 -5400 -8400 -5400 1000] + ElementLine [8400 5400 8400 -5400 1000] + ElementLine [-8400 5400 8400 5400 1000] + ElementLine [-8400 -5400 -8400 5400 1000] + + ) + +Element["" "0603" "C6" "0.1uF" 201000 187500 -1500 -8700 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "0603" "C12" "0.1uF" 149500 31000 6500 -3700 0 100 ""] +( + Pad[-2400 -900 -2400 900 2400 2000 3000 "1" "1" "square"] + Pad[2400 -900 2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [4200 -2700 -4200 -2700 600] + ElementLine [4200 2700 4200 -2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + + ) + +Element["onsolder" "0603" "C14" "20pF" 211000 168500 15000 -2200 2 100 "auto"] +( + Pad[-2400 -900 -2400 900 2400 2000 3000 "1" "1" "auto,square"] + Pad[2400 -900 2400 900 2400 2000 3000 "2" "2" "auto,square"] + ElementLine [4200 2700 -4200 2700 600] + ElementLine [4200 -2700 4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 2700 -4200 -2700 600] + + ) + +Element["" "0603" "C8" "0.1uF" 259500 189000 -2500 -7700 0 100 ""] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["onsolder" "0603" "C15" "20pF" 191500 168500 -15500 -2700 2 100 "auto"] +( + Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "auto,square"] + Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "auto,square"] + ElementLine [-4200 -2700 4200 -2700 600] + ElementLine [-4200 -2700 -4200 2700 600] + ElementLine [-4200 2700 4200 2700 600] + ElementLine [4200 -2700 4200 2700 600] + + ) + +Element["" "1206" "L1" "22uH" 78000 16500 -15500 -2400 0 100 ""] +( + Pad[4800 -1800 4800 1800 4800 2000 5400 "1" "1" "square"] + Pad[-4800 -1800 -4800 1800 4800 2000 5400 "2" "2" "square"] + ElementLine [-8400 5400 8400 5400 1000] + ElementLine [-8400 -5400 -8400 5400 1000] + ElementLine [-8400 -5400 8400 -5400 1000] + ElementLine [8400 -5400 8400 5400 1000] + + ) + +Element["" "1206" "L2" "22uH" 95000 34500 -4000 -13900 0 100 ""] +( + Pad[-1800 -4800 1800 -4800 4800 2000 5400 "1" "1" "square"] + Pad[-1800 4800 1800 4800 4800 2000 5400 "2" "2" "square"] + ElementLine [5400 -8400 5400 8400 1000] + ElementLine [-5400 8400 5400 8400 1000] + ElementLine [-5400 -8400 -5400 8400 1000] + ElementLine [-5400 -8400 5400 -8400 1000] + + ) + +Element["" "SO8" "U1" "unknown" 235500 191000 -1500 1000 0 100 ""] +( + Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "1" "1" "square"] + Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "2" "2" "square"] + Pad[-13500 2500 -7000 2500 2000 1000 3000 "3" "3" "square"] + Pad[-13500 7500 -7000 7500 2000 1000 3000 "4" "4" "square"] + Pad[7000 7500 13500 7500 2000 1000 3000 "5" "5" "square,edge2"] + Pad[7000 2500 13500 2500 2000 1000 3000 "6" "6" "square,edge2"] + Pad[7000 -2500 13500 -2500 2000 1000 3000 "7" "7" "square,edge2"] + Pad[7000 -7500 13500 -7500 2000 1000 3000 "8" "8" "square,edge2"] + ElementLine [15500 -9500 2500 -9500 1000] + ElementLine [-15500 -9500 -2500 -9500 1000] + ElementLine [15500 9500 15500 -9500 1000] + ElementLine [-15500 9500 15500 9500 1000] + ElementLine [-15500 -9500 -15500 9500 1000] + ElementArc [0 -9500 2500 2500 0 180 1000] + + ) + +Element["" "SO8" "U2" "unknown" 180000 190000 -3000 -15000 0 100 ""] +( + Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "1" "1" "square"] + Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "2" "2" "square"] + Pad[-13500 2500 -7000 2500 2000 1000 3000 "3" "3" "square"] + Pad[-13500 7500 -7000 7500 2000 1000 3000 "4" "4" "square"] + Pad[7000 7500 13500 7500 2000 1000 3000 "5" "5" "square,edge2"] + Pad[7000 2500 13500 2500 2000 1000 3000 "6" "6" "square,edge2"] + Pad[7000 -2500 13500 -2500 2000 1000 3000 "7" "7" "square,edge2"] + Pad[7000 -7500 13500 -7500 2000 1000 3000 "8" "8" "square,edge2"] + ElementLine [15500 -9500 2500 -9500 1000] + ElementLine [-15500 -9500 -2500 -9500 1000] + ElementLine [15500 9500 15500 -9500 1000] + ElementLine [-15500 9500 15500 9500 1000] + ElementLine [-15500 -9500 -15500 9500 1000] + ElementArc [0 -9500 2500 2500 0 180 1000] + + ) + +Element["onsolder" "PMC-REVERSE" "J44" "unknown" 94993 139811 -21000 12000 0 100 "auto"] +( + Pin[-6693 7189 7200 2000 7200 5600 "" "1" "hole,edge2"] + Pin[128740 7189 7200 2000 7200 5600 "" "2" "hole,edge2"] + Pad[0 9900 0 19000 2400 1000 3400 "" "1" "auto,edge2"] + Pad[122047 -4622 122047 4478 2400 1000 3400 "" "64" "auto"] + Pad[7874 9900 7874 19000 2400 1000 3400 "" "5" "auto,edge2"] + Pad[3937 9900 3937 19000 2400 1000 3400 "" "3" "auto,edge2"] + Pad[11811 9900 11811 19000 2400 1000 3400 "" "7" "auto,edge2"] + Pad[0 -4622 0 4478 2400 1000 3400 "" "2" "auto"] + Pad[15748 9900 15748 19000 2400 1000 3400 "" "9" "auto,edge2"] + Pad[7874 -4622 7874 4478 2400 1000 3400 "" "6" "auto"] + Pad[19685 9900 19685 19000 2400 1000 3400 "" "11" "auto,edge2"] + Pad[11811 -4622 11811 4478 2400 1000 3400 "" "8" "auto"] + Pad[23622 9900 23622 19000 2400 1000 3400 "" "13" "auto,edge2"] + Pad[15748 -4622 15748 4478 2400 1000 3400 "" "10" "auto"] + Pad[27559 9900 27559 19000 2400 1000 3400 "" "15" "auto,edge2"] + Pad[19685 -4622 19685 4478 2400 1000 3400 "" "12" "auto"] + Pad[31496 9900 31496 19000 2400 1000 3400 "" "17" "auto,edge2"] + Pad[23622 -4622 23622 4478 2400 1000 3400 "" "14" "auto"] + Pad[35433 9900 35433 19000 2400 1000 3400 "" "19" "auto,edge2"] + Pad[27559 -4622 27559 4478 2400 1000 3400 "" "16" "auto"] + Pad[39370 9900 39370 19000 2400 1000 3400 "" "21" "auto,edge2"] + Pad[31496 -4622 31496 4478 2400 1000 3400 "" "18" "auto"] + Pad[35433 -4622 35433 4478 2400 1000 3400 "" "20" "auto"] + Pad[39370 -4622 39370 4478 2400 1000 3400 "" "22" "auto"] + Pad[43307 -4622 43307 4478 2400 1000 3400 "" "24" "auto"] + Pad[47244 -4622 47244 4478 2400 1000 3400 "" "26" "auto"] + Pad[51181 -4622 51181 4478 2400 1000 3400 "" "28" "auto"] + Pad[55118 -4622 55118 4478 2400 1000 3400 "" "30" "auto"] + Pad[59055 -4622 59055 4478 2400 1000 3400 "" "32" "auto"] + Pad[62992 -4622 62992 4478 2400 1000 3400 "" "34" "auto"] + Pad[66929 -4622 66929 4478 2400 1000 3400 "" "36" "auto"] + Pad[70866 -4622 70866 4478 2400 1000 3400 "" "38" "auto"] + Pad[74803 -4622 74803 4478 2400 1000 3400 "" "40" "auto"] + Pad[78740 -4622 78740 4478 2400 1000 3400 "" "42" "auto"] + Pad[82677 -4622 82677 4478 2400 1000 3400 "" "44" "auto"] + Pad[86614 -4622 86614 4478 2400 1000 3400 "" "46" "auto"] + Pad[90551 -4622 90551 4478 2400 1000 3400 "" "48" "auto"] + Pad[98425 -4622 98425 4478 2400 1000 3400 "" "52" "auto"] + Pad[94488 -4622 94488 4478 2400 1000 3400 "" "50" "auto"] + Pad[102362 -4622 102362 4478 2400 1000 3400 "" "54" "auto"] + Pad[106299 -4622 106299 4478 2400 1000 3400 "" "56" "auto"] + Pad[110236 -4622 110236 4478 2400 1000 3400 "" "58" "auto"] + Pad[114173 -4622 114173 4478 2400 1000 3400 "" "60" "auto"] + Pad[3937 -4622 3937 4478 2400 1000 3400 "" "4" "auto"] + Pad[43307 9900 43307 19000 2400 1000 3400 "" "23" "auto,edge2"] + Pad[47244 9900 47244 19000 2400 1000 3400 "" "25" "auto,edge2"] + Pad[51181 9900 51181 19000 2400 1000 3400 "" "27" "auto,edge2"] + Pad[55118 9900 55118 19000 2400 1000 3400 "" "29" "auto,edge2"] + Pad[59055 9900 59055 19000 2400 1000 3400 "" "31" "auto,edge2"] + Pad[62992 9900 62992 19000 2400 1000 3400 "" "33" "auto,edge2"] + Pad[66929 9900 66929 19000 2400 1000 3400 "" "35" "auto,edge2"] + Pad[70866 9900 70866 19000 2400 1000 3400 "" "37" "auto,edge2"] + Pad[74803 9900 74803 19000 2400 1000 3400 "" "39" "auto,edge2"] + Pad[78740 9900 78740 19000 2400 1000 3400 "" "41" "auto,edge2"] + Pad[82677 9900 82677 19000 2400 1000 3400 "" "43" "auto,edge2"] + Pad[86614 9900 86614 19000 2400 1000 3400 "" "45" "auto,edge2"] + Pad[90551 9900 90551 19000 2400 1000 3400 "" "47" "auto,edge2"] + Pad[94488 9900 94488 19000 2400 1000 3400 "" "49" "auto,edge2"] + Pad[98425 9900 98425 19000 2400 1000 3400 "" "51" "auto,edge2"] + Pad[102362 9900 102362 19000 2400 1000 3400 "" "53" "auto,edge2"] + Pad[106299 9900 106299 19000 2400 1000 3400 "" "55" "auto,edge2"] + Pad[110236 9900 110236 19000 2400 1000 3400 "" "57" "auto,edge2"] + Pad[114173 9900 114173 19000 2400 1000 3400 "" "59" "auto,edge2"] + Pad[118110 9900 118110 19000 2400 1000 3400 "" "61" "auto,edge2"] + Pad[122047 9900 122047 19000 2400 1000 3400 "" "63" "auto,edge2"] + Pad[118110 -4622 118110 4478 2400 1000 3400 "" "62" "auto"] + ElementLine [134000 -9000 134000 24000 1000] + ElementLine [-11000 24000 134000 24000 1000] + ElementLine [-11000 -9000 134000 -9000 1000] + ElementLine [-11000 -9000 -11000 24000 1000] + + ) + +Element["" "0603" "C20" "0.1uF" 122000 32000 -2200 15500 1 100 ""] +( + Pad[-900 -2400 900 -2400 2400 2000 3000 "1" "1" "square"] + Pad[-900 2400 900 2400 2400 2000 3000 "2" "2" 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"GND-comp") +( +) +Layer(6 "Vcc-comp") +( +) +Layer(7 "unused") +( +) +Layer(8 "unused") +( +) +Layer(9 "silk") +( + Text[30000 16500 0 100 "BACKSILK" "auto"] +) +Layer(10 "silk") +( + Line[101000 131000 101000 73500 1000 2000 "found"] + Line[101000 73500 100500 73000 1000 2000 "found"] + Line[121500 131500 121500 75500 1000 2000 "found"] + Line[132500 133000 132500 71000 1000 2000 "found"] + Line[151500 129000 151500 66000 1000 2000 "found"] + Text[30000 20000 0 100 "SILK" ""] + Text[5500 161500 1 100 "DGND" ""] + Text[56500 137000 0 100 "DGND" ""] + Text[62000 144500 0 100 "DGND" ""] + Text[5500 60000 1 100 "DGND" ""] + Text[26000 115000 0 100 "io_tx[5]" ""] + Text[26000 125000 0 100 "io_tx[6]" ""] + Text[26500 134500 0 100 "io_tx[7]" ""] + Text[26000 95000 0 100 "io_tx[3]" ""] + Text[26500 105000 0 100 "io_tx[4]" ""] + Text[26000 66000 0 78 "io_tx[0]" ""] + Text[125000 132500 1 100 "232" ""] + Text[26500 85500 0 78 "io_tx[2]" ""] + Text[26000 176000 0 100 "io_tx[9]" ""] + Text[26000 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78 "io_tx[1]" ""] + Text[197000 79000 1 100 "DAC_A" ""] + Text[207000 79000 1 100 "DAC_B" ""] + Text[217000 79000 1 100 "DAC_C" ""] + Text[187000 79000 1 100 "DAC_D" ""] + Text[228000 79000 1 100 "AGND" ""] + Text[208000 119000 1 78 "ADC_A2" ""] + Text[218000 119000 1 78 "ADC_B2" ""] + Text[199000 121000 1 78 "ADC_REF" ""] + Text[228000 114000 1 78 "AGND" ""] + Text[183000 103000 0 78 "3.3VA" ""] + Text[84000 74500 0 100 "DGND" ""] + Text[85000 118000 1 100 "3.3VD" ""] + Text[94500 110500 1 100 "6V" ""] + Text[104500 111500 1 100 "A0" ""] + Text[114000 114500 1 100 "SCL" ""] + Text[125000 114000 1 100 "TXD" ""] + Text[134500 114500 1 100 "SDO" ""] + Text[144500 114500 1 100 "SDI" ""] + Text[154000 120000 1 100 "RESET" ""] + Text[154000 78500 1 78 "DGND" ""] + Text[144000 79000 1 78 "SEN_TX" ""] + Text[135000 78500 1 78 "SCLK" ""] + Text[121000 75500 0 78 "RXD" ""] + Text[103000 75500 0 78 "A1" ""] + Text[110000 75500 0 78 "SDA" ""] + Text[86000 122500 0 100 "PWR" ""] + Text[107000 118500 0 100 "I2C" ""] + Text[138500 123000 0 100 "SPI" ""] + Text[182000 27000 0 200 "LFTX v1.0" ""] + Text[182000 37000 0 100 "DC-30 MHz Transmitter" ""] + Text[182000 44000 0 100 "(c) 2006 Ettus Research LLC" ""] +) +NetList() +( + Net("3_3V_NEG" "(unknown)") + ( + Connect("C10-1") + Connect("C11-1") + Connect("C12-1") + Connect("C22-1") + Connect("C23-1") + Connect("FB2-2") + Connect("U1-4") + Connect("U2-4") + ) + Net("5V" "(unknown)") + ( + Connect("FB1-2") + Connect("J44-4") + Connect("J44-6") + Connect("J46-3") + ) + Net("AGND" "(unknown)") + ( + Connect("C2-1") + Connect("C3-2") + Connect("C5-1") + Connect("C6-1") + Connect("C8-1") + Connect("C10-2") + Connect("C11-2") + Connect("C12-2") + Connect("C20-1") + Connect("C21-1") + Connect("C22-2") + Connect("C23-2") + Connect("C31-2") + Connect("C32-2") + Connect("J44-41") + Connect("J44-42") + Connect("J44-47") + Connect("J44-48") + Connect("J44-53") + Connect("J44-57") + Connect("J44-63") + Connect("J44-64") + Connect("J47-9") + Connect("J47-10") + Connect("J48-2") + Connect("J48-3") + Connect("J48-4") + Connect("J48-5") + Connect("J49-2") + Connect("J49-3") + Connect("J49-4") + Connect("J49-5") + Connect("R32-2") + Connect("R33-2") + Connect("R35-2") + Connect("R36-2") + Connect("R37-2") + Connect("R39-2") + Connect("U3-2") + ) + Net("AUX_ADC_A2" "(unknown)") + ( + Connect("J44-60") + Connect("J47-5") + ) + Net("AUX_ADC_B2" "(unknown)") + ( + Connect("J44-62") + Connect("J47-7") + ) + Net("AUX_ADC_REF" "(unknown)") + ( + Connect("J44-58") + Connect("J47-3") + ) + Net("AUX_DAC_A" "(unknown)") + ( + Connect("J44-52") + Connect("J47-4") + ) + Net("AUX_DAC_B" "(unknown)") + ( + Connect("J44-54") + Connect("J47-6") + ) + Net("AUX_DAC_C" "(unknown)") + ( + Connect("J44-56") + Connect("J47-8") + ) + Net("AUX_DAC_D" "(unknown)") + ( + Connect("J44-50") + Connect("J47-2") + ) + Net("AVDD" "(unknown)") + ( + Connect("C6-2") + Connect("C8-2") + Connect("J44-43") + Connect("J44-44") + Connect("J44-45") + Connect("J44-46") + Connect("J47-1") + Connect("U1-7") + Connect("U2-7") + ) + Net("DVDD" "(unknown)") + ( + Connect("J44-8") + Connect("J44-10") + Connect("J46-1") + Connect("U52-3") + Connect("U52-8") + ) + Net("GND" "(unknown)") + ( + Connect("J44-1") + Connect("J44-2") + Connect("J44-37") + Connect("J44-38") + Connect("J45-20") + Connect("J46-2") + Connect("J46-4") + Connect("J46-16") + Connect("J50-2") + Connect("J50-4") + Connect("J50-6") + Connect("J50-8") + Connect("J50-10") + Connect("J50-12") + Connect("J50-14") + Connect("J50-16") + Connect("J51-2") + Connect("J51-4") + Connect("J51-6") + Connect("J51-8") + Connect("J51-10") + Connect("J51-12") + Connect("J51-14") + Connect("J51-16") + Connect("R29-1") + Connect("U52-4") + ) + Net("I2C_A0" "(unknown)") + ( + Connect("J44-22") + Connect("J46-5") + Connect("U52-1") + ) + Net("I2C_A1" "(unknown)") + ( + Connect("J44-20") + Connect("J46-6") + Connect("U52-2") + ) + Net("io_tx_00" "(unknown)") + ( + Connect("J44-35") + Connect("J45-19") + Connect("J50-15") + ) + Net("io_tx_01" "(unknown)") + ( + Connect("J44-33") + Connect("J45-18") + Connect("J50-13") + ) + Net("io_tx_02" "(unknown)") + ( + Connect("J44-31") + Connect("J45-17") + Connect("J50-11") + ) + Net("io_tx_03" "(unknown)") + ( + Connect("J44-29") + Connect("J45-16") + Connect("J50-9") + ) + Net("io_tx_04" "(unknown)") + ( + Connect("J44-27") + Connect("J45-15") + Connect("J50-7") + ) + Net("io_tx_05" "(unknown)") + ( + Connect("J44-25") + Connect("J45-14") + Connect("J50-5") + ) + Net("io_tx_06" "(unknown)") + ( + Connect("J44-23") + Connect("J45-13") + Connect("J50-3") + ) + Net("io_tx_07" "(unknown)") + ( + Connect("J44-21") + Connect("J45-12") + Connect("J50-1") + ) + Net("io_tx_08" "(unknown)") + ( + Connect("J44-19") + Connect("J45-11") + Connect("J51-15") + ) + Net("io_tx_09" "(unknown)") + ( + Connect("J44-17") + Connect("J45-10") + Connect("J51-13") + ) + Net("io_tx_10" "(unknown)") + ( + Connect("J44-15") + Connect("J45-9") + Connect("J51-11") + ) + Net("io_tx_11" "(unknown)") + ( + Connect("J44-13") + Connect("J45-8") + Connect("J51-9") + ) + Net("io_tx_12" "(unknown)") + ( + Connect("J44-11") + Connect("J45-7") + Connect("J51-7") + ) + Net("io_tx_13" "(unknown)") + ( + Connect("J44-9") + Connect("J45-6") + Connect("J51-5") + ) + Net("io_tx_14" "(unknown)") + ( + Connect("J44-7") + Connect("J45-5") + Connect("J51-3") + ) + Net("io_tx_15" "(unknown)") + ( + Connect("J44-5") + Connect("J45-4") + Connect("J51-1") + ) + Net("IOUTN_A" "(unknown)") + ( + Connect("C14-2") + Connect("J44-61") + Connect("R3-2") + Connect("R33-1") + ) + Net("IOUTN_B" "(unknown)") + ( + Connect("C15-2") + Connect("J44-49") + Connect("R6-2") + Connect("R35-1") + ) + Net("IOUTP_A" "(unknown)") + ( + Connect("C14-1") + Connect("J44-59") + Connect("R5-2") + Connect("R39-1") + ) + Net("IOUTP_B" "(unknown)") + ( + Connect("C15-1") + Connect("J44-51") + Connect("R8-2") + Connect("R36-1") + ) + Net("REFIO" "(unknown)") + ( + Connect("J44-55") + ) + Net("RESET" "(unknown)") + ( + Connect("J44-28") + Connect("J46-15") + ) + Net("RS232_RXD" "(unknown)") + ( + Connect("J44-26") + Connect("J46-10") + ) + Net("RS232_TXD" "(unknown)") + ( + Connect("J44-24") + Connect("J46-9") + ) + Net("SCL" "(unknown)") + ( + Connect("J44-16") + Connect("J46-7") + Connect("U52-6") + ) + Net("SCLK" "(unknown)") + ( + Connect("J44-30") + Connect("J46-12") + ) + Net("SDA" "(unknown)") + ( + Connect("J44-18") + Connect("J46-8") + Connect("U52-5") + ) + Net("SDI" "(unknown)") + ( + Connect("J44-34") + Connect("J46-13") + ) + Net("SDO" "(unknown)") + ( + Connect("J44-32") + Connect("J46-11") + ) + Net("SEN_TX" "(unknown)") + ( + Connect("J44-36") + Connect("J46-14") + ) + Net("unnamed_net1" "(unknown)") + ( + Connect("R29-2") + Connect("U52-7") + ) + Net("unnamed_net2" "(unknown)") + ( + Connect("J48-1") + Connect("R40-1") + ) + Net("unnamed_net3" "(unknown)") + ( + Connect("C33-2") + Connect("R4-1") + Connect("R34-2") + Connect("U1-6") + ) + Net("unnamed_net4" "(unknown)") + ( + Connect("C31-1") + Connect("R34-1") + Connect("R40-2") + ) + Net("unnamed_net5" "(unknown)") + ( + Connect("C1-2") + Connect("L1-2") + Connect("U3-1") + ) + Net("unnamed_net6" "(unknown)") + ( + Connect("C2-2") + Connect("C5-2") + Connect("FB1-1") + Connect("L1-1") + Connect("U3-6") + ) + Net("unnamed_net7" "(unknown)") + ( + Connect("C1-1") + Connect("L2-1") + Connect("U3-5") + ) + Net("unnamed_net8" "(unknown)") + ( + Connect("C4-2") + Connect("R1-1") + Connect("R2-2") + Connect("U3-3") + ) + Net("unnamed_net9" "(unknown)") + ( + Connect("R1-2") + Connect("U3-4") + ) + Net("unnamed_net10" "(unknown)") + ( + Connect("C3-1") + Connect("C4-1") + Connect("C20-2") + Connect("C21-2") + Connect("FB2-1") + Connect("L2-2") + Connect("R2-1") + ) + Net("unnamed_net11" "(unknown)") + ( + Connect("R5-1") + Connect("R32-1") + Connect("U1-3") + ) + Net("unnamed_net12" "(unknown)") + ( + Connect("C33-1") + Connect("R3-1") + Connect("R4-2") + Connect("U1-2") + ) + Net("unnamed_net13" "(unknown)") + ( + Connect("J49-1") + Connect("R41-1") + ) + Net("unnamed_net14" "(unknown)") + ( + Connect("C34-2") + Connect("R7-1") + Connect("R38-2") + Connect("U2-6") + ) + Net("unnamed_net15" "(unknown)") + ( + Connect("C32-1") + Connect("R38-1") + Connect("R41-2") + ) + Net("unnamed_net16" "(unknown)") + ( + Connect("R8-1") + Connect("R37-1") + Connect("U2-3") + ) + Net("unnamed_net17" "(unknown)") + ( + Connect("C34-1") + Connect("R6-1") + Connect("R7-2") + Connect("U2-2") + ) +) diff --git a/usrp-hw/basic-lf/lftx.prj b/usrp-hw/basic-lf/lftx.prj new file mode 100644 index 000000000..4068f7ae9 --- /dev/null +++ b/usrp-hw/basic-lf/lftx.prj @@ -0,0 +1,6 @@ +# List all schematics +schematics lftx.sch + +output-name lftx + +elements-dir ../pkg/newlib diff --git a/usrp-hw/basic-lf/lftx.sch b/usrp-hw/basic-lf/lftx.sch new file mode 100644 index 000000000..1b5cad7a8 --- /dev/null +++ b/usrp-hw/basic-lf/lftx.sch @@ -0,0 +1,1348 @@ +v 20050820 1 +C 78000 43300 1 180 0 pmc64.sym +{ +T 77300 30100 5 10 1 1 0 8 1 +refdes=J44 +T 78000 43300 5 10 0 1 270 2 1 +footprint=PMC-REVERSE +} +N 79500 38200 77900 38200 4 +{ +T 79400 38200 5 10 1 1 0 6 1 +netname=RS232_RXD +} +N 79500 38600 77900 38600 4 +{ +T 79400 38600 5 10 1 1 0 6 1 +netname=RS232_TXD +} +N 79000 39800 77900 39800 4 +{ +T 78700 39800 5 10 1 1 0 6 1 +netname=SDA +} +N 79000 40200 77900 40200 4 +{ +T 78700 40200 5 10 1 1 0 6 1 +netname=SCL +} +C 78400 41200 1 270 1 generic-power.sym +{ +T 78650 41400 5 10 1 1 90 5 1 +net=DVDD:1 +} +C 75900 42900 1 270 1 gnd-1.sym +N 76500 43000 76200 43000 4 +C 78500 43100 1 90 1 gnd-1.sym +N 77900 43000 78200 43000 4 +C 78100 30400 1 270 1 generic-power.sym +{ +T 78350 30600 5 10 1 1 90 5 1 +net=AGND:1 +} +N 78100 30600 77900 30600 4 +N 79300 37400 77900 37400 4 +{ +T 78900 37400 5 10 1 1 0 6 1 +netname=SCLK +} +N 79300 37800 77900 37800 4 +{ +T 78900 37800 5 10 1 1 0 6 1 +netname=RESET +} +N 79300 37000 77900 37000 4 +{ +T 78900 37000 5 10 1 1 0 6 1 +netname=SDO +} +N 79100 36200 77900 36200 4 +{ +T 79000 36200 5 10 1 1 0 6 1 +netname=SEN_TX +} +C 76000 35700 1 270 1 gnd-1.sym +N 76500 35800 76300 35800 4 +C 78400 35900 1 90 1 gnd-1.sym +N 77900 35800 78100 35800 4 +C 78100 34800 1 270 1 generic-power.sym +{ +T 78350 35000 5 10 1 1 90 5 1 +net=AGND:1 +} +N 78100 35000 77900 35000 4 +C 76300 35200 1 90 1 generic-power.sym +{ +T 76050 35000 5 10 1 1 270 5 1 +net=AGND:1 +} +N 76300 35000 76500 35000 4 +N 79300 36600 77900 36600 4 +{ +T 78900 36600 5 10 1 1 0 6 1 +netname=SDI +} +N 79600 33400 77900 33400 4 +{ +T 79400 33400 5 10 1 1 0 6 1 +netname=AUX_DAC_D +} +N 79600 33000 77900 33000 4 +{ +T 79400 33000 5 10 1 1 0 6 1 +netname=AUX_DAC_A +} +N 79600 32600 77900 32600 4 +{ +T 79400 32600 5 10 1 1 0 6 1 +netname=AUX_DAC_B +} +N 79600 32200 77900 32200 4 +{ +T 79400 32200 5 10 1 1 0 6 1 +netname=AUX_DAC_C +} +N 79500 31400 77900 31400 4 +{ +T 79500 31400 5 10 1 1 0 6 1 +netname=AUX_ADC_A2 +} +N 79600 31800 77900 31800 4 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75700 37400 5 10 1 1 0 6 1 +netname=io_tx_03 +} +N 76500 36200 74500 36200 4 +{ +T 75700 36200 5 10 1 1 0 6 1 +netname=io_tx_00 +} +N 76500 36600 74500 36600 4 +{ +T 75700 36600 5 10 1 1 0 6 1 +netname=io_tx_01 +} +C 65600 29400 0 0 0 title-bordered-C.sym +T 82500 30300 5 10 1 1 0 0 1 +date=$Date: 2006/02/23 18:07:25 $ +T 84400 30000 5 10 1 1 0 0 1 +rev=$Revision: 1.9 $ +T 84500 29700 5 10 1 1 0 0 1 +auth=$Author: matt $ +T 80300 30000 5 10 1 1 0 0 1 +fname=$Source: /opt/usrp-hw-cvs/usrp-hw/basic-lf/lftx.sch,v $ +T 83700 30700 8 14 1 1 0 4 1 +title=LFTX Daughterboard +T 81300 29700 9 10 1 0 0 0 1 +1 +T 82100 29700 9 10 1 0 0 0 1 +1 +C 76600 44600 1 0 0 24Cxx-1.sym +{ +T 77100 45800 5 10 1 1 0 0 1 +refdes=U52 +T 76600 44600 5 10 0 1 0 0 1 +footprint=SO8 +T 76900 44400 5 10 1 1 0 0 1 +device=24LC025B +T 76900 44000 5 10 1 1 0 0 1 +net=GND:4 +T 76900 44200 5 10 1 1 0 0 1 +net=DVDD:8 +} +N 77900 44900 79300 44900 4 +{ +T 78800 44900 5 10 1 1 0 0 1 +netname=SCL +} +N 77900 44700 79300 44700 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