3 files changed, 18 insertions, 2 deletions
diff --git a/gr-usrp/src/usrp_base.cc b/gr-usrp/src/usrp_base.cc
index 1709c7a44..a4cf64ed7 100644
--- a/gr-usrp/src/usrp_base.cc
+++ b/gr-usrp/src/usrp_base.cc
@@ -83,6 +83,12 @@ usrp_base::fpga_master_clock_freq() const
 }
 
 void
+usrp_base::set_fpga_master_clock_freq(long master_clock)
+{
+  d_usrp_basic->set_fpga_master_clock_freq(master_clock);
+}
+
+void
 usrp_base::set_verbose (bool verbose)
 {  
   d_usrp_basic->set_verbose (verbose);
diff --git a/gr-usrp/src/usrp_base.h b/gr-usrp/src/usrp_base.h
index 83aa699ab..c106739d0 100644
--- a/gr-usrp/src/usrp_base.h
+++ b/gr-usrp/src/usrp_base.h
@@ -98,7 +98,16 @@ public:
   /*!
    * \brief return frequency of master oscillator on USRP
    */
-  long  fpga_master_clock_freq() const;
+  long fpga_master_clock_freq() const;
+
+  /*!
+   * Tell API that the master oscillator on the USRP is operating at a non-standard 
+   * fixed frequency. This is only needed for custom USRP hardware modified to 
+   * operate at a different frequency from the default factory configuration. This
+   * function must be called prior to any other API function.
+   * \param master_clock USRP2 FPGA master clock frequency in Hz (10..64 MHz)
+   */
+  void set_fpga_master_clock_freq (long master_clock);
 
   void set_verbose (bool on);
 
diff --git a/gr-usrp/src/usrp_base.i b/gr-usrp/src/usrp_base.i
index 8f0c8368d..d0ece1fb2 100644
--- a/gr-usrp/src/usrp_base.i
+++ b/gr-usrp/src/usrp_base.i
@@ -38,7 +38,8 @@ public:
   db_base_sptr db(int which_side, int which_dev);
   %rename (_real_selected_subdev) selected_subdev;
   db_base_sptr selected_subdev(usrp_subdev_spec ss);
-  long  fpga_master_clock_freq() const;
+  long fpga_master_clock_freq() const;
+  void set_fpga_master_clock_freq(long master_clock);
   void set_verbose (bool on);
   static const int READ_FAILED = -99999;
   bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);