3 files changed, 7 insertions, 8 deletions
diff --git a/gr-usrp2/src/usrp2.i b/gr-usrp2/src/usrp2.i
index a484397f8..8d3e732ec 100644
--- a/gr-usrp2/src/usrp2.i
+++ b/gr-usrp2/src/usrp2.i
@@ -36,7 +36,7 @@
 
 %include <usrp2/tune_result.h>
 
-%template(uint8_t_vector) std::vector<uint8_t>;
+%template(uint32_t_vector) std::vector<uint32_t>;
 
 // ----------------------------------------------------------------
 
@@ -52,7 +52,7 @@ public:
   %rename(_real_fpga_master_clock_freq) fpga_master_clock_freq;
   bool fpga_master_clock_freq(long *freq);
   bool sync_to_pps();
-  std::vector<uint8_t> peek(uint32_t addr, uint32_t len);
+  std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
 };
 
 // ----------------------------------------------------------------
diff --git a/gr-usrp2/src/usrp2_base.cc b/gr-usrp2/src/usrp2_base.cc
index 443d1faaa..1f795421c 100644
--- a/gr-usrp2/src/usrp2_base.cc
+++ b/gr-usrp2/src/usrp2_base.cc
@@ -67,10 +67,10 @@ usrp2_base::sync_to_pps()
   return d_u2->sync_to_pps();
 }
 
-std::vector<uint8_t>
-usrp2_base::peek(uint32_t addr, uint32_t len)
+std::vector<uint32_t>
+usrp2_base::peek32(uint32_t addr, uint32_t words)
 {
-  return d_u2->peek(addr, len);
+  return d_u2->peek32(addr, words);
 }
 
 bool
diff --git a/gr-usrp2/src/usrp2_base.h b/gr-usrp2/src/usrp2_base.h
index 877437009..ed2a28fe1 100644
--- a/gr-usrp2/src/usrp2_base.h
+++ b/gr-usrp2/src/usrp2_base.h
@@ -63,11 +63,10 @@ public:
    */
   bool sync_to_pps();
 
-
   /*!
-   * \brief Read memory from Wishbone bus
+   * \brief Read memory from Wishbone bus as words
    */
-  std::vector<uint8_t> peek(uint32_t addr, uint32_t len);
+  std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
 
   /*!
    * \brief Called by scheduler when starting flowgraph