diff options
Diffstat (limited to 'gr-sounder')
44 files changed, 0 insertions, 3280 deletions
diff --git a/gr-sounder/.gitignore b/gr-sounder/.gitignore deleted file mode 100644 index b336cc7ce..000000000 --- a/gr-sounder/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -/Makefile -/Makefile.in diff --git a/gr-sounder/Makefile.am b/gr-sounder/Makefile.am deleted file mode 100644 index 40b11dcea..000000000 --- a/gr-sounder/Makefile.am +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright 2007 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - -SUBDIRS = src doc diff --git a/gr-sounder/README b/gr-sounder/README deleted file mode 100644 index 3c5df21d4..000000000 --- a/gr-sounder/README +++ /dev/null @@ -1,91 +0,0 @@ -This is a work-in-progress implementation of a m-sequence based channel -sounder for GNU Radio and the USRP. - -In typical use, the user would run the sounder as a transmitter on one -USRP, and a receiver on another at a different location. The receiver -will determine the impulse response of the RF channel in between. - -The sounder uses a custom FPGA bitstream that is able to generate and -receive a sounder waveform across a full 32 MHz wide swath of RF spectrum; -the waveform generation and impulse response processing occur in logic in -the USRP FPGA and not in the host PC. This avoids the USB throughput -bottleneck entirely. Unfortunately, there is still roll-off in the AD9862 -digital up-converter interpolation filter that impacts the outer 20% of -bandwidth, but this can be compensated for by measuring and subtracting -out this response during calibration. - -The sounder is based on sending a maximal-length PN code modulated as BPSK -with the supplied center frequency, with a chip-rate of 32 MHz. The -receiver correlates the received signal across all phases of the PN code -and outputs an impulse response vector. As auto-correlation of an m-sequence -is near zero for any relative phase shift, the actual measured energy at a -particular phase shift is related to the impulse response for that time delay. -This is the same principle used in spread-spectrum RAKE receivers such as are -used with GPS and CDMA. - -The transmitter is designed to work only with the board in side A. The -receiver may be in side A or side B. The boards may be standalone LFTX/LFRXs -or RFX daughterboards. - -To use, the following script is installed into $prefix/bin: - -Usage: usrp_sounder.py [options] - -Options: - -h, --help show this help message and exit - -R RX_SUBDEV_SPEC, --rx-subdev-spec=RX_SUBDEV_SPEC - select USRP Rx side A or B - -f FREQ, --frequency=FREQ - set frequency to FREQ in Hz, default is 0.0 - -d DEGREE, --degree=DEGREE - set sounding sequence degree (2-12), default is 12, - -t, --transmit enable sounding transmitter - -r, --receive enable sounding receiver - -l, --loopback enable digital loopback, default is disabled - -v, --verbose enable verbose output, default is disabled - -D, --debug enable debugging output, default is disabled - -F FILENAME, --filename=FILENAME - log received impulse responses to file - -To use with an LFTX board, set the center frequency to 16M: - -$ usrp_sounder.py -f 16M -t - -The sounder receiver command line is: - -$ usrp_sounder.py -f 16M -r -F output.dat - -You can vary the m-sequence degree between 2 and 12, which will create -sequence lengths between 3 and 4095 (128 us). This will affect -how frequently the receiver can calculate impulse response vectors. - -The correlator uses an O(N^2) algorithm, by using an entire PN period -of the received signal to correlate at each lag value. Thus, using a -degree 12 PN code of length 4095, it takes 4095*4095/32e6 seconds to -calculate a single impulse response vector, about a half a second. One -can reduce this time by a factor of 4 for each decrement in PN code -degree, but this also reduces the inherent processing gain by 6 dB as -well. - -The impulse response vectors are written to a file in complex float -format, and consist of the actual impulse response with a noise floor -dependent on the PN code degree in use. - -There is a loopback test mode that causes the sounding waveform to be -routed back to the receiver inside the USRP: - -$ usrp_sounder.py -r -t -l -F output.dat - -The resulting impulse response will be a spike followed by a near zero -value for the rest of the period. - -Synchronization at the receiver is not yet implemented, so the actual -impulse response may be time shifted an arbitrary value within the the -impulse response vector. If one assumes the first to arrive signal is -the strongest, then one can circularly rotate the vector until the peak -is at time zero. - -Johnathan Corgan -Corgan Enterprises LLC -jcorgan@corganenterprises.com -5/28/07 diff --git a/gr-sounder/doc/.gitignore b/gr-sounder/doc/.gitignore deleted file mode 100644 index b336cc7ce..000000000 --- a/gr-sounder/doc/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -/Makefile -/Makefile.in diff --git a/gr-sounder/doc/Makefile.am b/gr-sounder/doc/Makefile.am deleted file mode 100644 index 714ed52b9..000000000 --- a/gr-sounder/doc/Makefile.am +++ /dev/null @@ -1,23 +0,0 @@ -# -# Copyright 2007 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - diff --git a/gr-sounder/src/.gitignore b/gr-sounder/src/.gitignore deleted file mode 100644 index b336cc7ce..000000000 --- a/gr-sounder/src/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -/Makefile -/Makefile.in diff --git a/gr-sounder/src/Makefile.am b/gr-sounder/src/Makefile.am deleted file mode 100644 index d546da7f8..000000000 --- a/gr-sounder/src/Makefile.am +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright 2007 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - -SUBDIRS = fpga lib -if PYTHON -SUBDIRS += python -endif diff --git a/gr-sounder/src/fpga/.gitignore b/gr-sounder/src/fpga/.gitignore deleted file mode 100644 index b336cc7ce..000000000 --- a/gr-sounder/src/fpga/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -/Makefile -/Makefile.in diff --git a/gr-sounder/src/fpga/Makefile.am b/gr-sounder/src/fpga/Makefile.am deleted file mode 100644 index 85256cb5e..000000000 --- a/gr-sounder/src/fpga/Makefile.am +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright 2007 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - -SUBDIRS = top lib tb diff --git a/gr-sounder/src/fpga/lib/.gitignore b/gr-sounder/src/fpga/lib/.gitignore deleted file mode 100644 index b336cc7ce..000000000 --- a/gr-sounder/src/fpga/lib/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -/Makefile -/Makefile.in diff --git a/gr-sounder/src/fpga/lib/Makefile.am b/gr-sounder/src/fpga/lib/Makefile.am deleted file mode 100644 index a9586ebcc..000000000 --- a/gr-sounder/src/fpga/lib/Makefile.am +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright 2007,2009,2010 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - -EXTRA_DIST += \ - dac_interface.v \ - dacpll.v \ - sounder.v \ - sounder_ctrl.v \ - sounder_rx.v \ - sounder_tx.v diff --git a/gr-sounder/src/fpga/lib/dac_interface.v b/gr-sounder/src/fpga/lib/dac_interface.v deleted file mode 100644 index 93c72cca6..000000000 --- a/gr-sounder/src/fpga/lib/dac_interface.v +++ /dev/null @@ -1,60 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -`include "../top/config.vh" - -module dac_interface(clk_i,rst_i,ena_i,strobe_i,tx_i_i,tx_q_i,tx_data_o,tx_sync_o); - input clk_i; - input rst_i; - input ena_i; - input strobe_i; - - input [13:0] tx_i_i; - input [13:0] tx_q_i; - - output [13:0] tx_data_o; - output tx_sync_o; - -`ifdef TX_RATE_MAX - wire clk128; - reg clk64_d; - reg [13:0] tx_data_o; - - // Create a 128 MHz clock - dacpll pll128(.areset(rst_i),.inclk0(clk_i),.c0(clk128)); - - // Register the clk64 clock in the clk128 domain - always @(posedge clk128) - clk64_d <= #1 clk_i; - - // Register the tx data in the clk128 domain - always @(posedge clk128) - tx_data_o <= #1 clk64_d ? tx_i_i : tx_q_i; - - assign tx_sync_o = clk64_d; - - -`else // !`ifdef TX_RATE_MAX - assign tx_data_o = strobe_i ? tx_q_i : tx_i_i; - assign tx_sync_o = strobe_i; -`endif // !`ifdef TX_RATE_MAX - -endmodule // dac_interface diff --git a/gr-sounder/src/fpga/lib/dacpll.v b/gr-sounder/src/fpga/lib/dacpll.v deleted file mode 100644 index 25f584f4f..000000000 --- a/gr-sounder/src/fpga/lib/dacpll.v +++ /dev/null @@ -1,291 +0,0 @@ -// megafunction wizard: %ALTPLL% -// GENERATION: STANDARD -// VERSION: WM1.0 -// MODULE: altpll - -// ============================================================ -// File Name: dacpll.v -// Megafunction Name(s): -// altpll -// -// Simulation Library Files(s): -// altera_mf -// ============================================================ -// ************************************************************ -// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! -// -// 7.0 Build 33 02/05/2007 SJ Web Edition -// ************************************************************ - - -//Copyright (C) 1991-2007 Altera Corporation -//Your use of Altera Corporation's design tools, logic functions -//and other software and tools, and its AMPP partner logic -//functions, and any output files from any of the foregoing -//(including device programming or simulation files), and any -//associated documentation or information are expressly subject -//to the terms and conditions of the Altera Program License -//Subscription Agreement, Altera MegaCore Function License -//Agreement, or other applicable license agreement, including, -//without limitation, that your use is for the sole purpose of -//programming logic devices manufactured by Altera and sold by -//Altera or its authorized distributors. Please refer to the -//applicable agreement for further details. - - -// synopsys translate_off -`timescale 1 ps / 1 ps -// synopsys translate_on -module dacpll ( - areset, - inclk0, - c0); - - input areset; - input inclk0; - output c0; - - wire [5:0] sub_wire0; - wire [0:0] sub_wire4 = 1'h0; - wire [0:0] sub_wire1 = sub_wire0[0:0]; - wire c0 = sub_wire1; - wire sub_wire2 = inclk0; - wire [1:0] sub_wire3 = {sub_wire4, sub_wire2}; - - altpll altpll_component ( - .inclk (sub_wire3), - .areset (areset), - .clk (sub_wire0), - .activeclock (), - .clkbad (), - .clkena ({6{1'b1}}), - .clkloss (), - .clkswitch (1'b0), - .configupdate (1'b1), - .enable0 (), - .enable1 (), - .extclk (), - .extclkena ({4{1'b1}}), - .fbin (1'b1), - .fbout (), - .locked (), - .pfdena (1'b1), - .phasecounterselect ({4{1'b1}}), - .phasedone (), - .phasestep (1'b1), - .phaseupdown (1'b1), - .pllena (1'b1), - .scanaclr (1'b0), - .scanclk (1'b0), - .scanclkena (1'b1), - .scandata (1'b0), - .scandataout (), - .scandone (), - .scanread (1'b0), - .scanwrite (1'b0), - .sclkout0 (), - .sclkout1 (), - .vcooverrange (), - .vcounderrange ()); - defparam - altpll_component.clk0_divide_by = 1, - altpll_component.clk0_duty_cycle = 50, - altpll_component.clk0_multiply_by = 2, - altpll_component.clk0_phase_shift = "0000", - altpll_component.compensate_clock = "CLK0", - altpll_component.inclk0_input_frequency = 15625, - altpll_component.intended_device_family = "Cyclone", - altpll_component.lpm_type = "altpll", - altpll_component.operation_mode = "NORMAL", - altpll_component.pll_type = "AUTO", - altpll_component.port_activeclock = "PORT_UNUSED", - altpll_component.port_areset = "PORT_USED", - altpll_component.port_clkbad0 = "PORT_UNUSED", - altpll_component.port_clkbad1 = "PORT_UNUSED", - altpll_component.port_clkloss = "PORT_UNUSED", - altpll_component.port_clkswitch = "PORT_UNUSED", - altpll_component.port_configupdate = "PORT_UNUSED", - altpll_component.port_fbin = "PORT_UNUSED", - altpll_component.port_inclk0 = "PORT_USED", - altpll_component.port_inclk1 = "PORT_UNUSED", - altpll_component.port_locked = "PORT_UNUSED", - altpll_component.port_pfdena = "PORT_UNUSED", - altpll_component.port_phasecounterselect = "PORT_UNUSED", - altpll_component.port_phasedone = "PORT_UNUSED", - altpll_component.port_phasestep = "PORT_UNUSED", - altpll_component.port_phaseupdown = "PORT_UNUSED", - altpll_component.port_pllena = "PORT_UNUSED", - altpll_component.port_scanaclr = "PORT_UNUSED", - altpll_component.port_scanclk = "PORT_UNUSED", - altpll_component.port_scanclkena = "PORT_UNUSED", - altpll_component.port_scandata = "PORT_UNUSED", - altpll_component.port_scandataout = "PORT_UNUSED", - altpll_component.port_scandone = "PORT_UNUSED", - altpll_component.port_scanread = "PORT_UNUSED", - altpll_component.port_scanwrite = "PORT_UNUSED", - altpll_component.port_clk0 = "PORT_USED", - altpll_component.port_clk1 = "PORT_UNUSED", - altpll_component.port_clk3 = "PORT_UNUSED", - altpll_component.port_clk4 = "PORT_UNUSED", - altpll_component.port_clk5 = "PORT_UNUSED", - altpll_component.port_clkena0 = "PORT_UNUSED", - altpll_component.port_clkena1 = "PORT_UNUSED", - altpll_component.port_clkena3 = "PORT_UNUSED", - altpll_component.port_clkena4 = "PORT_UNUSED", - altpll_component.port_clkena5 = "PORT_UNUSED", - altpll_component.port_extclk0 = "PORT_UNUSED", - altpll_component.port_extclk1 = "PORT_UNUSED", - altpll_component.port_extclk2 = "PORT_UNUSED", - altpll_component.port_extclk3 = "PORT_UNUSED"; - - -endmodule - -// ============================================================ -// CNX file retrieval info -// ============================================================ -// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" -// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" -// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" -// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" -// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" -// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0" -// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" -// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" -// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" -// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" -// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" -// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" -// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" -// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" -// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0" -// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11" -// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" -// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone" -// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" -// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" -// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" -// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" -// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" -// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" -// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" -// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "64.000" -// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" -// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" -// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" -// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" -// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" -// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" -// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" -// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0" -// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" -// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "512.000" -// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" -// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" -// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" -// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "2" -// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" -// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000" -// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" -// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" -// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" -// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" -// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ns" -// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1" -// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" -// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" -// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" -// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" -// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" -// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" -// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" -// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" -// Retrieval info: PRIVATE: SPREAD_USE STRING "0" -// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" -// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" -// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" -// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: USE_CLK0 STRING "1" -// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" -// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" -// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all -// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" -// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" -// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2" -// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" -// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" -// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "15625" -// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" -// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" -// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" -// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" -// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" -// 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"PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" -// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]" -// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]" -// Retrieval info: USED_PORT: areset 0 0 0 0 INPUT GND "areset" -// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" -// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" -// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 -// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 -// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 -// Retrieval info: CONNECT: @areset 0 0 0 0 areset 0 0 0 0 -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll.v TRUE FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll.ppf TRUE FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll.inc FALSE FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll.cmp FALSE FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll.bsf TRUE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll_inst.v TRUE FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll_bb.v TRUE FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll_waveforms.html TRUE FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL dacpll_wave*.jpg FALSE FALSE -// Retrieval info: LIB_FILE: altera_mf diff --git a/gr-sounder/src/fpga/lib/lfsr.v b/gr-sounder/src/fpga/lib/lfsr.v deleted file mode 100644 index bd0743e9c..000000000 --- a/gr-sounder/src/fpga/lib/lfsr.v +++ /dev/null @@ -1,46 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -module lfsr(clk_i,rst_i,ena_i,strobe_i,mask_i,pn_o); - parameter width = 16; - - input clk_i; - input rst_i; - input ena_i; - input strobe_i; - input [width-1:0] mask_i; - - output pn_o; - - reg [width-1:0] shifter; - - wire parity = ^(shifter & mask_i); - - always @(posedge clk_i) - if (rst_i | ~ena_i) - shifter <= #5 1; - else - if (strobe_i) - shifter <= #5 {shifter[width-2:0],parity}; - - assign pn_o = shifter[0]; - -endmodule // lfsr diff --git a/gr-sounder/src/fpga/lib/lfsr_constants.v b/gr-sounder/src/fpga/lib/lfsr_constants.v deleted file mode 100644 index e23ed6601..000000000 --- a/gr-sounder/src/fpga/lib/lfsr_constants.v +++ /dev/null @@ -1,63 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -module lfsr_constants(clk_i,rst_i,degree_i,mask_o,len_o); - input clk_i; - input rst_i; - input [4:0] degree_i; - output reg [15:0] mask_o; - output reg [16:0] len_o; - - integer len; - - always @(posedge clk_i) - if (rst_i) - begin - len_o <= #5 17'b0; - mask_o <= #5 16'b0; - end - else - begin - len_o <= #5 ((1 << degree_i) << 1)-3; - - case (degree_i) - 5'd00: mask_o <= #5 16'h0000; - 5'd01: mask_o <= #5 16'h0001; - 5'd02: mask_o <= #5 16'h0003; - 5'd03: mask_o <= #5 16'h0005; - 5'd04: mask_o <= #5 16'h0009; - 5'd05: mask_o <= #5 16'h0012; - 5'd06: mask_o <= #5 16'h0021; - 5'd07: mask_o <= #5 16'h0041; - 5'd08: mask_o <= #5 16'h008E; - 5'd09: mask_o <= #5 16'h0108; - 5'd10: mask_o <= #5 16'h0204; - 5'd11: mask_o <= #5 16'h0402; - 5'd12: mask_o <= #5 16'h0829; - 5'd13: mask_o <= #5 16'h100D; - 5'd14: mask_o <= #5 16'h2015; - 5'd15: mask_o <= #5 16'h4001; - 5'd16: mask_o <= #5 16'h8016; - default: mask_o <= #5 16'h0000; - endcase // case(degree_i) - end // else: !if(rst_i) - -endmodule // lfsr_constants diff --git a/gr-sounder/src/fpga/lib/sounder.v b/gr-sounder/src/fpga/lib/sounder.v deleted file mode 100644 index 675be8881..000000000 --- a/gr-sounder/src/fpga/lib/sounder.v +++ /dev/null @@ -1,90 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -`include "../../../../usrp/firmware/include/fpga_regs_common.v" -`include "../../../../usrp/firmware/include/fpga_regs_standard.v" - -module sounder(clk_i, saddr_i, sdata_i, s_strobe_i, - tx_strobe_o, tx_dac_i_o, tx_dac_q_o, - rx_adc_i_i,rx_adc_q_i, - rx_strobe_o, rx_imp_i_o,rx_imp_q_o); - - // System interface - input clk_i; // Master clock @ 64 MHz - input [6:0] saddr_i; // Configuration bus address - input [31:0] sdata_i; // Configuration bus data - input s_strobe_i; // Configuration bus write - - // Transmit subsystem - output tx_strobe_o; // Generate an transmitter output sample - output [13:0] tx_dac_i_o; // I channel transmitter output to DAC - output [13:0] tx_dac_q_o; // Q channel transmitter output to DAC - - // Receive subsystem - output rx_strobe_o; // Indicates output samples ready for Rx FIFO - input [15:0] rx_adc_i_i; // I channel input from ADC interface module - input [15:0] rx_adc_q_i; // Q channel input from ADC interface module - output [15:0] rx_imp_i_o; // I channel impulse response to Rx FIFO - output [15:0] rx_imp_q_o; // Q channel impulse response to Rx FIFO - - // Internal variables - wire reset; - wire transmit; - wire receive; - wire loopback; - - wire [4:0] degree; - wire [13:0] ampl; - wire [15:0] mask; - - wire ref_strobe; - wire sum_strobe; - sounder_ctrl master(.clk_i(clk_i),.rst_i(reset),.saddr_i(saddr_i), - .sdata_i(sdata_i),.s_strobe_i(s_strobe_i), - .reset_o(reset),.transmit_o(transmit),.receive_o(receive),.loopback_o(loopback), - .degree_o(degree),.ampl_o(ampl),.mask_o(mask),.tx_strobe_o(tx_strobe_o), - .rx_strobe_o(rx_strobe_o),.sum_strobe_o(sum_strobe),.ref_strobe_o(ref_strobe)); - - // Loopback implementation - wire [13:0] tx_i, tx_q; - wire [15:0] tx_i_ext, tx_q_ext; - wire [15:0] rx_i, rx_q; - - sign_extend #(14,16) tx_i_extender(tx_i, tx_i_ext); - sign_extend #(14,16) tx_q_extender(tx_q, tx_q_ext); - - assign tx_dac_i_o = loopback ? 14'b0 : tx_i; - assign tx_dac_q_o = loopback ? 14'b0 : tx_q; - assign rx_i = loopback ? tx_i_ext : rx_adc_i_i; - assign rx_q = loopback ? tx_q_ext : rx_adc_q_i; - - sounder_tx transmitter - ( .clk_i(clk_i),.rst_i(reset),.ena_i(transmit), - .strobe_i(tx_strobe_o),.mask_i(mask),.ampl_i(ampl), - .tx_i_o(tx_i),.tx_q_o(tx_q) ); - - sounder_rx receiver - ( .clk_i(clk_i),.rst_i(reset),.ena_i(receive), - .sum_strobe_i(sum_strobe),.ref_strobe_i(ref_strobe), - .mask_i(mask),.degree_i(degree), - .rx_in_i_i(rx_i),.rx_in_q_i(rx_q),.rx_i_o(rx_imp_i_o),.rx_q_o(rx_imp_q_o)); - -endmodule // sounder diff --git a/gr-sounder/src/fpga/lib/sounder_ctrl.v b/gr-sounder/src/fpga/lib/sounder_ctrl.v deleted file mode 100644 index 6e967a5ba..000000000 --- a/gr-sounder/src/fpga/lib/sounder_ctrl.v +++ /dev/null @@ -1,97 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -`include "../../../../usrp/firmware/include/fpga_regs_common.v" -`include "../../../../usrp/firmware/include/fpga_regs_standard.v" - -module sounder_ctrl(clk_i,rst_i,saddr_i,sdata_i,s_strobe_i, - reset_o,transmit_o,receive_o,loopback_o, - degree_o,ampl_o,mask_o, - tx_strobe_o,rx_strobe_o,sum_strobe_o,ref_strobe_o); - - input clk_i; // Master clock @ 64 MHz - input rst_i; // Master synchronous reset - input [6:0] saddr_i; // Configuration bus address - input [31:0] sdata_i; // Configuration bus data - input s_strobe_i; // Configuration bus write - output reset_o; - output transmit_o; - output receive_o; - output loopback_o; - output [4:0] degree_o; - output [13:0] ampl_o; - output [15:0] mask_o; - output tx_strobe_o; - output rx_strobe_o; - output sum_strobe_o; - output ref_strobe_o; - - setting_reg #(`FR_USER_0) sr_mode - ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i), - .out({loopback_o,receive_o,transmit_o,reset_o}) ); - - setting_reg #(`FR_USER_1) sr_lfsr_degree - ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i), - .out(degree_o) ); - - setting_reg #(`FR_USER_2) sr_lfsr_ampl - ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i), - .out(ampl_o) ); - - wire [16:0] len; - lfsr_constants constants - (.clk_i(clk_i),.rst_i(rst_i),.degree_i(degree_o),.mask_o(mask_o), - .len_o(len) ); - - reg [15:0] phase; - assign tx_strobe_o = ~phase[0]; - assign ref_strobe_o = tx_strobe_o & !(phase>>1 == len>>1); - assign sum_strobe_o = (phase == len); - - reg rx_strobe_o; - always @(posedge clk_i) - if (rst_i) - begin - phase <= #5 16'hFFFF; - rx_strobe_o <= #5 0; - end - else - if (sum_strobe_o) - begin - phase <= #5 0; - rx_strobe_o <= #5 1'b1; - end - else - begin - phase <= #5 phase + 16'b1; - rx_strobe_o <= #5 0; - end - - - - - - - - - - -endmodule // sounder_ctrl diff --git a/gr-sounder/src/fpga/lib/sounder_rx.v b/gr-sounder/src/fpga/lib/sounder_rx.v deleted file mode 100644 index 18038a3a1..000000000 --- a/gr-sounder/src/fpga/lib/sounder_rx.v +++ /dev/null @@ -1,83 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -module sounder_rx(clk_i,rst_i,ena_i,sum_strobe_i,ref_strobe_i, - mask_i,degree_i,rx_in_i_i,rx_in_q_i,rx_i_o,rx_q_o); - - input clk_i; // Master clock - input rst_i; // Subsystem reset - input ena_i; // Subsystem enable - input sum_strobe_i; // Strobe on last sample per period - input ref_strobe_i; // PN code reference retarded one sample per period - - input [15:0] mask_i; // PN code LFSR mask - input [4:0] degree_i; // PN code LFSR sequency degree - - input [15:0] rx_in_i_i; // I channel on receive - input [15:0] rx_in_q_i; // Q channel on receive - - output [15:0] rx_i_o; // I channel of impulse response - output [15:0] rx_q_o; // Q channel of impulse response - - reg [31:0] sum_i, sum_q; - reg [31:0] total_i, total_q; - wire [31:0] i_ext, q_ext; - - sign_extend #(16,32) i_extender(rx_in_i_i, i_ext); - sign_extend #(16,32) q_extender(rx_in_q_i, q_ext); - - wire pn_ref; - lfsr ref_code - ( .clk_i(clk_i),.rst_i(rst_i),.ena_i(ena_i),.strobe_i(ref_strobe_i),.mask_i(mask_i),.pn_o(pn_ref) ); - - wire [31:0] prod_i = pn_ref ? i_ext : -i_ext; - wire [31:0] prod_q = pn_ref ? q_ext : -q_ext; - - always @(posedge clk_i) - if (rst_i | ~ena_i) - begin - sum_i <= #5 0; - sum_q <= #5 0; - total_i <= #5 0; - total_q <= #5 0; - end - else - if (sum_strobe_i) - begin - total_i <= #5 sum_i; - total_q <= #5 sum_q; - sum_i <= #5 prod_i; - sum_q <= #5 prod_q; - end - else - begin - sum_i <= #5 sum_i + prod_i; - sum_q <= #5 sum_q + prod_q; - end - - wire [5:0] offset = (5'd16-degree_i); - wire [31:0] scaled_i = total_i << offset; - wire [31:0] scaled_q = total_q << offset; - assign rx_i_o = scaled_i[31:16]; - assign rx_q_o = scaled_q[31:16]; - -endmodule // sounder_rx - diff --git a/gr-sounder/src/fpga/lib/sounder_tx.v b/gr-sounder/src/fpga/lib/sounder_tx.v deleted file mode 100644 index 148b1e500..000000000 --- a/gr-sounder/src/fpga/lib/sounder_tx.v +++ /dev/null @@ -1,44 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -`include "../../../../usrp/firmware/include/fpga_regs_common.v" -`include "../../../../usrp/firmware/include/fpga_regs_standard.v" - -module sounder_tx(clk_i,rst_i,ena_i,strobe_i,ampl_i,mask_i,tx_i_o,tx_q_o); - input clk_i; - input rst_i; - input ena_i; - input strobe_i; - input [13:0] ampl_i; - input [15:0] mask_i; - output [13:0] tx_i_o; - output [13:0] tx_q_o; - - wire pn; - wire [13:0] min_value = (~ampl_i)+14'b1; - - lfsr pn_code - ( .clk_i(clk_i),.rst_i(rst_i),.ena_i(ena_i),.strobe_i(strobe_i),.mask_i(mask_i),.pn_o(pn) ); - - assign tx_i_o = ena_i ? (pn ? ampl_i : min_value) : 14'b0; // Bipolar - assign tx_q_o = 14'b0; - -endmodule // sounder_tx diff --git a/gr-sounder/src/fpga/tb/.gitignore b/gr-sounder/src/fpga/tb/.gitignore deleted file mode 100644 index b05ab62aa..000000000 --- a/gr-sounder/src/fpga/tb/.gitignore +++ /dev/null @@ -1,5 +0,0 @@ -/Makefile -/Makefile.in -/*.vcd -/sounder_tb -/*.out* diff --git a/gr-sounder/src/fpga/tb/Makefile.am b/gr-sounder/src/fpga/tb/Makefile.am deleted file mode 100644 index b21cb5f96..000000000 --- a/gr-sounder/src/fpga/tb/Makefile.am +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright 2007,2009,2010 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - -EXTRA_DIST += \ - sounder_tb.v \ - sounder_tb.sav \ - sounder_tb.sh \ - sounder_tb_wave.sh - -MOSTLYCLEANFILES += *.vcd *.out* sounder_tb diff --git a/gr-sounder/src/fpga/tb/sounder_tb.sav b/gr-sounder/src/fpga/tb/sounder_tb.sav deleted file mode 100644 index 25bc512bc..000000000 --- a/gr-sounder/src/fpga/tb/sounder_tb.sav +++ /dev/null @@ -1,57 +0,0 @@ -*-29.807737 317080000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -@200 -- -@28 -sounder_tb.s_strobe -@22 -sounder_tb.saddr[6:0] -@200 -- -@28 -sounder_tb.uut.reset -sounder_tb.uut.transmit -sounder_tb.uut.receive -sounder_tb.uut.loopback -@200 -- -@22 -sounder_tb.uut.degree[4:0] -sounder_tb.uut.mask[15:0] -sounder_tb.uut.ampl[13:0] -sounder_tb.uut.receiver.offset[5:0] -@200 -- -@8420 -sounder_tb.tx_dac_i[13:0] -@28 -sounder_tb.tx_strobe -@200 -- -@8420 -sounder_tb.fifo_i[15:0] -@28 -sounder_tb.fifo_strobe -@200 -- -@28 -sounder_tb.uut.ref_strobe -sounder_tb.uut.sum_strobe -@200 -- -@28 -sounder_tb.clk -sounder_tb.uut.transmitter.pn -sounder_tb.uut.receiver.pn_ref -@8420 -sounder_tb.uut.receiver.prod_i[31:0] -sounder_tb.uut.receiver.scaled_i[31:0] -@8421 -sounder_tb.uut.receiver.sum_i[31:0] -@8420 -sounder_tb.uut.receiver.total_i[31:0] -@200 -- -@22 -sounder_tb.uut.master.len[16:0] -@200 -- diff --git a/gr-sounder/src/fpga/tb/sounder_tb.sh b/gr-sounder/src/fpga/tb/sounder_tb.sh deleted file mode 100755 index 28efc8d31..000000000 --- a/gr-sounder/src/fpga/tb/sounder_tb.sh +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh -iverilog -y ../lib/ -y ../../../../usrp/fpga/sdr_lib \ - sounder_tb.v -o sounder_tb && \ -./sounder_tb > sounder_tb.out && \ - grep 'r=0' sounder_tb.out | grep 'c=1' > sounder_tb.out2 - diff --git a/gr-sounder/src/fpga/tb/sounder_tb.v b/gr-sounder/src/fpga/tb/sounder_tb.v deleted file mode 100644 index 0e0cb55c2..000000000 --- a/gr-sounder/src/fpga/tb/sounder_tb.v +++ /dev/null @@ -1,238 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -`timescale 1ns/100ps - -`include "../lib/sounder.v" - -`define FR_MODE 7'd64 -`define bmFR_MODE_RESET 32'h0001 -`define bmFR_MODE_TX 32'h0002 -`define bmFR_MODE_RX 32'h0004 -`define bmFR_MODE_LP 32'h0008 - -`define FR_DEGREE 7'd65 -`define FR_AMPL 7'd66 - -module sounder_tb; - - // System bus - reg clk; - reg rst; - reg ena; - - // Configuration bus - reg [6:0] saddr; - reg [31:0] sdata; - reg s_strobe; - - // DAC bus - wire tx_strobe; - wire [13:0] tx_dac_i; - wire [13:0] tx_dac_q; - - // ADC bus - reg [15:0] rx_adc_i; - reg [15:0] rx_adc_q; - - // FIFO bus - wire fifo_strobe; - wire [15:0] fifo_i; - wire [15:0] fifo_q; - - // Configuration shadow registers - reg [31:0] mode; - reg [31:0] degree; - - sounder uut - (.clk_i(clk),.saddr_i(saddr),.sdata_i(sdata),.s_strobe_i(s_strobe), - .tx_strobe_o(tx_strobe),.tx_dac_i_o(tx_dac_i),.tx_dac_q_o(tx_dac_q), - .rx_strobe_o(fifo_strobe),.rx_adc_i_i(rx_adc_i),.rx_adc_q_i(rx_adc_q), - .rx_imp_i_o(fifo_i),.rx_imp_q_o(fifo_q)); - - // Start up initialization - initial - begin - clk = 0; - rst = 0; - ena = 0; - saddr = 0; - sdata = 0; - s_strobe = 0; - rx_adc_i = 0; - rx_adc_q = 0; - mode = 0; - degree = 0; - - @(posedge clk); - rst = 1; - @(posedge clk); - rst = 0; - @(posedge clk); - ena = 1; - end - - always - #5 clk <= ~clk; - - initial - begin - $monitor($time, " c=%b r=%b phs=%d txs=%b rfs=%b rxs=%b sms=%b pn=%b pnr=%b prd=%x sum=%x tot=%x", - clk, rst, uut.master.phase, uut.tx_strobe_o, uut.ref_strobe, uut.rx_strobe_o, - uut.sum_strobe, uut.transmitter.pn, uut.receiver.pn_ref, uut.receiver.prod_i, - uut.receiver.sum_i, uut.receiver.total_i); - - $dumpfile("sounder_tb.vcd"); - $dumpvars(0, sounder_tb); - end - - // Test tasks - task write_cfg_register; - input [6:0] regno; - input [31:0] value; - - begin - @(posedge clk); - saddr <= #5 regno; - sdata <= #5 value; - s_strobe <= #5 1'b1; - @(posedge clk); - s_strobe <= #5 0; - end - endtask // write_cfg_register - - // Application reset line - task set_reset; - input reset; - - begin - mode = reset ? (mode | `bmFR_MODE_RESET) : (mode & ~`bmFR_MODE_RESET); - write_cfg_register(`FR_MODE, mode); - end - endtask // reset - - // Set the PN code degree - task set_degree; - input [5:0] degree; - begin - write_cfg_register(`FR_DEGREE, degree); - end - endtask // set_degree - - // Set the PN amplitude - task set_amplitude; - input [13:0] ampl; - begin - write_cfg_register(`FR_AMPL, ampl); - end - endtask // set_ampl - - // Turn on or off the transmitter - task enable_tx; - input tx; - - begin - mode = tx ? (mode | `bmFR_MODE_TX) : (mode & ~`bmFR_MODE_TX); - write_cfg_register(`FR_MODE, mode); - end - endtask // enable_tx - - // Turn on or off the receiver - task enable_rx; - input rx; - - begin - mode = rx ? (mode | `bmFR_MODE_RX) : (mode & ~`bmFR_MODE_RX); - write_cfg_register(`FR_MODE, mode); - end - endtask // enable_rx - - - // Turn on or off digital loopback - task enable_lp; - input lp; - - begin - mode = lp ? (mode | `bmFR_MODE_LP) : (mode & ~`bmFR_MODE_LP); - write_cfg_register(`FR_MODE, mode); - end - endtask // enable_lp - - // Test transmitter functionality - task test_tx; - input [5:0] degree; - input [31:0] test_len; - - begin - #20 set_reset(1); - #20 set_degree(degree); - #20 set_amplitude(14'h1000); - #20 enable_tx(1); - #20 enable_rx(0); - #20 enable_lp(0); - #20 set_reset(0); - #(test_len); - end - endtask // test_tx - - // Test loopback functionality - task test_lp; - input [5:0] degree; - input [31:0] test_len; - - begin - #20 set_reset(1); - #20 set_degree(degree); - #20 enable_tx(1); - #20 enable_rx(1); - #20 enable_lp(1); - #20 set_reset(0); - #(test_len); - end - endtask // test_lp - - // Test receiver only functionality - task test_rx; - input [5:0] degree; - input [31:0] test_len; - - begin - #20 set_reset(1); - #20 set_degree(degree); - #20 enable_tx(0); - #20 enable_rx(1); - #20 enable_lp(0); - #20 set_reset(0); - #(test_len); - end - endtask // test_rx - - // Execute tests - initial - begin - #20 test_tx(8,255*20); - #20 test_lp(8,255*255*20*5); - //#20 test_rx(8,255*255*20*5); - #500 $finish; - end - -endmodule - diff --git a/gr-sounder/src/fpga/tb/sounder_tb_wave.sh b/gr-sounder/src/fpga/tb/sounder_tb_wave.sh deleted file mode 100755 index 4551d5c59..000000000 --- a/gr-sounder/src/fpga/tb/sounder_tb_wave.sh +++ /dev/null @@ -1,2 +0,0 @@ -#!/bin/sh -gtkwave sounder_tb.vcd sounder_tb.sav diff --git a/gr-sounder/src/fpga/top/.gitignore b/gr-sounder/src/fpga/top/.gitignore deleted file mode 100644 index 2c9458cf2..000000000 --- a/gr-sounder/src/fpga/top/.gitignore +++ /dev/null @@ -1,11 +0,0 @@ -/Makefile -/Makefile.in -/db -/*.rpt -/*.summary -/*.rbf -/*.qws -/*.smsg -/*.done -/*.pin -/*.sof diff --git a/gr-sounder/src/fpga/top/Makefile.am b/gr-sounder/src/fpga/top/Makefile.am deleted file mode 100644 index f559991de..000000000 --- a/gr-sounder/src/fpga/top/Makefile.am +++ /dev/null @@ -1,48 +0,0 @@ -# -# Copyright 2007,2009 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - -RBFS = usrp_sounder.rbf - -rbf2datadir = $(prefix)/share/usrp/rev2 -dist_rbf2data_DATA = $(RBFS) - -rbf4datadir = $(prefix)/share/usrp/rev4 -dist_rbf4data_DATA = $(RBFS) - -EXTRA_DIST += \ - config.vh \ - usrp_sounder.v \ - usrp_sounder.csf \ - usrp_sounder.esf \ - usrp_sounder.psf \ - usrp_sounder.qpf - -MOSTLYCLEANFILES += \ - db/* \ - *.rpt \ - *.summary \ - *.qws \ - *.smsg \ - *.done \ - *.pin \ - *.sof diff --git a/gr-sounder/src/fpga/top/config.vh b/gr-sounder/src/fpga/top/config.vh deleted file mode 100644 index 06445e9af..000000000 --- a/gr-sounder/src/fpga/top/config.vh +++ /dev/null @@ -1,22 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// -// Uncomment to enable 64 MHz Tx clock, otherwise 32 MHz -//`define TX_RATE_MAX diff --git a/gr-sounder/src/fpga/top/usrp_sounder.csf b/gr-sounder/src/fpga/top/usrp_sounder.csf deleted file mode 100644 index 544f278e3..000000000 --- a/gr-sounder/src/fpga/top/usrp_sounder.csf +++ /dev/null @@ -1,444 +0,0 @@ -COMPILER_SETTINGS -{ - IO_PLACEMENT_OPTIMIZATION = OFF; - ENABLE_DRC_SETTINGS = OFF; - PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF; - PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF; - PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF; - DRC_FANOUT_EXCEEDING = 30; - DRC_REPORT_FANOUT_EXCEEDING = OFF; - DRC_TOP_FANOUT = 50; - DRC_REPORT_TOP_FANOUT = OFF; - RUN_DRC_DURING_COMPILATION = OFF; - ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON; - ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF; - ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF; - ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF; - SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF; - MERGE_HEX_FILE = OFF; - TRUE_WYSIWYG_FLOW = OFF; - SEED = 1; - FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY; - FAMILY = Cyclone; - DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; - DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; - DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; - DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; - DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1"; - DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1"; - DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; - DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; - DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; - DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; - DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; - DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; - DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; - DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; - DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; - DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB"; - DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3"; - DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; - DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; - DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4"; - DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3"; - DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS"; - DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS"; - DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS"; - STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; - PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; - PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2"; - STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1"; - FAST_FIT_COMPILATION = OFF; - SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF; - OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = ON; - OPTIMIZE_TIMING = "NORMAL COMPILATION"; - OPTIMIZE_HOLD_TIMING = OFF; - COMPILATION_LEVEL = FULL; - SAVE_DISK_SPACE = OFF; - SPEED_DISK_USAGE_TRADEOFF = NORMAL; - LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF; - SIGNALPROBE_ALLOW_OVERUSE = OFF; - FOCUS_ENTITY_NAME = |usrp_sounder; - ROUTING_BACK_ANNOTATION_MODE = OFF; - INC_PLC_MODE = OFF; - FIT_ONLY_ONE_ATTEMPT = OFF; -} -DEFAULT_DEVICE_OPTIONS -{ - GENERATE_CONFIG_HEXOUT_FILE = OFF; - GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; - GENERATE_CONFIG_JBC_FILE = OFF; - GENERATE_CONFIG_JAM_FILE = OFF; - GENERATE_CONFIG_ISC_FILE = OFF; - GENERATE_CONFIG_SVF_FILE = OFF; - GENERATE_JBC_FILE_COMPRESSED = ON; - GENERATE_JBC_FILE = OFF; - GENERATE_JAM_FILE = OFF; - GENERATE_ISC_FILE = OFF; - GENERATE_SVF_FILE = OFF; - RESERVE_PIN = "AS INPUT TRI-STATED"; - RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND"; - HEXOUT_FILE_COUNT_DIRECTION = UP; - HEXOUT_FILE_START_ADDRESS = 0; - GENERATE_HEX_FILE = OFF; - GENERATE_RBF_FILE = OFF; - GENERATE_TTF_FILE = OFF; - RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; - RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; - AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; - EPROM_USE_CHECKSUM_AS_USERCODE = OFF; - FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - STRATIX_CONFIGURATION_DEVICE = AUTO; - CYCLONE_CONFIGURATION_DEVICE = AUTO; - FLEX10K_CONFIGURATION_DEVICE = AUTO; - FLEX6K_CONFIGURATION_DEVICE = AUTO; - MERCURY_CONFIGURATION_DEVICE = AUTO; - EXCALIBUR_CONFIGURATION_DEVICE = AUTO; - APEX20K_CONFIGURATION_DEVICE = AUTO; - USE_CONFIGURATION_DEVICE = ON; - ENABLE_INIT_DONE_OUTPUT = OFF; - FLEX10K_ENABLE_LOCK_OUTPUT = OFF; - ENABLE_DEVICE_WIDE_OE = OFF; - ENABLE_DEVICE_WIDE_RESET = OFF; - RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; - AUTO_RESTART_CONFIGURATION = OFF; - ENABLE_VREFB_PIN = OFF; - ENABLE_VREFA_PIN = OFF; - SECURITY_BIT = OFF; - USER_START_UP_CLOCK = OFF; - APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - CYCLONE_CONFIGURATION_SCHEME = "ACTIVE SERIAL"; - STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - STRATIX_UPDATE_MODE = STANDARD; - USE_CHECKSUM_AS_USERCODE = OFF; - MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; - MAX7000_JTAG_USER_CODE = FFFFFFFF; - FLEX10K_JTAG_USER_CODE = 7F; - MERCURY_JTAG_USER_CODE = FFFFFFFF; - APEX20K_JTAG_USER_CODE = FFFFFFFF; - STRATIX_JTAG_USER_CODE = FFFFFFFF; - MAX7000S_JTAG_USER_CODE = FFFF; - RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; - FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; - ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; - MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; - ENABLE_JTAG_BST_SUPPORT = OFF; - CONFIGURATION_CLOCK_DIVISOR = 1; - CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; - CLOCK_SOURCE = INTERNAL; - COMPRESSION_MODE = OFF; - ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; -} -AUTO_SLD_HUB_ENTITY -{ - AUTO_INSERT_SLD_HUB_ENTITY = ENABLE; - HUB_INSTANCE_NAME = SLD_HUB_INST; - HUB_ENTITY_NAME = SLD_HUB; -} -SIGNALTAP_LOGIC_ANALYZER_SETTINGS -{ - ENABLE_SIGNALTAP = Off; - AUTO_ENABLE_SMART_COMPILE = On; -} -CHIP(usrp_sounder) -{ - DEVICE = EP1C12Q240C8; - DEVICE_FILTER_PACKAGE = "ANY QFP"; - DEVICE_FILTER_PIN_COUNT = 240; - DEVICE_FILTER_SPEED_GRADE = ANY; - AUTO_RESTART_CONFIGURATION = OFF; - RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; - USER_START_UP_CLOCK = OFF; - ENABLE_DEVICE_WIDE_RESET = OFF; - ENABLE_DEVICE_WIDE_OE = OFF; - ENABLE_INIT_DONE_OUTPUT = OFF; - FLEX10K_ENABLE_LOCK_OUTPUT = OFF; - ENABLE_JTAG_BST_SUPPORT = OFF; - MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; - APEX20K_JTAG_USER_CODE = FFFFFFFF; - MERCURY_JTAG_USER_CODE = FFFFFFFF; - FLEX10K_JTAG_USER_CODE = 7F; - MAX7000_JTAG_USER_CODE = FFFFFFFF; - MAX7000S_JTAG_USER_CODE = FFFF; - STRATIX_JTAG_USER_CODE = FFFFFFFF; - APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - CYCLONE_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; - USE_CONFIGURATION_DEVICE = OFF; - APEX20K_CONFIGURATION_DEVICE = AUTO; - MERCURY_CONFIGURATION_DEVICE = AUTO; - FLEX6K_CONFIGURATION_DEVICE = AUTO; - FLEX10K_CONFIGURATION_DEVICE = AUTO; - EXCALIBUR_CONFIGURATION_DEVICE = AUTO; - STRATIX_CONFIGURATION_DEVICE = AUTO; - CYCLONE_CONFIGURATION_DEVICE = AUTO; - STRATIX_UPDATE_MODE = STANDARD; - APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; - AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; - DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; - COMPRESSION_MODE = OFF; - ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; - FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; - FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; - EPROM_USE_CHECKSUM_AS_USERCODE = OFF; - USE_CHECKSUM_AS_USERCODE = OFF; - MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; - GENERATE_TTF_FILE = OFF; - GENERATE_RBF_FILE = ON; - GENERATE_HEX_FILE = OFF; - SECURITY_BIT = OFF; - ENABLE_VREFA_PIN = OFF; - ENABLE_VREFB_PIN = OFF; - GENERATE_SVF_FILE = OFF; - GENERATE_ISC_FILE = OFF; - GENERATE_JAM_FILE = OFF; - GENERATE_JBC_FILE = OFF; - GENERATE_JBC_FILE_COMPRESSED = ON; - GENERATE_CONFIG_SVF_FILE = OFF; - GENERATE_CONFIG_ISC_FILE = OFF; - GENERATE_CONFIG_JAM_FILE = OFF; - GENERATE_CONFIG_JBC_FILE = OFF; - GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; - GENERATE_CONFIG_HEXOUT_FILE = OFF; - ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; - BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE = OFF; - HEXOUT_FILE_START_ADDRESS = 0; - HEXOUT_FILE_COUNT_DIRECTION = UP; - RESERVE_ALL_UNUSED_PINS = "AS INPUT TRI-STATED"; - STRATIX_DEVICE_IO_STANDARD = LVTTL; - CLOCK_SOURCE = INTERNAL; - CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; - CONFIGURATION_CLOCK_DIVISOR = 1; - RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; - RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; - SCLK : LOCATION = Pin_101; - SDI : LOCATION = Pin_100; - SEN : LOCATION = Pin_98; - SLD : LOCATION = Pin_95; - adc1_data[0] : LOCATION = Pin_5; - adc1_data[10] : LOCATION = Pin_235; - adc1_data[11] : LOCATION = Pin_234; - adc1_data[1] : LOCATION = Pin_4; - adc1_data[2] : LOCATION = Pin_3; - adc1_data[3] : LOCATION = Pin_2; - adc1_data[4] : LOCATION = Pin_1; - adc1_data[4] : IO_STANDARD = LVTTL; - adc1_data[5] : LOCATION = Pin_240; - adc1_data[6] : LOCATION = Pin_239; - adc1_data[7] : LOCATION = Pin_238; - adc1_data[8] : LOCATION = Pin_237; - adc1_data[9] : LOCATION = Pin_236; - adc2_data[0] : LOCATION = Pin_20; - adc2_data[10] : LOCATION = Pin_8; - adc2_data[11] : LOCATION = Pin_7; - adc2_data[1] : LOCATION = Pin_19; - adc2_data[2] : LOCATION = Pin_18; - adc2_data[3] : LOCATION = Pin_17; - adc2_data[4] : LOCATION = Pin_16; - adc2_data[5] : LOCATION = Pin_15; - adc2_data[6] : LOCATION = Pin_14; - adc2_data[7] : LOCATION = Pin_13; - adc2_data[8] : LOCATION = Pin_12; - adc2_data[9] : LOCATION = Pin_11; - adc3_data[0] : LOCATION = Pin_200; - adc3_data[10] : LOCATION = Pin_184; - adc3_data[11] : LOCATION = Pin_183; - adc3_data[1] : LOCATION = Pin_197; - adc3_data[2] : LOCATION = Pin_196; - adc3_data[3] : LOCATION = Pin_195; - adc3_data[4] : LOCATION = Pin_194; - adc3_data[5] : LOCATION = Pin_193; - adc3_data[6] : LOCATION = Pin_188; - adc3_data[7] : LOCATION = Pin_187; - adc3_data[8] : LOCATION = Pin_186; - adc3_data[9] : LOCATION = Pin_185; - adc4_data[0] : LOCATION = Pin_222; - adc4_data[10] : LOCATION = Pin_203; - adc4_data[11] : LOCATION = Pin_202; - adc4_data[1] : LOCATION = Pin_219; - adc4_data[2] : LOCATION = Pin_217; - adc4_data[3] : LOCATION = Pin_216; - adc4_data[4] : LOCATION = Pin_215; - adc4_data[5] : LOCATION = Pin_214; - adc4_data[6] : LOCATION = Pin_213; - adc4_data[7] : LOCATION = Pin_208; - adc4_data[8] : LOCATION = Pin_207; - adc4_data[9] : LOCATION = Pin_206; - adc_oeb[0] : LOCATION = Pin_228; - adc_oeb[1] : LOCATION = Pin_21; - adc_oeb[2] : LOCATION = Pin_181; - adc_oeb[3] : LOCATION = Pin_218; - adc_otr[0] : LOCATION = Pin_233; - adc_otr[1] : LOCATION = Pin_6; - adc_otr[2] : LOCATION = Pin_182; - adc_otr[3] : LOCATION = Pin_201; - adclk0 : LOCATION = Pin_224; - adclk1 : LOCATION = Pin_226; - clk0 : LOCATION = Pin_28; - clk0 : RESERVE_PIN = "AS INPUT TRI-STATED"; - clk0 : IO_STANDARD = LVTTL; - clk1 : LOCATION = Pin_29; - clk1 : RESERVE_PIN = "AS INPUT TRI-STATED"; - clk1 : IO_STANDARD = LVTTL; - clk3 : LOCATION = Pin_152; - clk3 : RESERVE_PIN = "AS INPUT TRI-STATED"; - clk3 : IO_STANDARD = LVTTL; - clk_120mhz : LOCATION = Pin_153; - clk_120mhz : IO_STANDARD = LVTTL; - clk_out : LOCATION = Pin_63; - clk_out : IO_STANDARD = LVTTL; - dac1_data[0] : LOCATION = Pin_165; - dac1_data[10] : LOCATION = Pin_177; - dac1_data[11] : LOCATION = Pin_178; - dac1_data[12] : LOCATION = Pin_179; - dac1_data[13] : LOCATION = Pin_180; - dac1_data[1] : LOCATION = Pin_166; - dac1_data[2] : LOCATION = Pin_167; - dac1_data[3] : LOCATION = Pin_168; - dac1_data[4] : LOCATION = Pin_169; - dac1_data[5] : LOCATION = Pin_170; - dac1_data[6] : LOCATION = Pin_173; - dac1_data[7] : LOCATION = Pin_174; - dac1_data[8] : LOCATION = Pin_175; - dac1_data[9] : LOCATION = Pin_176; - dac2_data[0] : LOCATION = Pin_159; - dac2_data[10] : LOCATION = Pin_163; - dac2_data[11] : LOCATION = Pin_139; - dac2_data[12] : LOCATION = Pin_164; - dac2_data[13] : LOCATION = Pin_138; - dac2_data[1] : LOCATION = Pin_158; - dac2_data[2] : LOCATION = Pin_160; - dac2_data[3] : LOCATION = Pin_156; - dac2_data[4] : LOCATION = Pin_161; - dac2_data[5] : LOCATION = Pin_144; - dac2_data[6] : LOCATION = Pin_162; - dac2_data[7] : LOCATION = Pin_141; - dac2_data[8] : LOCATION = Pin_143; - dac2_data[9] : LOCATION = Pin_140; - dac3_data[0] : LOCATION = Pin_122; - dac3_data[10] : LOCATION = Pin_134; - dac3_data[11] : LOCATION = Pin_135; - dac3_data[12] : LOCATION = Pin_136; - dac3_data[13] : LOCATION = Pin_137; - dac3_data[1] : LOCATION = Pin_123; - dac3_data[2] : LOCATION = Pin_124; - dac3_data[3] : LOCATION = Pin_125; - dac3_data[4] : LOCATION = Pin_126; - dac3_data[5] : LOCATION = Pin_127; - dac3_data[6] : LOCATION = Pin_128; - dac3_data[7] : LOCATION = Pin_131; - dac3_data[8] : LOCATION = Pin_132; - dac3_data[9] : LOCATION = Pin_133; - dac4_data[0] : LOCATION = Pin_104; - dac4_data[10] : LOCATION = Pin_118; - dac4_data[11] : LOCATION = Pin_119; - dac4_data[12] : LOCATION = Pin_120; - dac4_data[13] : LOCATION = Pin_121; - dac4_data[1] : LOCATION = Pin_105; - dac4_data[2] : LOCATION = Pin_106; - dac4_data[3] : LOCATION = Pin_107; - dac4_data[4] : LOCATION = Pin_108; - dac4_data[5] : LOCATION = Pin_113; - dac4_data[6] : LOCATION = Pin_114; - dac4_data[7] : LOCATION = Pin_115; - dac4_data[8] : LOCATION = Pin_116; - dac4_data[9] : LOCATION = Pin_117; - enable_rx : LOCATION = Pin_88; - enable_tx : LOCATION = Pin_93; - gndbus[0] : LOCATION = Pin_223; - gndbus[0] : RESERVE_PIN = "AS INPUT TRI-STATED"; - gndbus[0] : IO_STANDARD = LVTTL; - gndbus[1] : LOCATION = Pin_225; - gndbus[1] : RESERVE_PIN = "AS INPUT TRI-STATED"; - gndbus[1] : IO_STANDARD = LVTTL; - gndbus[2] : LOCATION = Pin_227; - gndbus[2] : RESERVE_PIN = "AS INPUT TRI-STATED"; - gndbus[2] : IO_STANDARD = LVTTL; - gndbus[3] : LOCATION = Pin_62; - gndbus[3] : RESERVE_PIN = "AS INPUT TRI-STATED"; - gndbus[3] : IO_STANDARD = LVTTL; - gndbus[4] : LOCATION = Pin_64; - gndbus[4] : RESERVE_PIN = "AS INPUT TRI-STATED"; - gndbus[4] : IO_STANDARD = LVTTL; - misc_pins[0] : LOCATION = Pin_87; - misc_pins[0] : IO_STANDARD = LVTTL; - misc_pins[10] : LOCATION = Pin_76; - misc_pins[10] : IO_STANDARD = LVTTL; - misc_pins[11] : LOCATION = Pin_74; - misc_pins[11] : IO_STANDARD = LVTTL; - misc_pins[1] : LOCATION = Pin_86; - misc_pins[1] : IO_STANDARD = LVTTL; - misc_pins[2] : LOCATION = Pin_85; - misc_pins[2] : IO_STANDARD = LVTTL; - misc_pins[3] : LOCATION = Pin_84; - misc_pins[3] : IO_STANDARD = LVTTL; - misc_pins[4] : LOCATION = Pin_83; - misc_pins[4] : IO_STANDARD = LVTTL; - misc_pins[5] : LOCATION = Pin_82; - misc_pins[5] : IO_STANDARD = LVTTL; - misc_pins[6] : LOCATION = Pin_79; - misc_pins[6] : IO_STANDARD = LVTTL; - misc_pins[7] : LOCATION = Pin_78; - misc_pins[7] : IO_STANDARD = LVTTL; - misc_pins[8] : LOCATION = Pin_77; - misc_pins[8] : IO_STANDARD = LVTTL; - misc_pins[9] : LOCATION = Pin_75; - misc_pins[9] : IO_STANDARD = LVTTL; - reset : LOCATION = Pin_94; - usbclk : LOCATION = Pin_55; - usbctl[0] : LOCATION = Pin_56; - usbctl[1] : LOCATION = Pin_54; - usbctl[2] : LOCATION = Pin_53; - usbctl[3] : LOCATION = Pin_58; - usbctl[4] : LOCATION = Pin_57; - usbctl[5] : LOCATION = Pin_44; - usbdata[0] : LOCATION = Pin_73; - usbdata[10] : LOCATION = Pin_41; - usbdata[11] : LOCATION = Pin_39; - usbdata[12] : LOCATION = Pin_38; - usbdata[12] : IO_STANDARD = LVTTL; - usbdata[13] : LOCATION = Pin_37; - usbdata[14] : LOCATION = Pin_24; - usbdata[15] : LOCATION = Pin_23; - usbdata[1] : LOCATION = Pin_68; - usbdata[2] : LOCATION = Pin_67; - usbdata[3] : LOCATION = Pin_66; - usbdata[4] : LOCATION = Pin_65; - usbdata[5] : LOCATION = Pin_61; - usbdata[6] : LOCATION = Pin_60; - usbdata[7] : LOCATION = Pin_59; - usbdata[8] : LOCATION = Pin_43; - usbdata[9] : LOCATION = Pin_42; - usbrdy[0] : LOCATION = Pin_45; - usbrdy[1] : LOCATION = Pin_46; - usbrdy[2] : LOCATION = Pin_47; - usbrdy[3] : LOCATION = Pin_48; - usbrdy[4] : LOCATION = Pin_49; - usbrdy[5] : LOCATION = Pin_50; - clear_status : LOCATION = Pin_99; -} diff --git a/gr-sounder/src/fpga/top/usrp_sounder.esf b/gr-sounder/src/fpga/top/usrp_sounder.esf deleted file mode 100644 index c7d828b2b..000000000 --- a/gr-sounder/src/fpga/top/usrp_sounder.esf +++ /dev/null @@ -1,14 +0,0 @@ -SIMULATOR_SETTINGS -{ - ESTIMATE_POWER_CONSUMPTION = OFF; - GLITCH_INTERVAL = 1NS; - GLITCH_DETECTION = OFF; - SIMULATION_COVERAGE = ON; - CHECK_OUTPUTS = OFF; - SETUP_HOLD_DETECTION = OFF; - POWER_ESTIMATION_START_TIME = "0 NS"; - ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS = ON; - SIMULATION_MODE = TIMING; - START_TIME = 0NS; - USE_COMPILER_SETTINGS = usrp_sounder; -} diff --git a/gr-sounder/src/fpga/top/usrp_sounder.psf b/gr-sounder/src/fpga/top/usrp_sounder.psf deleted file mode 100644 index 7bd32ff59..000000000 --- a/gr-sounder/src/fpga/top/usrp_sounder.psf +++ /dev/null @@ -1,312 +0,0 @@ -DEFAULT_DESIGN_ASSISTANT_SETTINGS -{ - HCPY_ALOAD_SIGNALS = OFF; - HCPY_VREF_PINS = OFF; - HCPY_CAT = OFF; - HCPY_ILLEGAL_HC_DEV_PKG = OFF; - ACLK_RULE_IMSZER_ADOMAIN = OFF; - ACLK_RULE_SZER_BTW_ACLK_DOMAIN = OFF; - ACLK_RULE_NO_SZER_ACLK_DOMAIN = OFF; - ACLK_CAT = OFF; - SIGNALRACE_RULE_ASYNCHPIN_SYNCH_CLKPIN = OFF; - SIGNALRACE_CAT = OFF; - NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED = OFF; - NONSYNCHSTRUCT_RULE_SRLATCH = OFF; - NONSYNCHSTRUCT_RULE_DLATCH = OFF; - NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR = OFF; - NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN = OFF; - NONSYNCHSTRUCT_RULE_RIPPLE_CLK = OFF; - NONSYNCHSTRUCT_RULE_DELAY_CHAIN = OFF; - NONSYNCHSTRUCT_RULE_REG_LOOP = OFF; - NONSYNCHSTRUCT_RULE_COMBLOOP = OFF; - NONSYNCHSTRUCT_CAT = OFF; - NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE = OFF; - TIMING_RULE_COIN_CLKEDGE = OFF; - TIMING_RULE_SHIFT_REG = OFF; - TIMING_RULE_HIGH_FANOUTS = OFF; - TIMING_CAT = OFF; - RESET_RULE_ALL = OFF; - RESET_RULE_IMSYNCH_ASYNCH_DOMAIN = OFF; - RESET_RULE_UNSYNCH_ASYNCH_DOMAIN = OFF; - RESET_RULE_REG_ASNYCH = OFF; - RESET_RULE_COMB_ASYNCH_RESET = OFF; - RESET_RULE_IMSYNCH_EXRESET = OFF; - RESET_RULE_UNSYNCH_EXRESET = OFF; - RESET_RULE_INPINS_RESETNET = OFF; - RESET_CAT = OFF; - CLK_RULE_ALL = OFF; - CLK_RULE_MIX_EDGES = OFF; - CLK_RULE_CLKNET_CLKSPINES = OFF; - CLK_RULE_INPINS_CLKNET = OFF; - CLK_RULE_GATING_SCHEME = OFF; - CLK_RULE_INV_CLOCK = OFF; - CLK_RULE_COMB_CLOCK = OFF; - CLK_CAT = OFF; - HCPY_EXCEED_USER_IO_USAGE = OFF; - HCPY_EXCEED_RAM_USAGE = OFF; - NONSYNCHSTRUCT_RULE_ASYN_RAM = OFF; - SIGNALRACE_RULE_TRISTATE = OFF; - ASSG_RULE_MISSING_TIMING = OFF; - ASSG_RULE_MISSING_FMAX = OFF; - ASSG_CAT = OFF; -} -SYNTHESIS_FITTING_SETTINGS -{ - AUTO_SHIFT_REGISTER_RECOGNITION = ON; - AUTO_DSP_RECOGNITION = ON; - AUTO_RAM_RECOGNITION = ON; - REMOVE_DUPLICATE_LOGIC = ON; - AUTO_TURBO_BIT = ON; - AUTO_MERGE_PLLS = ON; - AUTO_OPEN_DRAIN_PINS = ON; - AUTO_PARALLEL_EXPANDERS = ON; - AUTO_FAST_OUTPUT_ENABLE_REGISTERS = OFF; - AUTO_FAST_OUTPUT_REGISTERS = OFF; - AUTO_FAST_INPUT_REGISTERS = OFF; - AUTO_CASCADE_CHAINS = ON; - AUTO_CARRY_CHAINS = ON; - AUTO_DELAY_CHAINS = ON; - MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH = 4; - PARALLEL_EXPANDER_CHAIN_LENGTH = 16; - CASCADE_CHAIN_LENGTH = 2; - STRATIX_CARRY_CHAIN_LENGTH = 70; - MERCURY_CARRY_CHAIN_LENGTH = 48; - FLEX10K_CARRY_CHAIN_LENGTH = 32; - FLEX6K_CARRY_CHAIN_LENGTH = 32; - CARRY_CHAIN_LENGTH = 48; - CARRY_OUT_PINS_LCELL_INSERT = ON; - NORMAL_LCELL_INSERT = ON; - AUTO_LCELL_INSERTION = ON; - ALLOW_XOR_GATE_USAGE = ON; - AUTO_PACKED_REGISTERS_STRATIX = NORMAL; - AUTO_PACKED_REGISTERS = OFF; - AUTO_PACKED_REG_CYCLONE = NORMAL; - FLEX10K_OPTIMIZATION_TECHNIQUE = AREA; - FLEX6K_OPTIMIZATION_TECHNIQUE = AREA; - MERCURY_OPTIMIZATION_TECHNIQUE = AREA; - APEX20K_OPTIMIZATION_TECHNIQUE = SPEED; - MAX7000_OPTIMIZATION_TECHNIQUE = SPEED; - STRATIX_OPTIMIZATION_TECHNIQUE = SPEED; - CYCLONE_OPTIMIZATION_TECHNIQUE = AREA; - FLEX10K_TECHNOLOGY_MAPPER = LUT; - FLEX6K_TECHNOLOGY_MAPPER = LUT; - MERCURY_TECHNOLOGY_MAPPER = LUT; - APEX20K_TECHNOLOGY_MAPPER = LUT; - MAX7000_TECHNOLOGY_MAPPER = "PRODUCT TERM"; - STRATIX_TECHNOLOGY_MAPPER = LUT; - AUTO_IMPLEMENT_IN_ROM = OFF; - AUTO_GLOBAL_MEMORY_CONTROLS = OFF; - AUTO_GLOBAL_REGISTER_CONTROLS = ON; - AUTO_GLOBAL_OE = ON; - AUTO_GLOBAL_CLOCK = ON; - USE_LPM_FOR_AHDL_OPERATORS = ON; - LIMIT_AHDL_INTEGERS_TO_32_BITS = OFF; - ENABLE_BUS_HOLD_CIRCUITRY = OFF; - WEAK_PULL_UP_RESISTOR = OFF; - TURBO_BIT = ON; - MAX7000_IGNORE_SOFT_BUFFERS = OFF; - IGNORE_SOFT_BUFFERS = ON; - MAX7000_IGNORE_LCELL_BUFFERS = AUTO; - IGNORE_LCELL_BUFFERS = OFF; - IGNORE_ROW_GLOBAL_BUFFERS = OFF; - IGNORE_GLOBAL_BUFFERS = OFF; - IGNORE_CASCADE_BUFFERS = OFF; - IGNORE_CARRY_BUFFERS = OFF; - REMOVE_DUPLICATE_REGISTERS = ON; - REMOVE_REDUNDANT_LOGIC_CELLS = OFF; - ALLOW_POWER_UP_DONT_CARE = ON; - PCI_IO = OFF; - NOT_GATE_PUSH_BACK = ON; - SLOW_SLEW_RATE = OFF; - DSP_BLOCK_BALANCING = AUTO; - STATE_MACHINE_PROCESSING = AUTO; -} -DEFAULT_HARDCOPY_SETTINGS -{ - HARDCOPY_EXTERNAL_CLOCK_JITTER = "0.0 NS"; -} -DEFAULT_TIMING_REQUIREMENTS -{ - INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; - RUN_ALL_TIMING_ANALYSES = ON; - IGNORE_CLOCK_SETTINGS = OFF; - DEFAULT_HOLD_MULTICYCLE = "SAME AS MULTICYCLE"; - CUT_OFF_IO_PIN_FEEDBACK = ON; - CUT_OFF_CLEAR_AND_PRESET_PATHS = ON; - CUT_OFF_READ_DURING_WRITE_PATHS = ON; - CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS = ON; - DO_MIN_ANALYSIS = ON; - DO_MIN_TIMING = OFF; - NUMBER_OF_PATHS_TO_REPORT = 200; - NUMBER_OF_DESTINATION_TO_REPORT = 10; - NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT = 10; - MAX_SCC_SIZE = 50; -} -HDL_SETTINGS -{ - VERILOG_INPUT_VERSION = VERILOG_2001; - ENABLE_IP_DEBUG = OFF; - VHDL_INPUT_VERSION = VHDL93; - VHDL_SHOW_LMF_MAPPING_MESSAGES = OFF; -} -PROJECT_INFO(usrp_sounder) -{ - ORIGINAL_QUARTUS_VERSION = 3.0; - PROJECT_CREATION_TIME_DATE = "00:14:04 JULY 13, 2003"; - LAST_QUARTUS_VERSION = 3.0; - SHOW_REGISTRATION_MESSAGE = ON; - USER_LIBRARIES = "h:\\gnuradio\\trunk\\usrp\\fpga\\megacells"; -} -THIRD_PARTY_EDA_TOOLS(usrp_sounder) -{ - EDA_DESIGN_ENTRY_SYNTHESIS_TOOL = "<NONE>"; - EDA_SIMULATION_TOOL = "<NONE>"; - EDA_TIMING_ANALYSIS_TOOL = "<NONE>"; - EDA_BOARD_DESIGN_TOOL = "<NONE>"; - EDA_FORMAL_VERIFICATION_TOOL = "<NONE>"; - EDA_RESYNTHESIS_TOOL = "<NONE>"; -} -EDA_TOOL_SETTINGS(eda_design_synthesis) -{ - EDA_INPUT_GND_NAME = GND; - EDA_INPUT_VCC_NAME = VCC; - EDA_SHOW_LMF_MAPPING_MESSAGES = OFF; - EDA_RUN_TOOL_AUTOMATICALLY = OFF; - EDA_INPUT_DATA_FORMAT = EDIF; - EDA_OUTPUT_DATA_FORMAT = NONE; - USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; - RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; - RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; - RESYNTHESIS_RETIMING = FULL; -} -EDA_TOOL_SETTINGS(eda_simulation) -{ - EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; - EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; - EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; - EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; - EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; - EDA_FLATTEN_BUSES = OFF; - EDA_MAP_ILLEGAL_CHARACTERS = OFF; - EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; - EDA_RUN_TOOL_AUTOMATICALLY = OFF; - EDA_OUTPUT_DATA_FORMAT = NONE; - USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; - RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; - RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; - RESYNTHESIS_RETIMING = FULL; -} -EDA_TOOL_SETTINGS(eda_timing_analysis) -{ - EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; - EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; - EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; - EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; - EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; - EDA_FLATTEN_BUSES = OFF; - EDA_MAP_ILLEGAL_CHARACTERS = OFF; - EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; - EDA_RUN_TOOL_AUTOMATICALLY = OFF; - EDA_OUTPUT_DATA_FORMAT = NONE; - EDA_LAUNCH_CMD_LINE_TOOL = OFF; - USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; - RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; - RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; - RESYNTHESIS_RETIMING = FULL; -} -EDA_TOOL_SETTINGS(eda_board_design) -{ - EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; - EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; - EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; - EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; - EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; - EDA_FLATTEN_BUSES = OFF; - EDA_MAP_ILLEGAL_CHARACTERS = OFF; - EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; - EDA_RUN_TOOL_AUTOMATICALLY = OFF; - EDA_OUTPUT_DATA_FORMAT = NONE; - USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; - RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; - RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; - RESYNTHESIS_RETIMING = FULL; -} -EDA_TOOL_SETTINGS(eda_formal_verification) -{ - EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; - EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; - EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; - EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; - EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; - EDA_FLATTEN_BUSES = OFF; - EDA_MAP_ILLEGAL_CHARACTERS = OFF; - EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; - EDA_RUN_TOOL_AUTOMATICALLY = OFF; - EDA_OUTPUT_DATA_FORMAT = NONE; - USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; - RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; - RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; - RESYNTHESIS_RETIMING = FULL; -} -EDA_TOOL_SETTINGS(eda_palace) -{ - EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; - EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; - EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; - EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; - EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; - EDA_FLATTEN_BUSES = OFF; - EDA_MAP_ILLEGAL_CHARACTERS = OFF; - EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; - EDA_RUN_TOOL_AUTOMATICALLY = OFF; - EDA_OUTPUT_DATA_FORMAT = NONE; - RESYNTHESIS_RETIMING = FULL; - RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; - RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; - USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; -} -CLOCK(clk_120mhz) -{ - FMAX_REQUIREMENT = "120.0 MHz"; - INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; - DUTY_CYCLE = 50; - DIVIDE_BASE_CLOCK_PERIOD_BY = 1; - MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; - INVERT_BASE_CLOCK = OFF; -} -CLOCK(usbclk) -{ - FMAX_REQUIREMENT = "48.0 MHz"; - INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; - DUTY_CYCLE = 50; - DIVIDE_BASE_CLOCK_PERIOD_BY = 1; - MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; - INVERT_BASE_CLOCK = OFF; -} -CLOCK(SCLK) -{ - FMAX_REQUIREMENT = "1.0 MHz"; - INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; - DUTY_CYCLE = 50; - DIVIDE_BASE_CLOCK_PERIOD_BY = 1; - MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; - INVERT_BASE_CLOCK = OFF; -} -CLOCK(adclk0) -{ - FMAX_REQUIREMENT = "60.0 MHz"; - INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; - DUTY_CYCLE = 50; - DIVIDE_BASE_CLOCK_PERIOD_BY = 1; - MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; - INVERT_BASE_CLOCK = OFF; -} -CLOCK(adclk1) -{ - FMAX_REQUIREMENT = "60.0 MHz"; - INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; - DUTY_CYCLE = 50; - DIVIDE_BASE_CLOCK_PERIOD_BY = 1; - MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; - INVERT_BASE_CLOCK = OFF; -} diff --git a/gr-sounder/src/fpga/top/usrp_sounder.qpf b/gr-sounder/src/fpga/top/usrp_sounder.qpf deleted file mode 100644 index aa75e962b..000000000 --- a/gr-sounder/src/fpga/top/usrp_sounder.qpf +++ /dev/null @@ -1,29 +0,0 @@ -# Copyright (C) 1991-2004 Altera Corporation -# Any megafunction design, and related netlist (encrypted or decrypted), -# support information, device programming or simulation file, and any other -# associated documentation or information provided by Altera or a partner -# under Altera's Megafunction Partnership Program may be used only -# to program PLD devices (but not masked PLD devices) from Altera. Any -# other use of such megafunction design, netlist, support information, -# device programming or simulation file, or any other related documentation -# or information is prohibited for any other purpose, including, but not -# limited to modification, reverse engineering, de-compiling, or use with -# any other silicon devices, unless such use is explicitly licensed under -# a separate agreement with Altera or a megafunction partner. Title to the -# intellectual property, including patents, copyrights, trademarks, trade -# secrets, or maskworks, embodied in any such megafunction design, netlist, -# support information, device programming or simulation file, or any other -# related documentation or information provided by Altera or a megafunction -# partner, remains with Altera, the megafunction partner, or their respective -# licensors. No other licenses, including any licenses needed under any third -# party's intellectual property, are provided herein. - - - -QUARTUS_VERSION = "7.0" -DATE = "09:00:00 April 17, 2007" - - -# Active Revisions - -PROJECT_REVISION = "usrp_sounder" diff --git a/gr-sounder/src/fpga/top/usrp_sounder.qsf b/gr-sounder/src/fpga/top/usrp_sounder.qsf deleted file mode 100644 index 4d60f5f13..000000000 --- a/gr-sounder/src/fpga/top/usrp_sounder.qsf +++ /dev/null @@ -1,396 +0,0 @@ -# Copyright (C) 1991-2005 Altera Corporation
-# Your use of Altera Corporation's design tools, logic functions
-# and other software and tools, and its AMPP partner logic
-# functions, and any output files any of the foregoing
-# (including device programming or simulation files), and any
-# associated documentation or information are expressly subject
-# to the terms and conditions of the Altera Program License
-# Subscription Agreement, Altera MegaCore Function License
-# Agreement, or other applicable license agreement, including,
-# without limitation, that your use is for the sole purpose of
-# programming logic devices manufactured by Altera and sold by
-# Altera or its authorized distributors. Please refer to the
-# applicable agreement for further details.
-
-
-# The default values for assignments are stored in the file
-# usrp_sounder_assignment_defaults.qdf
-# If this file doesn't exist, and for assignments not listed, see file
-# assignment_defaults.qdf
-
-# Altera recommends that you do not modify this file. This
-# file is updated automatically by the Quartus II software
-# and any changes you make may be lost or overwritten.
-
-
-# Project-Wide Assignments
-# ========================
-set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0
-set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003"
-set_global_assignment -name LAST_QUARTUS_VERSION 7.0
-
-# Pin & Location Assignments
-# ==========================
-set_global_assignment -name RESERVE_PIN "AS INPUT TRI-STATED"
-set_location_assignment PIN_29 -to SCLK
-set_location_assignment PIN_117 -to SDI
-set_location_assignment PIN_28 -to usbclk
-set_location_assignment PIN_107 -to usbctl[0]
-set_location_assignment PIN_106 -to usbctl[1]
-set_location_assignment PIN_105 -to usbctl[2]
-set_location_assignment PIN_100 -to usbdata[0]
-set_location_assignment PIN_84 -to usbdata[10]
-set_location_assignment PIN_83 -to usbdata[11]
-set_location_assignment PIN_82 -to usbdata[12]
-set_location_assignment PIN_79 -to usbdata[13]
-set_location_assignment PIN_78 -to usbdata[14]
-set_location_assignment PIN_77 -to usbdata[15]
-set_location_assignment PIN_99 -to usbdata[1]
-set_location_assignment PIN_98 -to usbdata[2]
-set_location_assignment PIN_95 -to usbdata[3]
-set_location_assignment PIN_94 -to usbdata[4]
-set_location_assignment PIN_93 -to usbdata[5]
-set_location_assignment PIN_88 -to usbdata[6]
-set_location_assignment PIN_87 -to usbdata[7]
-set_location_assignment PIN_86 -to usbdata[8]
-set_location_assignment PIN_85 -to usbdata[9]
-set_location_assignment PIN_104 -to usbrdy[0]
-set_location_assignment PIN_101 -to usbrdy[1]
-set_location_assignment PIN_76 -to FX2_1
-set_location_assignment PIN_75 -to FX2_2
-set_location_assignment PIN_74 -to FX2_3
-set_location_assignment PIN_116 -to io_rx_a[0]
-set_location_assignment PIN_115 -to io_rx_a[1]
-set_location_assignment PIN_114 -to io_rx_a[2]
-set_location_assignment PIN_113 -to io_rx_a[3]
-set_location_assignment PIN_108 -to io_rx_a[4]
-set_location_assignment PIN_195 -to io_rx_a[5]
-set_location_assignment PIN_196 -to io_rx_a[6]
-set_location_assignment PIN_197 -to io_rx_a[7]
-set_location_assignment PIN_200 -to io_rx_a[8]
-set_location_assignment PIN_201 -to io_rx_a[9]
-set_location_assignment PIN_202 -to io_rx_a[10]
-set_location_assignment PIN_203 -to io_rx_a[11]
-set_location_assignment PIN_206 -to io_rx_a[12]
-set_location_assignment PIN_207 -to io_rx_a[13]
-set_location_assignment PIN_208 -to io_rx_a[14]
-set_location_assignment PIN_214 -to io_rx_b[0]
-set_location_assignment PIN_215 -to io_rx_b[1]
-set_location_assignment PIN_216 -to io_rx_b[2]
-set_location_assignment PIN_217 -to io_rx_b[3]
-set_location_assignment PIN_218 -to io_rx_b[4]
-set_location_assignment PIN_219 -to io_rx_b[5]
-set_location_assignment PIN_222 -to io_rx_b[6]
-set_location_assignment PIN_223 -to io_rx_b[7]
-set_location_assignment PIN_224 -to io_rx_b[8]
-set_location_assignment PIN_225 -to io_rx_b[9]
-set_location_assignment PIN_226 -to io_rx_b[10]
-set_location_assignment PIN_227 -to io_rx_b[11]
-set_location_assignment PIN_228 -to io_rx_b[12]
-set_location_assignment PIN_233 -to io_rx_b[13]
-set_location_assignment PIN_234 -to io_rx_b[14]
-set_location_assignment PIN_175 -to io_tx_a[0]
-set_location_assignment PIN_176 -to io_tx_a[1]
-set_location_assignment PIN_177 -to io_tx_a[2]
-set_location_assignment PIN_178 -to io_tx_a[3]
-set_location_assignment PIN_179 -to io_tx_a[4]
-set_location_assignment PIN_180 -to io_tx_a[5]
-set_location_assignment PIN_181 -to io_tx_a[6]
-set_location_assignment PIN_182 -to io_tx_a[7]
-set_location_assignment PIN_183 -to io_tx_a[8]
-set_location_assignment PIN_184 -to io_tx_a[9]
-set_location_assignment PIN_185 -to io_tx_a[10]
-set_location_assignment PIN_186 -to io_tx_a[11]
-set_location_assignment PIN_187 -to io_tx_a[12]
-set_location_assignment PIN_188 -to io_tx_a[13]
-set_location_assignment PIN_193 -to io_tx_a[14]
-set_location_assignment PIN_73 -to io_tx_b[0]
-set_location_assignment PIN_68 -to io_tx_b[1]
-set_location_assignment PIN_67 -to io_tx_b[2]
-set_location_assignment PIN_66 -to io_tx_b[3]
-set_location_assignment PIN_65 -to io_tx_b[4]
-set_location_assignment PIN_64 -to io_tx_b[5]
-set_location_assignment PIN_63 -to io_tx_b[6]
-set_location_assignment PIN_62 -to io_tx_b[7]
-set_location_assignment PIN_61 -to io_tx_b[8]
-set_location_assignment PIN_60 -to io_tx_b[9]
-set_location_assignment PIN_59 -to io_tx_b[10]
-set_location_assignment PIN_58 -to io_tx_b[11]
-set_location_assignment PIN_57 -to io_tx_b[12]
-set_location_assignment PIN_56 -to io_tx_b[13]
-set_location_assignment PIN_55 -to io_tx_b[14]
-set_location_assignment PIN_152 -to master_clk
-set_location_assignment PIN_144 -to rx_a_a[0]
-set_location_assignment PIN_143 -to rx_a_a[1]
-set_location_assignment PIN_141 -to rx_a_a[2]
-set_location_assignment PIN_140 -to rx_a_a[3]
-set_location_assignment PIN_139 -to rx_a_a[4]
-set_location_assignment PIN_138 -to rx_a_a[5]
-set_location_assignment PIN_137 -to rx_a_a[6]
-set_location_assignment PIN_136 -to rx_a_a[7]
-set_location_assignment PIN_135 -to rx_a_a[8]
-set_location_assignment PIN_134 -to rx_a_a[9]
-set_location_assignment PIN_133 -to rx_a_a[10]
-set_location_assignment PIN_132 -to rx_a_a[11]
-set_location_assignment PIN_23 -to rx_a_b[0]
-set_location_assignment PIN_21 -to rx_a_b[1]
-set_location_assignment PIN_20 -to rx_a_b[2]
-set_location_assignment PIN_19 -to rx_a_b[3]
-set_location_assignment PIN_18 -to rx_a_b[4]
-set_location_assignment PIN_17 -to rx_a_b[5]
-set_location_assignment PIN_16 -to rx_a_b[6]
-set_location_assignment PIN_15 -to rx_a_b[7]
-set_location_assignment PIN_14 -to rx_a_b[8]
-set_location_assignment PIN_13 -to rx_a_b[9]
-set_location_assignment PIN_12 -to rx_a_b[10]
-set_location_assignment PIN_11 -to rx_a_b[11]
-set_location_assignment PIN_131 -to rx_b_a[0]
-set_location_assignment PIN_128 -to rx_b_a[1]
-set_location_assignment PIN_127 -to rx_b_a[2]
-set_location_assignment PIN_126 -to rx_b_a[3]
-set_location_assignment PIN_125 -to rx_b_a[4]
-set_location_assignment PIN_124 -to rx_b_a[5]
-set_location_assignment PIN_123 -to rx_b_a[6]
-set_location_assignment PIN_122 -to rx_b_a[7]
-set_location_assignment PIN_121 -to rx_b_a[8]
-set_location_assignment PIN_120 -to rx_b_a[9]
-set_location_assignment PIN_119 -to rx_b_a[10]
-set_location_assignment PIN_118 -to rx_b_a[11]
-set_location_assignment PIN_8 -to rx_b_b[0]
-set_location_assignment PIN_7 -to rx_b_b[1]
-set_location_assignment PIN_6 -to rx_b_b[2]
-set_location_assignment PIN_5 -to rx_b_b[3]
-set_location_assignment PIN_4 -to rx_b_b[4]
-set_location_assignment PIN_3 -to rx_b_b[5]
-set_location_assignment PIN_2 -to rx_b_b[6]
-set_location_assignment PIN_240 -to rx_b_b[7]
-set_location_assignment PIN_239 -to rx_b_b[8]
-set_location_assignment PIN_238 -to rx_b_b[9]
-set_location_assignment PIN_237 -to rx_b_b[10]
-set_location_assignment PIN_236 -to rx_b_b[11]
-set_location_assignment PIN_156 -to SDO
-set_location_assignment PIN_153 -to SEN_FPGA
-set_location_assignment PIN_159 -to tx_a[0]
-set_location_assignment PIN_160 -to tx_a[1]
-set_location_assignment PIN_161 -to tx_a[2]
-set_location_assignment PIN_162 -to tx_a[3]
-set_location_assignment PIN_163 -to tx_a[4]
-set_location_assignment PIN_164 -to tx_a[5]
-set_location_assignment PIN_165 -to tx_a[6]
-set_location_assignment PIN_166 -to tx_a[7]
-set_location_assignment PIN_167 -to tx_a[8]
-set_location_assignment PIN_168 -to tx_a[9]
-set_location_assignment PIN_169 -to tx_a[10]
-set_location_assignment PIN_170 -to tx_a[11]
-set_location_assignment PIN_173 -to tx_a[12]
-set_location_assignment PIN_174 -to tx_a[13]
-set_location_assignment PIN_38 -to tx_b[0]
-set_location_assignment PIN_39 -to tx_b[1]
-set_location_assignment PIN_41 -to tx_b[2]
-set_location_assignment PIN_42 -to tx_b[3]
-set_location_assignment PIN_43 -to tx_b[4]
-set_location_assignment PIN_44 -to tx_b[5]
-set_location_assignment PIN_45 -to tx_b[6]
-set_location_assignment PIN_46 -to tx_b[7]
-set_location_assignment PIN_47 -to tx_b[8]
-set_location_assignment PIN_48 -to tx_b[9]
-set_location_assignment PIN_49 -to tx_b[10]
-set_location_assignment PIN_50 -to tx_b[11]
-set_location_assignment PIN_53 -to tx_b[12]
-set_location_assignment PIN_54 -to tx_b[13]
-set_location_assignment PIN_158 -to TXSYNC_A
-set_location_assignment PIN_37 -to TXSYNC_B
-set_location_assignment PIN_235 -to io_rx_b[15]
-set_location_assignment PIN_24 -to io_tx_b[15]
-set_location_assignment PIN_213 -to io_rx_a[15]
-set_location_assignment PIN_194 -to io_tx_a[15]
-set_location_assignment PIN_1 -to MYSTERY_SIGNAL
-
-# Timing Assignments
-# ==================
-set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF
-
-# Analysis & Synthesis Assignments
-# ================================
-set_global_assignment -name SAVE_DISK_SPACE OFF
-set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
-set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
-set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"
-set_global_assignment -name FAMILY Cyclone
-set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE BALANCED
-set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE SPEED
-set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE SPEED
-set_global_assignment -name TOP_LEVEL_ENTITY usrp_sounder
-set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
-set_global_assignment -name USER_LIBRARIES "h:\\gnuradio\\trunk\\usrp\\fpga\\megacells"
-set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON
-
-# Fitter Assignments
-# ==================
-set_global_assignment -name DEVICE EP1C12Q240C8
-set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "PASSIVE SERIAL"
-set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
-set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
-set_global_assignment -name OPTIMIZE_TIMING "NORMAL COMPILATION"
-set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF
-set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF
-set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
-set_global_assignment -name IO_PLACEMENT_OPTIMIZATION OFF
-set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
-set_global_assignment -name INC_PLC_MODE OFF
-set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF
-set_instance_assignment -name IO_STANDARD LVTTL -to usbdata[12]
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
-set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
-
-# Timing Analysis Assignments
-# ===========================
-set_global_assignment -name MAX_SCC_SIZE 50
-
-# EDA Netlist Writer Assignments
-# ==============================
-set_global_assignment -name EDA_SIMULATION_TOOL "<None>"
-set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "<NONE>"
-set_global_assignment -name EDA_BOARD_DESIGN_TOOL "<NONE>"
-set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "<NONE>"
-set_global_assignment -name EDA_RESYNTHESIS_TOOL "<NONE>"
-
-# Assembler Assignments
-# =====================
-set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
-set_global_assignment -name GENERATE_RBF_FILE ON
-set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
-set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
-
-# Simulator Assignments
-# =====================
-set_global_assignment -name START_TIME "0 ns"
-set_global_assignment -name GLITCH_INTERVAL "1 ns"
-
-# Design Assistant Assignments
-# ============================
-set_global_assignment -name DRC_REPORT_TOP_FANOUT OFF
-set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING OFF
-set_global_assignment -name ASSG_CAT OFF
-set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF
-set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM OFF
-set_global_assignment -name CLK_CAT OFF
-set_global_assignment -name CLK_RULE_COMB_CLOCK OFF
-set_global_assignment -name CLK_RULE_INV_CLOCK OFF
-set_global_assignment -name CLK_RULE_GATING_SCHEME OFF
-set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF
-set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF
-set_global_assignment -name CLK_RULE_MIX_EDGES OFF
-set_global_assignment -name RESET_CAT OFF
-set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF
-set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF
-set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF
-set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF
-set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF
-set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF
-set_global_assignment -name TIMING_CAT OFF
-set_global_assignment -name TIMING_RULE_SHIFT_REG OFF
-set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE OFF
-set_global_assignment -name NONSYNCHSTRUCT_CAT OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF
-set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF
-set_global_assignment -name SIGNALRACE_CAT OFF
-set_global_assignment -name ACLK_CAT OFF
-set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF
-set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF
-set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF
-set_global_assignment -name HCPY_CAT OFF
-set_global_assignment -name HCPY_VREF_PINS OFF
-
-# SignalTap II Assignments
-# ========================
-set_global_assignment -name HUB_ENTITY_NAME SLD_HUB
-set_global_assignment -name HUB_INSTANCE_NAME SLD_HUB_INST
-set_global_assignment -name ENABLE_SIGNALTAP OFF
-
-# LogicLock Region Assignments
-# ============================
-set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF
-
-# -----------------
-# start CLOCK(SCLK)
-
- # Timing Assignments
- # ==================
-set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK
-set_global_assignment -name FMAX_REQUIREMENT "1 MHz" -section_id SCLK
-
-# end CLOCK(SCLK)
-# ---------------
-
-# -----------------------
-# start CLOCK(master_clk)
-
- # Timing Assignments
- # ==================
-set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk
-set_global_assignment -name FMAX_REQUIREMENT "64 MHz" -section_id master_clk
-
-# end CLOCK(master_clk)
-# ---------------------
-
-# -------------------
-# start CLOCK(usbclk)
-
- # Timing Assignments
- # ==================
-set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk
-set_global_assignment -name FMAX_REQUIREMENT "48 MHz" -section_id usbclk
-
-# end CLOCK(usbclk)
-# -----------------
-
-# ----------------------
-# start ENTITY(usrp_sounder)
-
- # Timing Assignments
- # ==================
-set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK
-set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk
-set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk
-
-# end ENTITY(usrp_sounder)
-# --------------------
-
-set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
-set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-
-set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING OFF
-set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE REALISTIC
-set_global_assignment -name VERILOG_FILE ../lib/lfsr_constants.v
-set_global_assignment -name VERILOG_FILE ../lib/lfsr.v
-set_global_assignment -name VERILOG_FILE ../lib/dac_interface.v
-set_global_assignment -name VERILOG_FILE ../lib/dacpll.v
-set_global_assignment -name VERILOG_FILE ../lib/sounder_rx.v
-set_global_assignment -name VERILOG_FILE ../lib/sounder_tx.v
-set_global_assignment -name VERILOG_FILE ../lib/sounder_ctrl.v
-set_global_assignment -name VERILOG_FILE ../lib/sounder.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/atr_delay.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/sign_extend.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/rx_buffer.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/setting_reg.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/strobe_gen.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/clk_divider.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/bidir_reg.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/adc_interface.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/gen_sync.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/io_pins.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/master_control.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/rssi.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/rx_dcoffset.v
-set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/serial_io.v
-set_global_assignment -name VERILOG_FILE usrp_sounder.v
-set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
\ No newline at end of file diff --git a/gr-sounder/src/fpga/top/usrp_sounder.rbf b/gr-sounder/src/fpga/top/usrp_sounder.rbf Binary files differdeleted file mode 100755 index e2c9db6c4..000000000 --- a/gr-sounder/src/fpga/top/usrp_sounder.rbf +++ /dev/null diff --git a/gr-sounder/src/fpga/top/usrp_sounder.v b/gr-sounder/src/fpga/top/usrp_sounder.v deleted file mode 100644 index a88b2388e..000000000 --- a/gr-sounder/src/fpga/top/usrp_sounder.v +++ /dev/null @@ -1,198 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2003,2004 Matt Ettus -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -// Top level module for a full setup with DUCs and DDCs - -// Define DEBUG_OWNS_IO_PINS if we're using the daughterboard i/o pins -// for debugging info. NB, This can kill the m'board and/or d'board if you -// have anything except basic d'boards installed. - -// Uncomment the following to include optional circuitry - -module usrp_sounder -(output MYSTERY_SIGNAL, - input master_clk, - input SCLK, - input SDI, - inout SDO, - input SEN_FPGA, - - input FX2_1, - output FX2_2, - output FX2_3, - - input wire [11:0] rx_a_a, - input wire [11:0] rx_b_a, - input wire [11:0] rx_a_b, - input wire [11:0] rx_b_b, - - output wire [13:0] tx_a, - output wire [13:0] tx_b, - - output wire TXSYNC_A, - output wire TXSYNC_B, - - // USB interface - input usbclk, - input wire [2:0] usbctl, - output wire [1:0] usbrdy, - inout [15:0] usbdata, // NB Careful, inout - - // These are the general purpose i/o's that go to the daughterboard slots - inout wire [15:0] io_tx_a, - inout wire [15:0] io_tx_b, - inout wire [15:0] io_rx_a, - inout wire [15:0] io_rx_b - ); - wire [15:0] debugdata,debugctrl; - assign MYSTERY_SIGNAL = 1'b0; - - wire clk64; - - // wire WR = usbctl[0]; - wire RD = usbctl[1]; - wire OE = usbctl[2]; - - wire have_pkt_rdy; - assign usbrdy[0] = 1'b0; // have_space; - assign usbrdy[1] = have_pkt_rdy; - - wire tx_underrun, rx_overrun; - wire clear_status = FX2_1; - assign FX2_2 = rx_overrun; - assign FX2_3 = 1'b0; // tx_underrun; - - wire [15:0] usbdata_out; - - wire [3:0] rx_numchan; - wire enable_tx, enable_rx; - wire tx_dsp_reset, rx_dsp_reset, tx_bus_reset, rx_bus_reset; - - // Tri-state bus macro - bustri bustri( .data(usbdata_out),.enabledt(OE),.tridata(usbdata) ); - - assign clk64 = master_clk; - - // TX - wire tx_sample_strobe; - wire tx_empty; - - wire serial_strobe; - wire [6:0] serial_addr; - wire [31:0] serial_data; - - //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - // Transmit Side - - wire [13:0] tx_i, tx_q; - wire [13:0] tx_dac; - - dac_interface dac(.clk_i(clk64),.rst_i(tx_dsp_reset),.ena_i(enable_tx), - .strobe_i(tx_sample_strobe),.tx_i_i(tx_i),.tx_q_i(tx_q), - .tx_data_o(tx_dac),.tx_sync_o(TXSYNC_A)); - - assign tx_a = tx_dac; - - // Wedge DAC #2 at zero - assign TXSYNC_B = 1'b0; - assign tx_b = 14'b0; - - ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - // Receive Side - wire rx_sample_strobe, rx_strobe; - wire [15:0] rx_adc0_i, rx_adc0_q; - wire [15:0] rx_buf_i, rx_buf_q; - - adc_interface adc_interface(.clock(clk64),.reset(rx_dsp_reset),.enable(enable_rx), - .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), - .rx_a_a(rx_a_a),.rx_b_a(rx_b_a),.rx_a_b(),.rx_b_b(), - .rssi_0(),.rssi_1(),.rssi_2(),.rssi_3(), - .ddc0_in_i(rx_adc0_i),.ddc0_in_q(rx_adc0_q), - .ddc1_in_i(),.ddc1_in_q(), - .ddc2_in_i(),.ddc2_in_q(), - .ddc3_in_i(),.ddc3_in_q(),.rx_numchan(rx_numchan) ); - - rx_buffer rx_buffer - ( .usbclk(usbclk),.bus_reset(rx_bus_reset),.reset(rx_dsp_reset), - .reset_regs(rx_dsp_reset), - .usbdata(usbdata_out),.RD(RD),.have_pkt_rdy(have_pkt_rdy),.rx_overrun(rx_overrun), - .channels(rx_numchan), - .ch_0(rx_buf_i),.ch_1(rx_buf_q), - .ch_2(),.ch_3(), - .ch_4(),.ch_5(), - .ch_6(),.ch_7(), - .rxclk(clk64),.rxstrobe(rx_strobe), - .clear_status(clear_status), - .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), - .debugbus() ); - - - /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - // Top level application - - sounder sounder - ( .clk_i(clk64),.saddr_i(serial_addr),.sdata_i(serial_data),.s_strobe_i(serial_strobe), - .tx_strobe_o(tx_sample_strobe),.tx_dac_i_o(tx_i),.tx_dac_q_o(tx_q), - .rx_adc_i_i(rx_adc0_i),.rx_adc_q_i(rx_adc0_q), - .rx_strobe_o(rx_strobe),.rx_imp_i_o(rx_buf_i),.rx_imp_q_o(rx_buf_q) - ); - - - /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - // Control Functions - - wire [31:0] capabilities; - assign capabilities[7] = 0; // `TX_CAP_HB; - assign capabilities[6:4] = 2; // `TX_CAP_NCHAN; - assign capabilities[3] = 0; // `RX_CAP_HB; - assign capabilities[2:0] = 2; // `RX_CAP_NCHAN; - - serial_io serial_io - ( .master_clk(clk64),.serial_clock(SCLK),.serial_data_in(SDI), - .enable(SEN_FPGA),.reset(1'b0),.serial_data_out(SDO), - .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), - .readback_0({io_rx_a,io_tx_a}),.readback_1({io_rx_b,io_tx_b}),.readback_2(capabilities),.readback_3(32'hf0f0931a), - .readback_4(),.readback_5(),.readback_6(),.readback_7() - ); - - wire [15:0] reg_0,reg_1,reg_2,reg_3; - master_control master_control - ( .master_clk(clk64),.usbclk(usbclk), - .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), - .tx_bus_reset(tx_bus_reset),.rx_bus_reset(rx_bus_reset), - .tx_dsp_reset(tx_dsp_reset),.rx_dsp_reset(rx_dsp_reset), - .enable_tx(enable_tx),.enable_rx(enable_rx), - .interp_rate(),.decim_rate(), - .tx_sample_strobe(),.strobe_interp(), - .rx_sample_strobe(rx_sample_strobe),.strobe_decim(), - .tx_empty(tx_empty), - .debug_0(),.debug_1(), - .debug_2(),.debug_3(), - .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3) ); - - io_pins io_pins - (.io_0(io_tx_a),.io_1(io_rx_a),.io_2(io_tx_b),.io_3(io_rx_b), - .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3), - .clock(clk64),.rx_reset(rx_dsp_reset),.tx_reset(tx_dsp_reset), - .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe)); - -endmodule // usrp_sounder diff --git a/gr-sounder/src/lib/.gitignore b/gr-sounder/src/lib/.gitignore deleted file mode 100644 index b336cc7ce..000000000 --- a/gr-sounder/src/lib/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -/Makefile -/Makefile.in diff --git a/gr-sounder/src/lib/Makefile.am b/gr-sounder/src/lib/Makefile.am deleted file mode 100644 index 4f35e3aef..000000000 --- a/gr-sounder/src/lib/Makefile.am +++ /dev/null @@ -1,22 +0,0 @@ -# -# Copyright 2007 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common diff --git a/gr-sounder/src/python/.gitignore b/gr-sounder/src/python/.gitignore deleted file mode 100644 index 8ac573ba1..000000000 --- a/gr-sounder/src/python/.gitignore +++ /dev/null @@ -1,5 +0,0 @@ -/Makefile -/Makefile.in -/run_tests -/*.pyc -/loopback.dat diff --git a/gr-sounder/src/python/Makefile.am b/gr-sounder/src/python/Makefile.am deleted file mode 100644 index 1d9b25254..000000000 --- a/gr-sounder/src/python/Makefile.am +++ /dev/null @@ -1,39 +0,0 @@ -# -# Copyright 2007,2009 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -include $(top_srcdir)/Makefile.common - -# Install this stuff so that it ends up as the gnuradio.sounder module -# This usually ends up at: -# ${prefix}/lib/python${python_version}/site-packages/gnuradio - -sounder_pythondir = $(grpythondir) - -EXTRA_DIST += \ - sounder_loopback.sh \ - qa_nothing.py \ - run_tests.in - -dist_bin_SCRIPTS = \ - usrp_sounder.py - -sounder_python_PYTHON = \ - sounder.py diff --git a/gr-sounder/src/python/qa_nothing.py b/gr-sounder/src/python/qa_nothing.py deleted file mode 100644 index e69de29bb..000000000 --- a/gr-sounder/src/python/qa_nothing.py +++ /dev/null diff --git a/gr-sounder/src/python/run_tests.in b/gr-sounder/src/python/run_tests.in deleted file mode 100644 index b8f7830c2..000000000 --- a/gr-sounder/src/python/run_tests.in +++ /dev/null @@ -1,10 +0,0 @@ -#!/bin/sh - -# 1st parameter is absolute path to component source directory -# 2nd parameter is absolute path to component build directory -# 3rd parameter is path to Python QA directory - -@top_builddir@/run_tests.sh \ - @abs_top_srcdir@/gr-sounder \ - @abs_top_builddir@/gr-sounder \ - @srcdir@ diff --git a/gr-sounder/src/python/sounder.py b/gr-sounder/src/python/sounder.py deleted file mode 100644 index 85c03b0e1..000000000 --- a/gr-sounder/src/python/sounder.py +++ /dev/null @@ -1,271 +0,0 @@ -#!/usr/bin/env python -# -# Copyright 2007 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -from gnuradio import gr, usrp -from gnuradio import eng_notation - -n2s = eng_notation.num_to_str - -FR_MODE = usrp.FR_USER_0 -bmFR_MODE_RESET = 1 << 0 # bit 0: active high reset -bmFR_MODE_TX = 1 << 1 # bit 1: enable transmitter -bmFR_MODE_RX = 1 << 2 # bit 2: enable receiver -bmFR_MODE_LP = 1 << 3 # bit 3: enable digital loopback - -FR_DEGREE = usrp.FR_USER_1 -FR_AMPL = usrp.FR_USER_2 - -def pick_subdevice(u): - """ - The user didn't specify a subdevice on the command line. - If there's a daughterboard on A, select A. - If there's a daughterboard on B, select B. - Otherwise, select A. - """ - if u.db[0][0].dbid() >= 0: # dbid is < 0 if there's no d'board or a problem - return (0, 0) - if u.db[1][0].dbid() >= 0: - return (1, 0) - return (0, 0) - -class sounder_tx: - def __init__(self, loopback=False,ampl=4096,verbose=False,debug=False): - self._loopback=loopback - self._amplitude = ampl - self._verbose = verbose - self._debug = debug - self._u = usrp.sink_s(fpga_filename='usrp_sounder.rbf') - if not self._loopback: - self._subdev_spec = usrp.pick_tx_subdevice(self._u) - self._subdev = usrp.selected_subdev(self._u, self._subdev_spec) - if self._verbose: - print "Using", self._subdev.name(), "for sounder transmitter." - self.set_amplitude(ampl) - if not self._loopback: - self._subdev.set_lo_offset(0.0) - self._u.start() - if not self._loopback: - self._subdev.set_enable(True) - - def tune(self, frequency): - if self._verbose: - print "Setting transmitter frequency to", n2s(frequency) - result = self._u.tune(0, self._subdev, frequency) - if result == False: - raise RuntimeError("Failed to set transmitter frequency.") - - def set_amplitude(self, ampl): - self._amplitude = ampl - if self._debug: - print "Writing amplitude register with:", hex(self._mode) - self._u._write_fpga_reg(FR_AMPL, self._amplitude) - -class sounder_rx: - def __init__(self,subdev_spec=None,gain=None,length=1,alpha=1.0,msgq=None,loopback=False,verbose=False,debug=False): - self._subdev_spec = subdev_spec - self._gain = gain - self._length = length - self._alpha = alpha - self._msgq = msgq - self._loopback = loopback - self._verbose = verbose - self._debug = debug - - self._tb = gr.top_block() - self._u = usrp.source_c(fpga_filename='usrp_sounder.rbf') - if not self._loopback: - if self._subdev_spec == None: - self._subdev_spec = pick_subdevice(self._u) - self._u.set_mux(usrp.determine_rx_mux_value(self._u, self._subdev_spec)) - self._subdev = usrp.selected_subdev(self._u, self._subdev_spec) - if self._verbose: - print "Using", self._subdev.name(), "for sounder receiver." - - self.set_gain(self._gain) - self._vblen = gr.sizeof_gr_complex*self._length - if self._debug: - print "Generating impulse vectors of length", self._length, "byte length", self._vblen - - self._s2v = gr.stream_to_vector(gr.sizeof_gr_complex, self._length) - if self._verbose: - print "Using smoothing alpha of", self._alpha - self._lpf = gr.single_pole_iir_filter_cc(self._alpha, self._length) - self._sink = gr.message_sink(self._vblen, self._msgq, True) - self._tb.connect(self._u, self._s2v, self._lpf, self._sink) - - def tune(self, frequency): - if self._verbose: - print "Setting receiver frequency to", n2s(frequency) - result = self._u.tune(0, self._subdev, frequency) - if result == False: - raise RuntimeError("Failed to set receiver frequency.") - - def set_gain(self, gain): - self._gain = gain - if self._loopback: - return - - if self._gain is None: - # if no gain was specified, use the mid-point in dB - g = self._subdev.gain_range() - self._gain = float(g[0]+g[1])/2 - if self._verbose: - print "Setting receiver gain to", gain - self._subdev.set_gain(self._gain) - - def start(self): - if self._debug: - print "Starting receiver flow graph." - self._tb.start() - - def wait(self): - if self._debug: - print "Waiting for threads..." - self._tb.wait() - - def stop(self): - if self._debug: - print "Stopping receiver flow graph." - self._tb.stop() - self.wait() - if self._debug: - print "Receiver flow graph stopped." - - -class sounder: - def __init__(self,transmit=False,receive=False,loopback=False,rx_subdev_spec=None,ampl=0x1FFF, - frequency=0.0,rx_gain=None,degree=12,length=1,alpha=1.0,msgq=None,verbose=False,debug=False): - self._transmit = transmit - self._receive = receive - self._loopback = loopback - self._rx_subdev_spec = rx_subdev_spec - self._frequency = frequency - self._amplitude = ampl - self._rx_gain = rx_gain - self._degree = degree - self._length = length - self._alpha = alpha - self._msgq = msgq - self._verbose = verbose - self._debug = debug - self._mode = 0 - self._u = None - self._trans = None - self._rcvr = None - self._transmitting = False - self._receiving = False - - if self._transmit: - self._trans = sounder_tx(loopback=self._loopback,ampl=self._amplitude, - verbose=self._verbose) - self._u = self._trans._u - - if self._receive: - self._rcvr = sounder_rx(subdev_spec=self._rx_subdev_spec,length=self._length, - gain=self._rx_gain,alpha=self._alpha,msgq=self._msgq, - loopback=self._loopback,verbose=self._verbose, - debug=self._debug) - self._u = self._rcvr._u # either receiver or transmitter object will do - - self.set_reset(True) - if self._loopback == False: - self.tune(self._frequency) - self.set_degree(self._degree) - self.set_loopback(self._loopback) - self.set_reset(False) - - def tune(self, frequency): - self._frequency = frequency - if self._rcvr: - self._rcvr.tune(frequency) - if self._trans: - self._trans.tune(frequency) - - def set_degree(self, degree): - if self._verbose: - print "Setting PN code degree to", degree - self._u._write_fpga_reg(FR_DEGREE, degree); - - def _write_mode(self): - if self._debug: - print "Writing mode register with:", hex(self._mode) - self._u._write_fpga_reg(FR_MODE, self._mode) - - def enable_tx(self, value): - if value: - if self._verbose: - print "Enabling transmitter." - self._mode |= bmFR_MODE_TX - self._transmitting = True - else: - if self._verbose: - print "Disabling transmitter." - self._mode &= ~bmFR_MODE_TX - self._write_mode() - - def enable_rx(self, value): - if value: - self._mode |= bmFR_MODE_RX - self._write_mode() - self._rcvr.start() - self._receiving = True - else: - self._rcvr.stop() - self._mode &= ~bmFR_MODE_RX - self._write_mode() - self._receiving = False - - def set_loopback(self, value): - if value: - if self._verbose: - print "Enabling digital loopback." - self._mode |= bmFR_MODE_LP - else: - if self._verbose: - print "Disabling digital loopback." - self._mode &= ~bmFR_MODE_LP - self._write_mode() - - def set_reset(self, value): - if value: - if self._debug: - print "Asserting reset." - self._mode |= bmFR_MODE_RESET - else: - if self._debug: - print "De-asserting reset." - self._mode &= ~bmFR_MODE_RESET - self._write_mode() - - def start(self): - if self._transmit: - self.enable_tx(True) - if self._receive: - self.enable_rx(True) - - def __del__(self): - if self._transmitting: - self.enable_tx(False) - - if self._receiving: - self.enable_rx(False) - diff --git a/gr-sounder/src/python/sounder_loopback.sh b/gr-sounder/src/python/sounder_loopback.sh deleted file mode 100755 index a97a8fdcf..000000000 --- a/gr-sounder/src/python/sounder_loopback.sh +++ /dev/null @@ -1,4 +0,0 @@ -#!/bin/sh - -# Note this runs the installed script, not the one in the tree -usrp_sounder.py -r -l -t -d12 -v -F loopback.dat -D diff --git a/gr-sounder/src/python/usrp_sounder.py b/gr-sounder/src/python/usrp_sounder.py deleted file mode 100755 index c183ee85a..000000000 --- a/gr-sounder/src/python/usrp_sounder.py +++ /dev/null @@ -1,112 +0,0 @@ -#!/usr/bin/env python -# -# Copyright 2007 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -from gnuradio import gr -from gnuradio.sounder import sounder -from gnuradio import eng_notation -from gnuradio.eng_option import eng_option -from optparse import OptionParser -import numpy -import sys - -n2s = eng_notation.num_to_str - -def main(): - parser = OptionParser(option_class=eng_option) - parser.add_option("-R", "--rx-subdev-spec", type="subdev", default=(0, 0), - help="select USRP Rx side A or B") - parser.add_option("-g", "--gain", type="eng_float", default=None, - help="set gain in dB (default is midpoint)") - parser.add_option("-f", "--frequency", type="eng_float", default=0.0, - help="set frequency to FREQ in Hz, default is %default", metavar="FREQ") - parser.add_option("-d", "--degree", type="int", default=12, - help="set sounding sequence degree (2-12), default is %default,") - parser.add_option("-a", "--amplitude", type="int", default=4096, - help="set waveform amplitude, default is %default,") - parser.add_option("-t", "--transmit", action="store_true", default=False, - help="enable sounding transmitter") - parser.add_option("-r", "--receive", action="store_true", default=False, - help="enable sounding receiver") - parser.add_option("-l", "--loopback", action="store_true", default=False, - help="enable digital loopback, default is disabled") - parser.add_option("-v", "--verbose", action="store_true", default=False, - help="enable verbose output, default is disabled") - parser.add_option("-D", "--debug", action="store_true", default=False, - help="enable debugging output, default is disabled") - parser.add_option("-F", "--filename", default=None, - help="log received impulse responses to file") - parser.add_option("", "--alpha", type="eng_float", default=1.0, - help="smoothing factor (0.0-1.0), default is %default (none)") - - (options, args) = parser.parse_args() - - if len(args) != 0 or not (options.transmit | options.receive): - parser.print_help() - sys.exit(1) - - if options.receive and (options.filename == None): - print "Must supply filename when receiving." - sys.exit(1) - - if options.degree > 12 or options.degree < 2: - print "PN code degree must be between 2 and 12" - sys.exit(1) - - length = int(2**options.degree-1) - if options.verbose: - print "Using PN code degree of", options.degree, "length", length - if options.loopback == False: - print "Sounding frequency range is", n2s(options.frequency-16e6), "to", n2s(options.frequency+16e6) - if options.filename != None: - print "Logging impulse records to file: ", options.filename - - msgq = gr.msg_queue() - s = sounder(transmit=options.transmit,receive=options.receive, - loopback=options.loopback,rx_subdev_spec=options.rx_subdev_spec, - frequency=options.frequency,rx_gain=options.gain, - degree=options.degree,length=length,alpha=options.alpha, - msgq=msgq,verbose=options.verbose,ampl=options.amplitude, - debug=options.debug) - s.start() - - if options.receive: - f = open(options.filename, "wb") - print "Enter CTRL-C to stop." - try: - while (1): - msg = msgq.delete_head() - if msg.type() == 1: - break - rec = msg.to_string()[:length*gr.sizeof_gr_complex] - if options.debug: - print "Received impulse vector of length", len(rec) - - f.write(rec) - - except KeyboardInterrupt: - pass - else: - if options.transmit: - raw_input("Press return to exit.") - -if __name__ == "__main__": - main() |