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-rw-r--r--gr-usrp/src/Makefile.am2
-rw-r--r--gr-usrp/src/db_dtt754.py229
-rw-r--r--gr-usrp/src/db_dtt768.py203
-rw-r--r--gr-usrp/src/usrp.py2
-rwxr-xr-xusrp/host/apps/burn-db-eeprom2
-rw-r--r--usrp/host/lib/legacy/usrp_dbid.dat2
6 files changed, 440 insertions, 0 deletions
diff --git a/gr-usrp/src/Makefile.am b/gr-usrp/src/Makefile.am
index a2b348e3b..4bb40800f 100644
--- a/gr-usrp/src/Makefile.am
+++ b/gr-usrp/src/Makefile.am
@@ -54,6 +54,8 @@ ourpython_PYTHON = \
db_xcvr2450.py \
db_instantiator.py \
db_tv_rx.py \
+ db_dtt754.py \
+ db_dtt768.py \
flexrf_debug_gui.py \
tx_debug_gui.py \
usrp.py \
diff --git a/gr-usrp/src/db_dtt754.py b/gr-usrp/src/db_dtt754.py
new file mode 100644
index 000000000..019eae6a5
--- /dev/null
+++ b/gr-usrp/src/db_dtt754.py
@@ -0,0 +1,229 @@
+#
+# Copyright 2005 Free Software Foundation, Inc.
+#
+# This file is part of GNU Radio
+#
+# GNU Radio is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GNU Radio is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GNU Radio; see the file COPYING. If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+#
+
+__all__ = ['tv_rx']
+
+import math
+from usrpm import usrp_dbid
+import db_base
+import db_instantiator
+
+def int_seq_to_str(seq):
+ """convert a sequence of integers into a string"""
+ return ''.join (map (chr, seq))
+
+def str_to_int_seq(str):
+ """convert a string to a list of integers"""
+ return map (ord, str)
+
+def control_byte_1():
+ RS = 0 # 0 = 166.66kHz reference
+ ATP = 7 # Disable internal AGC
+ return 0x80 | ATP<<3 | RS
+
+def control_byte_2():
+ STBY = 0 # powered on
+ XTO = 1 # turn off xtal out, which we don't have
+ ATC = 0 # not clear exactly, possibly speeds up or slows down AGC, which we are not using
+
+ c = 0xc2 | ATC<<5 | STBY<<4 | XTO
+ return c
+
+def bandswitch_byte(freq,bw):
+ if(bw>7.5e6):
+ P5 = 1
+ else:
+ P5 = 0
+
+ if freq < 121e6:
+ CP = 0
+ BS = 1
+ elif freq < 141e6:
+ CP = 1
+ BS = 1
+ elif freq < 166e6:
+ CP = 2
+ BS = 1
+ elif freq < 182e6:
+ CP = 3
+ BS = 1
+ elif freq < 286e6:
+ CP = 0
+ BS = 2
+ elif freq < 386e6:
+ CP = 1
+ BS = 2
+ elif freq < 446e6:
+ CP = 2
+ BS = 2
+ elif freq < 466e6:
+ CP = 3
+ BS = 2
+ elif freq < 506e6:
+ CP = 0
+ BS = 8
+ elif freq < 761e6:
+ CP = 1
+ BS = 8
+ elif freq < 846e6:
+ CP = 2
+ BS = 8
+ else: # limit is ~905 MHz
+ CP = 3
+ BS = 8
+ return CP<<6 | P5 << 4 | BS
+
+class db_dtt754(db_base.db_base):
+ def __init__(self, usrp, which):
+ """
+ Control custom DTT75403-based daughterboard.
+
+ @param usrp: instance of usrp.source_c
+ @param which: which side: 0 or 1 corresponding to RX_A or RX_B respectively
+ @type which: int
+ """
+ # sets _u and _which
+ db_base.db_base.__init__(self, usrp, which)
+
+ self._i2c_addr = (0x60, 0x62)[which]
+ self.bw = 7e6
+ self._IF = 36e6
+
+ self.f_ref = 166.6666e3
+ self._inverted = False
+
+ g = self.gain_range() # initialize gain
+ self.set_gain(float(g[0]+g[1]) / 2)
+
+ self.bypass_adc_buffers(False)
+
+ # Gain setting
+ def _set_rfagc(self,gain):
+ assert gain <= 60 and gain >= 0
+ # FIXME this has a 0.5V step between gain = 60 and gain = 59.
+ # Why are there two cases instead of a single linear case?
+ if gain == 60:
+ voltage = 4
+ else:
+ voltage = gain/60.0 * 2.25 + 1.25
+ dacword = int(4096*voltage/1.22/3.3) # 1.22 = opamp gain
+
+ assert dacword>=0 and dacword<4096
+ self._u.write_aux_dac(self._which, 1, dacword)
+
+ def _set_ifagc(self,gain):
+ assert gain <= 35 and gain >= 0
+ voltage = gain/35.0 * 2.1 + 1.4
+ dacword = int(4096*voltage/1.22/3.3) # 1.22 = opamp gain
+
+ assert dacword>=0 and dacword<4096
+ self._u.write_aux_dac(self._which, 0, dacword)
+
+ def _set_pga(self,pga_gain):
+ assert pga_gain >=0 and pga_gain <=20
+ if(self._which == 0):
+ self._u.set_pga (0, pga_gain)
+ else:
+ self._u.set_pga (2, pga_gain)
+
+ def gain_range(self):
+ return (0, 115, 1)
+
+ def set_gain(self,gain):
+ assert gain>=0 and gain<=115
+ if gain>60:
+ rfgain = 60
+ gain = gain - 60
+ else:
+ rfgain = gain
+ gain = 0
+ if gain > 35:
+ ifgain = 35
+ gain = gain - 35
+ else:
+ ifgain = gain
+ gain = 0
+ pgagain = gain
+ self._set_rfagc(rfgain)
+ self._set_ifagc(ifgain)
+ self._set_pga(pgagain)
+
+ def freq_range(self):
+ return (44e6, 900e6, 10e3)
+
+ def set_freq(self, target_freq):
+ """
+ @returns (ok, actual_baseband_freq) where:
+ ok is True or False and indicates success or failure,
+ actual_baseband_freq is the RF frequency that corresponds to DC in the IF.
+ """
+ r = self.freq_range()
+ if target_freq < r[0] or target_freq > r[1]:
+ return (False, 0)
+
+ target_lo_freq = target_freq + self._IF; # High side mixing
+
+ divisor = int(0.5+(target_lo_freq / self.f_ref))
+ actual_lo_freq = self.f_ref*divisor
+
+ if (divisor & ~0x7fff) != 0: # must be 15-bits or less
+ return (False, 0)
+
+ # build i2c command string
+ buf = [0] * 5
+ buf[0] = (divisor >> 8) & 0xff # DB1
+ buf[1] = divisor & 0xff # DB2
+ buf[2] = control_byte_1()
+ buf[3] = bandswitch_byte(actual_lo_freq,self.bw)
+ buf[4] = control_byte_2()
+
+ ok = self._u.write_i2c(self._i2c_addr, int_seq_to_str (buf))
+
+ self.freq = actual_lo_freq - self._IF
+
+ return (ok, actual_lo_freq)
+
+ def is_quadrature(self):
+ """
+ Return True if this board requires both I & Q analog channels.
+
+ This bit of info is useful when setting up the USRP Rx mux register.
+ """
+ return False
+
+ def spectrum_inverted(self):
+ """
+ The 43.75 MHz version is inverted
+ """
+ return self._inverted
+
+ def set_bw(self,bw):
+ """
+ Choose the SAW filter bandwidth, either 7MHz or 8MHz)
+ """
+ self.bw = bw
+ self.set_freq(self.freq)
+
+# hook this daughterboard class into the auto-instantiation framework
+
+# With DTT75403
+db_instantiator.add(usrp_dbid.DTT754,
+ lambda usrp, which : (db_dtt754(usrp, which),))
diff --git a/gr-usrp/src/db_dtt768.py b/gr-usrp/src/db_dtt768.py
new file mode 100644
index 000000000..dd342bd20
--- /dev/null
+++ b/gr-usrp/src/db_dtt768.py
@@ -0,0 +1,203 @@
+#
+# Copyright 2005 Free Software Foundation, Inc.
+#
+# This file is part of GNU Radio
+#
+# GNU Radio is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GNU Radio is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GNU Radio; see the file COPYING. If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+#
+
+__all__ = ['tv_rx']
+
+import math
+from usrpm import usrp_dbid
+import db_base
+import db_instantiator
+
+def int_seq_to_str(seq):
+ """convert a sequence of integers into a string"""
+ return ''.join (map (chr, seq))
+
+def str_to_int_seq(str):
+ """convert a string to a list of integers"""
+ return map (ord, str)
+
+def control_byte_4():
+ C = 0 # Charge Pump Current, no info on how to choose
+ R = 4 # 125 kHz fref
+
+
+ ATP = 7 # Disable internal AGC
+ return 0x80 | C<<5 | R
+
+def control_byte_5(freq,agcmode = 1):
+ if(agcmode):
+ if freq < 150e6:
+ return 0x3B
+ elif freq < 420e6:
+ return 0x7E
+ else:
+ return 0xB7
+ else:
+ if freq < 150e6:
+ return 0x39
+ elif freq < 420e6:
+ return 0x7C
+ else:
+ return 0xB5
+
+def control_byte_6():
+ ATC = 0 # AGC time constant = 100ms, 1 = 3S
+ IFE = 1 # IF AGC amplifier enable
+ AT = 0 # AGC control, ???
+
+ return ATC << 5 | IFE << 4 | AT
+
+def control_byte_7():
+ SAS = 1 # SAW Digital mode
+ AGD = 1 # AGC disable
+ ADS = 0 # AGC detector into ADC converter
+ T = 0 # Test mode, undocumented
+ return SAS << 7 | AGD << 5 | ADS << 4 | T
+
+class db_dtt768(db_base.db_base):
+ def __init__(self, usrp, which):
+ """
+ Control custom DTT76803-based daughterboard.
+
+ @param usrp: instance of usrp.source_c
+ @param which: which side: 0 or 1 corresponding to RX_A or RX_B respectively
+ @type which: int
+ """
+ # sets _u and _which
+ db_base.db_base.__init__(self, usrp, which)
+
+ self._i2c_addr = (0x60, 0x62)[which]
+ self._IF = 44e6
+
+ self.f_ref = 125e3
+ self._inverted = False
+
+ g = self.gain_range() # initialize gain
+ self.set_gain(float(g[0]+g[1]) / 2)
+
+ self.bypass_adc_buffers(False)
+
+ # Gain setting
+ def _set_rfagc(self,gain):
+ assert gain <= 60 and gain >= 0
+ # FIXME this has a 0.5V step between gain = 60 and gain = 59.
+ # Why are there two cases instead of a single linear case?
+ if gain == 60:
+ voltage = 4
+ else:
+ voltage = gain/60.0 * 2.25 + 1.25
+ dacword = int(4096*voltage/1.22/3.3) # 1.22 = opamp gain
+
+ assert dacword>=0 and dacword<4096
+ self._u.write_aux_dac(self._which, 1, dacword)
+
+ def _set_ifagc(self,gain):
+ assert gain <= 35 and gain >= 0
+ voltage = gain/35.0 * 2.1 + 1.4
+ dacword = int(4096*voltage/1.22/3.3) # 1.22 = opamp gain
+
+ assert dacword>=0 and dacword<4096
+ self._u.write_aux_dac(self._which, 0, dacword)
+
+ def _set_pga(self,pga_gain):
+ assert pga_gain >=0 and pga_gain <=20
+ if(self._which == 0):
+ self._u.set_pga (0, pga_gain)
+ else:
+ self._u.set_pga (2, pga_gain)
+
+ def gain_range(self):
+ return (0, 115, 1)
+
+ def set_gain(self,gain):
+ assert gain>=0 and gain<=115
+ if gain>60:
+ rfgain = 60
+ gain = gain - 60
+ else:
+ rfgain = gain
+ gain = 0
+ if gain > 35:
+ ifgain = 35
+ gain = gain - 35
+ else:
+ ifgain = gain
+ gain = 0
+ pgagain = gain
+ self._set_rfagc(rfgain)
+ self._set_ifagc(ifgain)
+ self._set_pga(pgagain)
+
+ def freq_range(self):
+ return (44e6, 900e6, 10e3)
+
+ def set_freq(self, target_freq):
+ """
+ @returns (ok, actual_baseband_freq) where:
+ ok is True or False and indicates success or failure,
+ actual_baseband_freq is the RF frequency that corresponds to DC in the IF.
+ """
+ r = self.freq_range()
+ if target_freq < r[0] or target_freq > r[1]:
+ return (False, 0)
+
+ target_lo_freq = target_freq + self._IF; # High side mixing
+
+ divisor = int(0.5+(target_lo_freq / self.f_ref))
+ actual_lo_freq = self.f_ref*divisor
+
+ if (divisor & ~0x7fff) != 0: # must be 15-bits or less
+ return (False, 0)
+
+ # build i2c command string
+ buf = [0] * 6
+ buf[0] = (divisor >> 8) & 0xff # DB1
+ buf[1] = divisor & 0xff # DB2
+ buf[2] = control_byte_4()
+ buf[3] = control_byte_5(target_freq)
+ buf[4] = control_byte_6()
+ buf[5] = control_byte_7()
+
+ ok = self._u.write_i2c(self._i2c_addr, int_seq_to_str (buf))
+
+ self.freq = actual_lo_freq - self._IF
+
+ return (ok, actual_lo_freq)
+
+ def is_quadrature(self):
+ """
+ Return True if this board requires both I & Q analog channels.
+
+ This bit of info is useful when setting up the USRP Rx mux register.
+ """
+ return False
+
+ def spectrum_inverted(self):
+ """
+ The 43.75 MHz version is inverted
+ """
+ return self._inverted
+
+# hook this daughterboard class into the auto-instantiation framework
+
+# With DTT76803
+db_instantiator.add(usrp_dbid.DTT768,
+ lambda usrp, which : (db_dtt768(usrp, which),))
diff --git a/gr-usrp/src/usrp.py b/gr-usrp/src/usrp.py
index d5eb1d5a2..d34142ad7 100644
--- a/gr-usrp/src/usrp.py
+++ b/gr-usrp/src/usrp.py
@@ -62,6 +62,8 @@ import db_flexrf_mimo
import db_tv_rx
import db_wbx
import db_xcvr2450
+import db_dtt754
+import db_dtt768
def _look_for_usrp(which):
"""
diff --git a/usrp/host/apps/burn-db-eeprom b/usrp/host/apps/burn-db-eeprom
index 54e40cefa..f7ad8ebcb 100755
--- a/usrp/host/apps/burn-db-eeprom
+++ b/usrp/host/apps/burn-db-eeprom
@@ -36,6 +36,8 @@ daughterboards = {
'tvrx' : (None, (TV_RX, 0x0000)),
'tvrx2' : (None, (TV_RX_REV_2, 0x0000)),
'tvrx3' : (None, (TV_RX_REV_3, 0x0000)),
+ 'dtt754' : (None, (DTT754, 0x0000)),
+ 'dtt768' : (None, (DTT768, 0x0000)),
'rfx400' : ((FLEX_400_TX, 0x0000), (FLEX_400_RX, 0x0000)),
'rfx900' : ((FLEX_900_TX, 0x0000), (FLEX_900_RX, 0x0000)),
'rfx1200' : ((FLEX_1200_TX, 0x0000), (FLEX_1200_RX, 0x0000)),
diff --git a/usrp/host/lib/legacy/usrp_dbid.dat b/usrp/host/lib/legacy/usrp_dbid.dat
index 956c9786a..c7dbeb213 100644
--- a/usrp/host/lib/legacy/usrp_dbid.dat
+++ b/usrp/host/lib/legacy/usrp_dbid.dat
@@ -69,6 +69,8 @@
"Flex 1800 Tx MIMO B" 0x0035
"TV Rx Rev 3" 0x0040
+"DTT754" 0x0041
+"DTT768" 0x0042
"WBX LO TX" 0x0050
"WBX LO RX" 0x0051
generated by cgit (git 2.34.1) at 2024-12-21 09:20:47 +0000