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author | matt | 2009-03-31 06:55:21 +0000 |
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committer | matt | 2009-03-31 06:55:21 +0000 |
commit | 0054bca4afa42ec61d83ce9466cecc0677c85ce4 (patch) | |
tree | 5ae23e94953ed181ca8d2b46768a0156e0221a1e /usrp2/fpga | |
parent | 72c3b388a969b2b879ac0fa8195d23c248abf60c (diff) | |
download | gnuradio-0054bca4afa42ec61d83ce9466cecc0677c85ce4.tar.gz gnuradio-0054bca4afa42ec61d83ce9466cecc0677c85ce4.tar.bz2 gnuradio-0054bca4afa42ec61d83ce9466cecc0677c85ce4.zip |
everything but CRC
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@10717 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'usrp2/fpga')
-rw-r--r-- | usrp2/fpga/simple_gemac/simple_gemac_tb.v | 32 | ||||
-rw-r--r-- | usrp2/fpga/simple_gemac/simple_gemac_tx.v | 22 |
2 files changed, 37 insertions, 17 deletions
diff --git a/usrp2/fpga/simple_gemac/simple_gemac_tb.v b/usrp2/fpga/simple_gemac/simple_gemac_tb.v index 30a475960..eacad7545 100644 --- a/usrp2/fpga/simple_gemac/simple_gemac_tb.v +++ b/usrp2/fpga/simple_gemac/simple_gemac_tb.v @@ -51,16 +51,16 @@ module simple_gemac_tb; input [7:0] data_start; input [31:0] data_len; begin - $display("Sending Packet"); + $display("Sending Packet Len=%d", data_len); $display($time); - count <= 0; + count <= 1; tx_data <= data_start; tx_error <= 0; tx_valid <= 1; while(~tx_ack) @(posedge tx_clk); - $display("Packet Accepted"); - $display($time); +// $display("Packet Accepted"); +// $display($time); while(count < data_len) begin tx_data <= tx_data + 1; @@ -75,7 +75,7 @@ module simple_gemac_tb; task SendPacketFromFile; input [31:0] data_len; begin - $display("Sending Packet From File"); + $display("Sending Packet From File Len=%d",data_len); $display($time); $readmemh( "test_packet.mem",pkt_rom ); count = 0; @@ -84,8 +84,8 @@ module simple_gemac_tb; tx_valid = 1; while(~tx_ack) @(posedge tx_clk); - $display("Packet Accepted"); - $display($time); +// $display("Packet Accepted"); +// $display($time); count = 1; while(count < data_len) begin @@ -112,17 +112,27 @@ module simple_gemac_tb; initial begin @(negedge reset); - repeat (20) + repeat (100) @(posedge clk); SendFlowCtrl; - //repeat (200) + repeat (200) @(posedge clk); SendPacket(8'hAA,10); - //repeat (100) - // @(posedge clk); + repeat (100) + @(posedge clk); SendPacketFromFile(60); + repeat (100) + @(posedge clk); SendPacketFromFile(59); + repeat (100) + @(posedge clk); SendPacketFromFile(58); + repeat (100) + @(posedge clk); + SendPacketFromFile(61); + repeat (100) + @(posedge clk); + SendPacketFromFile(62); #10000 $finish; end diff --git a/usrp2/fpga/simple_gemac/simple_gemac_tx.v b/usrp2/fpga/simple_gemac/simple_gemac_tx.v index b104d91a5..783f69e45 100644 --- a/usrp2/fpga/simple_gemac/simple_gemac_tx.v +++ b/usrp2/fpga/simple_gemac/simple_gemac_tx.v @@ -195,15 +195,25 @@ module simple_gemac_tx wire clear_crc = (tx_state == TX_IDLE); - wire calc_crc_pre = (tx_state==TX_FIRSTBYTE)||(tx_state==TX_IN_FRAME)|| - ((tx_state==TX_IN_FRAME_2)&tx_valid )||(tx_state==TX_PAD )||(tx_state[6]); - reg calc_crc; - always @(posedge tx_clk) - calc_crc <= calc_crc_pre; - +// wire calc_crc_pre = (tx_state==TX_FIRSTBYTE)||(tx_state==TX_IN_FRAME)|| +// ((tx_state ==TX_IN_FRAME_2)&tx_valid )||(tx_state==TX_PAD )||(tx_state[6]); + // reg calc_crc; + // always @(posedge tx_clk) + // calc_crc <= calc_crc_pre; + wire calc_crc = 0; + + /* + wire calc_crc = ~(tx_state==TX_IDLE) & + ~(tx_state==TX_IDLE) & + ~(tx_state==TX_IDLE) & + ~(tx_state==TX_IDLE) & + */ crc crc(.clk(tx_clk), .reset(reset), .clear(clear_crc), .data(txd_pre), .calc(calc_crc), .crc_out(crc_out)); + +// .data(txd_pre), .calc(calc_crc & ~(tx_state==TX_CRC_0)), .crc_out(crc_out)); + assign tx_ack = (tx_state == TX_FIRSTBYTE); reg tx_valid_d1; |