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| author | matt | 2008-10-22 00:29:15 +0000 |
|---|---|---|
| committer | matt | 2008-10-22 00:29:15 +0000 |
| commit | afc6e2b005581d1061b47c464f47ff2b48c6418b (patch) | |
| tree | fd0e877162f5a4e8cc027c8c83ce61c7c443867d /usrp2/fpga/top | |
| parent | b62e0a70a272a8e63b308cc1602f3973790a240e (diff) | |
| download | gnuradio-afc6e2b005581d1061b47c464f47ff2b48c6418b.tar.gz gnuradio-afc6e2b005581d1061b47c464f47ff2b48c6418b.tar.bz2 gnuradio-afc6e2b005581d1061b47c464f47ff2b48c6418b.zip | |
make rev2 compile again
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9815 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'usrp2/fpga/top')
| -rw-r--r-- | usrp2/fpga/top/u2_rev2/Makefile | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/usrp2/fpga/top/u2_rev2/Makefile b/usrp2/fpga/top/u2_rev2/Makefile index 84243baf8..22aaeafe2 100644 --- a/usrp2/fpga/top/u2_rev2/Makefile +++ b/usrp2/fpga/top/u2_rev2/Makefile @@ -62,7 +62,6 @@ control_lib/cascadefifo2.v \ control_lib/dcache.v \ control_lib/decoder_3_8.v \ control_lib/dpram32.v \ -control_lib/extram_interface.v \ control_lib/fifo_2clock.v \ control_lib/fifo_2clock_casc.v \ control_lib/gray2bin.v \ @@ -89,6 +88,7 @@ control_lib/simple_uart_rx.v \ control_lib/oneshot_2clk.v \ control_lib/sd_spi.v \ control_lib/sd_spi_wb.v \ +control_lib/wb_bridge_16_32.v \ coregen/fifo_xlnx_2Kx36_2clk.v \ coregen/fifo_xlnx_2Kx36_2clk.xco \ coregen/fifo_xlnx_512x36_2clk.v \ @@ -120,6 +120,7 @@ eth/rtl/verilog/flow_ctrl_tx.v \ eth/rtl/verilog/miim/eth_clockgen.v \ eth/rtl/verilog/miim/eth_outputcontrol.v \ eth/rtl/verilog/miim/eth_shiftreg.v \ +extram/wb_zbt16_b.v \ opencores/8b10b/decode_8b10b.v \ opencores/8b10b/encode_8b10b.v \ opencores/aemb/rtl/verilog/aeMB_bpcu.v \ |