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| author | Matt Ettus | 2009-10-01 00:21:24 -0700 |
|---|---|---|
| committer | Matt Ettus | 2009-10-01 00:21:24 -0700 |
| commit | 21e931766545ff93dda5ef1b72dd03f3786967ab (patch) | |
| tree | 4b337a566c42e879414d4a2bf92fa577cca88b77 /usrp2/fpga/top/single_u2_sim | |
| parent | 413d26237e93b8b019c719ed186e228a8eeb41b8 (diff) | |
| download | gnuradio-21e931766545ff93dda5ef1b72dd03f3786967ab.tar.gz gnuradio-21e931766545ff93dda5ef1b72dd03f3786967ab.tar.bz2 gnuradio-21e931766545ff93dda5ef1b72dd03f3786967ab.zip | |
fullchip sim now compiles again, after moving eth and models over to new simple_gemac
Diffstat (limited to 'usrp2/fpga/top/single_u2_sim')
| -rw-r--r-- | usrp2/fpga/top/single_u2_sim/single_u2_sim.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/fpga/top/single_u2_sim/single_u2_sim.v b/usrp2/fpga/top/single_u2_sim/single_u2_sim.v index 016815ff7..2a7b24849 100644 --- a/usrp2/fpga/top/single_u2_sim/single_u2_sim.v +++ b/usrp2/fpga/top/single_u2_sim/single_u2_sim.v @@ -178,7 +178,7 @@ module single_u2_sim(); .adc_b(adc_b),.adc_ovf_b(adc_ovf_b),.adc_on_b(adc_on_b),.adc_oe_b(adc_oe_b) ); wire [2:0] speed; - Phy_sim phy_model + phy_sim phy_model (.Gtx_clk(GMII_GTX_CLK), . Rx_clk(GMII_RX_CLK), .Tx_clk(GMII_TX_CLK), .Tx_er(GMII_TX_ER), .Tx_en(GMII_TX_EN), .Txd(GMII_TXD), .Rx_er(GMII_RX_ER), .Rx_dv(GMII_RX_DV), .Rxd(GMII_RXD), |