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| author | Johnathan Corgan | 2010-02-28 12:47:43 -0800 |
|---|---|---|
| committer | Johnathan Corgan | 2010-02-28 12:47:43 -0800 |
| commit | a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 (patch) | |
| tree | 77121ca27b951f9bd687dbba33f6a9383ac74d5a /usrp2/fpga/sdr_lib/HB.sav | |
| parent | db29a2cfc18554ae0a3c55a4e13dc4cbfa86317f (diff) | |
| download | gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.tar.gz gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.tar.bz2 gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.zip | |
Remove usrp1 and usrp2 FPGA files. These are now hosted at:
git://ettus.sourcerepo.com/ettus/fpga.git
...under the 'usrp1' and 'usrp2' top-level directories.
Diffstat (limited to 'usrp2/fpga/sdr_lib/HB.sav')
| -rw-r--r-- | usrp2/fpga/sdr_lib/HB.sav | 56 |
1 files changed, 0 insertions, 56 deletions
diff --git a/usrp2/fpga/sdr_lib/HB.sav b/usrp2/fpga/sdr_lib/HB.sav deleted file mode 100644 index c5087e8a6..000000000 --- a/usrp2/fpga/sdr_lib/HB.sav +++ /dev/null @@ -1,56 +0,0 @@ -[size] 1400 967 -[pos] -1 -1 -*-46.395245 2565000000000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -[treeopen] hb_dec_tb. -@420 -hb_dec_tb.data_in[17:0] -@28 -hb_dec_tb.strobe_in -hb_dec_tb.strobe_out -hb_dec_tb.uut.write_even -@22 -hb_dec_tb.uut.addr_even[3:0] -@420 -hb_dec_tb.uut.data_even[17:0] -hb_dec_tb.uut.data_odd_a[17:0] -hb_dec_tb.uut.data_odd_b[17:0] -hb_dec_tb.uut.data_odd_c[17:0] -hb_dec_tb.uut.data_odd_d[17:0] -@28 -hb_dec_tb.uut.write_odd -@420 -hb_dec_tb.uut.prod1[35:0] -hb_dec_tb.uut.prod2[35:0] -@24 -hb_dec_tb.uut.phase[2:0] -@28 -hb_dec_tb.uut.stb_in -hb_dec_tb.uut.stb_out -@420 -hb_dec_tb.uut.sum2[17:0] -hb_dec_tb.uut.stb_out_pre[15:0] -@28 -hb_dec_tb.uut.do_acc -hb_dec_tb.uut.clear -@420 -hb_dec_tb.uut.sum1[17:0] -hb_dec_tb.uut.coeff1[17:0] -hb_dec_tb.uut.prod1[35:0] -hb_dec_tb.uut.prod2[35:0] -hb_dec_tb.uut.final_sum[17:0] -hb_dec_tb.uut.coeff2[17:0] -hb_dec_tb.uut.sum_of_prod[21:0] -hb_dec_tb.data_out[17:0] -@28 -hb_dec_tb.uut.do_acc -hb_dec_tb.uut.clear -@24 -hb_dec_tb.uut.addr_odd_a[3:0] -hb_dec_tb.uut.addr_odd_b[3:0] -hb_dec_tb.uut.addr_odd_c[3:0] -hb_dec_tb.uut.addr_odd_d[3:0] -@28 -hb_dec_tb.uut.write_odd -hb_dec_tb.uut.write_even -@22 -hb_dec_tb.uut.data_even[17:0] |