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author | Johnathan Corgan | 2010-02-28 12:47:43 -0800 |
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committer | Johnathan Corgan | 2010-02-28 12:47:43 -0800 |
commit | a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 (patch) | |
tree | 77121ca27b951f9bd687dbba33f6a9383ac74d5a /usrp2/fpga/control_lib/reset_sync.v | |
parent | db29a2cfc18554ae0a3c55a4e13dc4cbfa86317f (diff) | |
download | gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.tar.gz gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.tar.bz2 gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.zip |
Remove usrp1 and usrp2 FPGA files. These are now hosted at:
git://ettus.sourcerepo.com/ettus/fpga.git
...under the 'usrp1' and 'usrp2' top-level directories.
Diffstat (limited to 'usrp2/fpga/control_lib/reset_sync.v')
-rw-r--r-- | usrp2/fpga/control_lib/reset_sync.v | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/usrp2/fpga/control_lib/reset_sync.v b/usrp2/fpga/control_lib/reset_sync.v deleted file mode 100644 index 94d966840..000000000 --- a/usrp2/fpga/control_lib/reset_sync.v +++ /dev/null @@ -1,16 +0,0 @@ - - -module reset_sync - (input clk, - input reset_in, - output reg reset_out); - - reg reset_int; - - always @(posedge clk or posedge reset_in) - if(reset_in) - {reset_out,reset_int} <= 2'b11; - else - {reset_out,reset_int} <= {reset_int,1'b0}; - -endmodule // reset_sync |