Remove usrp1 and usrp2 FPGA files. These are now hosted at:

git://ettus.sourcerepo.com/ettus/fpga.git

...under the 'usrp1' and 'usrp2' top-level directories.

1 files changed, 0 insertions, 13 deletions

diff --git a/usrp2/fpga/control_lib/mux_32_4.v b/usrp2/fpga/control_lib/mux_32_4.v
deleted file mode 100644
index fef5812e9..000000000
--- a/usrp2/fpga/control_lib/mux_32_4.v
+++ /dev/null
@@ -1,13 +0,0 @@
-
-
-module mux_32_4
-  (input [1:0] sel,
-   input [31:0] in0,
-   input [31:0] in1,
-   input [31:0] in2,
-   input [31:0] in3,
-   output [31:0] out);
-
-   assign 	 out = sel[1] ? (sel[0] ? in3 : in2) : (sel[0] ? in1 : in0);
-
-endmodule // mux_32_4