Merged r11377:11390 from jcorgan/usrp-headers in to trunk.

* Public USRP(1) header files are now in their own source directory
  and install into $(includedir)/usrp.  This was done to avoid name
  clashes in the top-level include directory.

  Only users who are developing directly to libusrp in C++ are
  affected; the GNU Radio C++ and Python APIs are unchanged.

  The simple change required by this update is to change:

  #include <usrp_*.h> 

  to #include 

  <usrp/usrp_*.h> 

  ...in your source code.

* Removed usrp-inband code from tree (put into limbo directory.)
  This code has become unmaintained and has started to suffer
  from bitrot.  A checkpoint tag has been made for anyone still
  needing to use it:

  http://gnuradio.org/svn/gnuradio/tags/checkpoints/trunk-20090708-pre-usrp-reorg

  The plan during the 3.2->3.3 development cycle is to replace the
  functions done by the in-band code with extensions to the existing
  gr-usrp blocks using the new message passing architecture.

  The USRP hardware FPGA code that provided the inband interface
  has not been removed; however, it too has become unmaintained and
  will likely be rewritten/replaced during the 3.3 timeframe.

The trunk passes distcheck.




git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11394 221aa14e-8319-0410-a670-987f0aec2ac5

20 files changed, 3288 insertions, 0 deletions

diff --git a/usrp/host/include/Makefile.am b/usrp/host/include/Makefile.am
new file mode 100644
index 000000000..5de5fe58e
--- /dev/null
+++ b/usrp/host/include/Makefile.am
@@ -0,0 +1,23 @@
+#
+# Copyright 2009 Free Software Foundation, Inc.
+# 
+# This file is part of GNU Radio
+# 
+# GNU Radio is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GNU Radio is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with GNU Radio; see the file COPYING.  If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+# 
+
+SUBDIRS = usrp
+
diff --git a/usrp/host/include/usrp/Makefile.am b/usrp/host/include/usrp/Makefile.am
new file mode 100644
index 000000000..91d439234
--- /dev/null
+++ b/usrp/host/include/usrp/Makefile.am
@@ -0,0 +1,49 @@
+#
+# Copyright 2009 Free Software Foundation, Inc.
+# 
+# This file is part of GNU Radio
+# 
+# GNU Radio is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GNU Radio is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with GNU Radio; see the file COPYING.  If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+# 
+
+include $(top_srcdir)/Makefile.common
+
+usrpincludedir = $(includedir)/usrp
+
+usrpinclude_HEADERS = \
+	db_base.h \
+	db_basic.h \
+	db_dbs_rx.h \
+	db_dtt754.h \
+	db_dtt768.h \
+	db_flexrf.h \
+	db_flexrf_mimo.h \
+	db_tv_rx.h \
+	db_xcvr2450.h \
+	usrp_basic.h \
+	usrp_bytesex.h \
+	usrp_dbid.h \
+	usrp_local_sighandler.h \
+	usrp_prims.h \
+	usrp_slots.h \
+	usrp_standard.h \
+	usrp_subdev_spec.h \
+	usrp_tune_result.h
+
+if PYTHON
+swiginclude_HEADERS = \
+	db_base.i
+endif
diff --git a/usrp/host/include/usrp/db_base.h b/usrp/host/include/usrp/db_base.h
new file mode 100644
index 000000000..35470891a
--- /dev/null
+++ b/usrp/host/include/usrp/db_base.h
@@ -0,0 +1,119 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+//
+
+#ifndef INCLUDED_DB_BASE_H
+#define INCLUDED_DB_BASE_H
+
+#include <string>
+#include <boost/shared_ptr.hpp>
+#include <boost/weak_ptr.hpp>
+#include <iosfwd>
+
+class db_base;
+typedef boost::shared_ptr<db_base> db_base_sptr;
+
+class usrp_basic;
+typedef boost::shared_ptr<usrp_basic> usrp_basic_sptr;
+
+struct freq_result_t
+{
+  bool  ok;
+  double baseband_freq;
+};
+
+/******************************************************************************/
+
+/*!
+ * \brief Abstract base class for all USRP daughterboards
+ * \ingroup usrp
+ */
+class db_base
+{
+ protected:
+  bool				d_is_shutdown;
+  usrp_basic		       *d_raw_usrp;
+  int 				d_which;
+  double			d_lo_offset;
+
+  void _enable_refclk(bool enable);
+  virtual double _refclk_freq();
+  virtual int _refclk_divisor();
+
+  usrp_basic *usrp(){
+    return d_raw_usrp;
+  }
+
+ public:
+  db_base(boost::shared_ptr<usrp_basic> usrp, int which);
+  virtual ~db_base();
+
+  int dbid();
+  std::string name();
+  std::string side_and_name();
+  int which() { return d_which; }
+
+  bool bypass_adc_buffers(bool bypass);
+  bool set_atr_mask(int v);
+  bool set_atr_txval(int v);
+  bool set_atr_rxval(int v);
+  bool set_atr_tx_delay(int v);
+  bool set_atr_rx_delay(int v);
+  bool set_lo_offset(double offset);
+  double lo_offset() { return d_lo_offset; }
+
+
+  ////////////////////////////////////////////////////////
+  // derived classes should override the following methods
+
+protected:
+  friend class usrp_basic;
+
+  /*!
+   * Called to shutdown daughterboard.  Called from dtor and usrp_basic dtor.
+   *
+   * N.B., any class that overrides shutdown MUST call shutdown in its destructor.
+   */
+  virtual void shutdown();
+
+
+public:
+  virtual float gain_min() = 0;
+  virtual float gain_max() = 0;
+  virtual float gain_db_per_step() = 0;
+  virtual double freq_min() = 0;
+  virtual double freq_max() = 0;
+  virtual struct freq_result_t set_freq(double target_freq) = 0;
+  virtual bool set_gain(float gain) = 0;
+  virtual bool is_quadrature() = 0;
+  virtual bool i_and_q_swapped();
+  virtual bool spectrum_inverted();
+  virtual bool set_enable(bool on);
+  virtual bool set_auto_tr(bool on);
+  virtual bool select_rx_antenna(int which_antenna);
+  virtual bool select_rx_antenna(const std::string &which_antenna);
+  virtual bool set_bw(float bw);
+};
+
+
+std::ostream & operator<<(std::ostream &os, db_base &x);
+
+#endif /* INCLUDED_DB_BASE_H */
diff --git a/usrp/host/include/usrp/db_base.i b/usrp/host/include/usrp/db_base.i
new file mode 100644
index 000000000..78c72b8c3
--- /dev/null
+++ b/usrp/host/include/usrp/db_base.i
@@ -0,0 +1,102 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+//
+
+
+%{
+#include <usrp/db_base.h>
+%}
+
+%include <gr_shared_ptr.i>
+
+class usrp_tune_result
+{
+public:  
+  usrp_tune_result(double baseband=0, double dxc=0, 
+		   double residual=0, bool inv=0);
+  ~usrp_tune_result();
+
+  double baseband_freq;
+  double dxc_freq;
+  double residual_freq;
+  bool  inverted;
+};
+
+struct freq_result_t
+{
+  bool  ok;
+  double baseband_freq;
+};
+
+class db_base
+{
+ private:
+  db_base(boost::shared_ptr<usrp_basic> usrp, int which);
+
+ public:
+  virtual ~db_base();
+
+  int dbid();
+  std::string name();
+  std::string side_and_name();
+  int which() { return d_which; }
+
+  bool bypass_adc_buffers(bool bypass);
+  bool set_atr_mask(int v);
+  bool set_atr_txval(int v);
+  bool set_atr_rxval(int v);
+  bool set_atr_tx_delay(int v);
+  bool set_atr_rx_delay(int v);
+  bool set_lo_offset(double offset);
+  double lo_offset() { return d_lo_offset; }
+
+  virtual float gain_min() = 0;
+  virtual float gain_max() = 0;
+  virtual float gain_db_per_step() = 0;
+  virtual double freq_min() = 0;
+  virtual double freq_max() = 0;
+  virtual struct freq_result_t set_freq(double target_freq) = 0;
+  virtual bool set_gain(float gain) = 0;
+  virtual bool is_quadrature() = 0;
+  virtual bool i_and_q_swapped();
+  virtual bool spectrum_inverted();
+  virtual bool set_enable(bool on);
+  virtual bool set_auto_tr(bool on);
+  virtual bool select_rx_antenna(int which_antenna);
+  virtual bool select_rx_antenna(const std::string &antenna);
+  virtual bool set_bw(float bw);
+};
+
+// Create templates for db's, vectors of db's, and vector of vectors of db's
+typedef boost::shared_ptr<db_base> db_base_sptr;
+%template(db_base_sptr) boost::shared_ptr<db_base>;
+%template(db_base_sptr_vector) std::vector<db_base_sptr>;
+%template(db_base_sptr_vector_vector) std::vector<std::vector<db_base_sptr> >;
+
+// Set better class name in Python
+// Enable freq_range and gain_range from public methods of class not implemented in C++
+// And create a dummy wrapper for backwards compatability with some of the example code
+%pythoncode %{
+  db_base_sptr.__repr__ = lambda self: "<db_base::%s>" % (self.name(),)
+  db_base_sptr.freq_range = lambda self: (self.freq_min(), self.freq_max(), 1)
+  db_base_sptr.gain_range = lambda self: (self.gain_min(), self.gain_max(), self.gain_db_per_step())
+
+%}
diff --git a/usrp/host/include/usrp/db_basic.h b/usrp/host/include/usrp/db_basic.h
new file mode 100644
index 000000000..7f81733f4
--- /dev/null
+++ b/usrp/host/include/usrp/db_basic.h
@@ -0,0 +1,99 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+
+#ifndef DB_BASIC_H
+#define DB_BASIC_H
+
+#include <usrp/db_base.h>
+
+
+/******************************************************************************/
+
+
+class db_basic_tx : public db_base
+{
+public:
+  db_basic_tx(usrp_basic_sptr usrp, int which);
+  ~db_basic_tx();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  double freq_min();
+  double freq_max();
+  struct freq_result_t set_freq(double target_freq);
+  bool  set_gain(float gain);
+  bool  is_quadrature();
+};
+
+
+/******************************************************************************/
+
+
+class db_basic_rx : public db_base
+{
+ public:
+  db_basic_rx(usrp_basic_sptr usrp, int which, int subdev);
+  ~db_basic_rx();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  double freq_min();
+  double freq_max();
+  struct freq_result_t set_freq(double target_freq);
+  bool set_gain(float gain);
+  bool is_quadrature();
+
+private:
+  int d_subdev;
+};
+
+
+/******************************************************************************/
+
+
+class db_lf_rx : public db_basic_rx
+{
+ public:
+  db_lf_rx(usrp_basic_sptr usrp, int which, int subdev);
+  ~db_lf_rx();
+  
+  double freq_min();
+  double freq_max();
+};
+
+
+/******************************************************************************/
+
+
+class db_lf_tx : public db_basic_tx
+{ 
+ public:
+  db_lf_tx(usrp_basic_sptr usrp, int which);
+  ~db_lf_tx();
+  
+  double freq_min();
+  double freq_max();
+};
+
+
+#endif
diff --git a/usrp/host/include/usrp/db_dbs_rx.h b/usrp/host/include/usrp/db_dbs_rx.h
new file mode 100644
index 000000000..7f869637d
--- /dev/null
+++ b/usrp/host/include/usrp/db_dbs_rx.h
@@ -0,0 +1,83 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+
+#ifndef DB_DBS_RX_H
+#define DB_DBS_RX_H
+
+#include <usrp/db_base.h>
+#include <vector>
+
+#if 0
+struct bw_t {
+  int m;
+  int fdac;
+  float div;
+};
+#endif
+
+class db_dbs_rx : public db_base
+{
+private:
+  int d_osc, d_cp, d_n, d_div2, d_r, d_r_int;
+  int d_fdac, d_m, d_dl, d_ade, d_adl, d_gc1, d_gc2, d_diag;
+  int d_i2c_addr;
+  
+  // Internal gain functions
+  void _write_reg(int regno, int v);
+  void _write_regs(int starting_regno, const std::vector<int> &vals);
+  std::vector<int> _read_status();
+  void _send_reg(int regno);
+  void _set_m(int m);
+  void _set_fdac(int fdac);
+  void _set_dl(int dl);
+  void _set_gc2(int gc2);
+  void _set_gc1(int gc1);
+  void _set_pga(int pga_gain);
+
+  // Internal frequency function
+  void _set_osc(int osc);
+  void _set_cp(int cp);
+  void _set_n(int n);
+  void _set_div2(int div2);
+  void _set_r(int r);
+  void _set_ade(int ade);
+
+  int _refclk_divisor();
+
+protected:
+  void shutdown();
+
+public:
+  db_dbs_rx(usrp_basic_sptr usrp, int which);
+  ~db_dbs_rx();
+
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  double freq_min();
+  double freq_max();
+  struct freq_result_t set_freq(double freq);
+  bool  set_gain(float gain);
+  bool  is_quadrature();
+  bool  set_bw(float bw);
+};
+
+#endif
diff --git a/usrp/host/include/usrp/db_dtt754.h b/usrp/host/include/usrp/db_dtt754.h
new file mode 100644
index 000000000..4fb952824
--- /dev/null
+++ b/usrp/host/include/usrp/db_dtt754.h
@@ -0,0 +1,57 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+
+#ifndef DB_DTT754_H
+#define DB_DTT754_H
+
+#include <usrp/db_base.h>
+#include <boost/shared_ptr.hpp>
+
+class db_dtt754 : public db_base
+{
+public:
+  db_dtt754(usrp_basic_sptr usrp, int which);
+  ~db_dtt754();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool  set_gain(float gain);
+
+  double freq_min();
+  double freq_max();
+  struct freq_result_t set_freq(double target_freq);
+  
+  bool is_quadrature();
+  bool spectrum_inverted();
+  bool set_bw(float bw);
+
+private:
+  void _set_rfagc(float gain);
+  void _set_ifagc(float gain);
+  void _set_pga(float pga_gain);
+
+  int d_i2c_addr;
+  float d_bw, d_freq, d_IF, d_f_ref;
+  bool d_inverted;
+};
+
+#endif
diff --git a/usrp/host/include/usrp/db_dtt768.h b/usrp/host/include/usrp/db_dtt768.h
new file mode 100644
index 000000000..78e157e79
--- /dev/null
+++ b/usrp/host/include/usrp/db_dtt768.h
@@ -0,0 +1,57 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+
+#ifndef DB_DTT768_H
+#define DB_DTT768_H
+
+#include <usrp/db_base.h>
+#include <boost/shared_ptr.hpp>
+
+class db_dtt768 : public db_base
+{
+public:
+  db_dtt768(usrp_basic_sptr usrp, int which);
+  ~db_dtt768();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool  set_gain(float gain);
+
+  double freq_min();
+  double freq_max();
+  struct freq_result_t set_freq(double target_freq);
+  
+  bool is_quadrature();
+  bool spectrum_inverted();
+  bool set_bw(float bw);
+
+private:
+  void _set_rfagc(float gain);
+  void _set_ifagc(float gain);
+  void _set_pga(float pga_gain);
+
+  int d_i2c_addr;
+  float d_bw, d_freq, d_IF, d_f_ref;
+  bool d_inverted;
+};
+
+#endif
diff --git a/usrp/host/include/usrp/db_flexrf.h b/usrp/host/include/usrp/db_flexrf.h
new file mode 100644
index 000000000..3adad302d
--- /dev/null
+++ b/usrp/host/include/usrp/db_flexrf.h
@@ -0,0 +1,355 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+
+#ifndef DB_FLEXRF_H
+#define DB_FLEXRF_H
+
+#include <usrp/db_base.h>
+#include <cmath>
+
+//debug_using_gui = true                // Must be set to True or False
+#define debug_using_gui false           // Must be set to True or False
+
+class _AD4360_common;
+
+class flexrf_base : public db_base
+{
+public:
+  flexrf_base(usrp_basic_sptr usrp, int which, int _power_on=0);
+  ~flexrf_base();
+
+  struct freq_result_t set_freq(double freq);
+
+  bool  is_quadrature();
+  double freq_min();
+  double freq_max();
+
+protected:
+  void _write_all(int R, int control, int N);
+  void _write_control(int control);
+  void _write_R(int R);
+  void _write_N(int N);
+  void _write_it(int v);
+  bool _lock_detect();
+
+  virtual bool _compute_regs(double freq, int &retR, int &retcontrol, 
+			     int &retN, double &retfreq);
+  int  _compute_control_reg();
+  int _refclk_divisor();
+  double _refclk_freq();
+
+  bool _set_pga(float pga_gain);
+
+  int power_on() { return d_power_on; }
+  int power_off() { return 0; }
+
+  bool d_first;
+  int  d_spi_format;
+  int  d_spi_enable;
+  int  d_power_on;
+  int  d_PD;
+
+  _AD4360_common *d_common;
+};
+
+// ----------------------------------------------------------------
+
+class flexrf_base_tx : public flexrf_base
+{
+protected:
+  void shutdown();
+
+public:
+  flexrf_base_tx(usrp_basic_sptr usrp, int which, int _power_on=0);
+  ~flexrf_base_tx();
+
+  // All RFX tx d'boards have fixed gain
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+
+  bool set_auto_tr(bool on);
+  bool set_enable(bool on);
+  bool set_gain(float gain);
+};
+
+class flexrf_base_rx : public flexrf_base
+{
+protected:
+  void shutdown();
+
+public:
+  flexrf_base_rx(usrp_basic_sptr usrp, int which, int _power_on=0);
+  ~flexrf_base_rx();
+    
+  bool set_auto_tr(bool on);
+  bool select_rx_antenna(int which_antenna);
+  bool select_rx_antenna(const std::string &which_antenna);
+  bool set_gain(float gain);
+
+};
+
+// ----------------------------------------------------------------
+
+
+class _AD4360_common
+{
+public:
+  _AD4360_common();
+  virtual ~_AD4360_common();
+
+  virtual double freq_min() = 0;
+  virtual double freq_max() = 0;
+
+  bool _compute_regs(double refclk_freq, double freq, int &retR, 
+		     int &retcontrol, int &retN, double &retfreq);
+  int _compute_control_reg();
+  virtual int _refclk_divisor();
+  int _prescaler();
+
+  void R_DIV(int div) { d_R_DIV = div; }
+
+protected:
+  int d_R_RSV, d_BSC, d_TEST, d_LDP, d_ABP, d_N_RSV, d_PL, d_MTLD;
+  int d_CPG, d_CP3S, d_PDP, d_MUXOUT, d_CR, d_PC;
+
+  // FIXME: d_PD might cause conflict from flexrf_base
+  int d_A_DIV, d_B_DIV, d_R_DIV, d_P, d_PD, d_CP2, d_CP1, d_DIVSEL;
+  int d_DIV2, d_CPGAIN, d_freq_mult;
+
+};
+
+//----------------------------------------------------------------------
+
+class _2400_common : public _AD4360_common
+{
+ public:
+  _2400_common();
+  ~_2400_common() {}
+ 
+  double freq_min();
+  double freq_max();
+};
+
+//----------------------------------------------------------------------
+
+class _1200_common : public _AD4360_common
+{
+public:
+  _1200_common();
+  ~_1200_common() {}
+
+  double freq_min();
+  double freq_max();
+};
+
+//-------------------------------------------------------------------------
+
+class _1800_common : public _AD4360_common
+{
+ public:
+  _1800_common();
+  ~_1800_common() {}
+
+  double freq_min();
+  double freq_max();
+};
+
+//-------------------------------------------------------------------------
+
+class _900_common : public _AD4360_common
+{
+public:
+  _900_common();
+  ~_900_common() {}
+  
+  double freq_min();
+  double freq_max();
+};
+
+//-------------------------------------------------------------------------
+
+class _400_common : public _AD4360_common
+{
+public:
+  _400_common();
+  ~_400_common() {}
+
+  double freq_min();
+  double freq_max();
+};
+
+class _400_tx : public _400_common
+{
+public:
+  _400_tx();
+  ~_400_tx() {}
+};
+
+class _400_rx : public _400_common
+{
+public:
+  _400_rx();
+  ~_400_rx() {}
+};
+
+//------------------------------------------------------------    
+
+class db_flexrf_2400_tx : public flexrf_base_tx
+{
+ public:
+  db_flexrf_2400_tx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_2400_tx();
+
+  // Wrapper calls to d_common functions
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+class db_flexrf_2400_rx : public flexrf_base_rx
+{
+public:
+  db_flexrf_2400_rx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_2400_rx();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool i_and_q_swapped();
+
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+//------------------------------------------------------------    
+
+class db_flexrf_1200_tx : public flexrf_base_tx
+{
+public:
+  db_flexrf_1200_tx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_1200_tx();
+
+  // Wrapper calls to d_common functions
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+class db_flexrf_1200_rx : public flexrf_base_rx
+{
+public:
+  db_flexrf_1200_rx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_1200_rx();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool i_and_q_swapped();
+
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+//------------------------------------------------------------    
+
+class db_flexrf_1800_tx : public flexrf_base_tx
+{
+ public:
+  db_flexrf_1800_tx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_1800_tx();
+
+  // Wrapper calls to d_common functions
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+class db_flexrf_1800_rx : public flexrf_base_rx
+{
+public:
+  db_flexrf_1800_rx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_1800_rx();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool i_and_q_swapped();
+
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+//------------------------------------------------------------    
+
+class db_flexrf_900_tx : public flexrf_base_tx
+{
+ public:
+  db_flexrf_900_tx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_900_tx();
+
+  // Wrapper calls to d_common functions
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+class db_flexrf_900_rx : public flexrf_base_rx
+{
+public:
+  db_flexrf_900_rx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_900_rx();
+  
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool i_and_q_swapped();
+
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+
+//------------------------------------------------------------    
+
+class db_flexrf_400_tx : public flexrf_base_tx
+{
+ public:
+  db_flexrf_400_tx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_400_tx();
+
+  // Wrapper calls to d_common functions
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+class db_flexrf_400_rx : public flexrf_base_rx
+{
+public:
+  db_flexrf_400_rx(usrp_basic_sptr usrp, int which);
+  ~db_flexrf_400_rx();
+
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool i_and_q_swapped();
+
+  bool _compute_regs(double freq, int &retR, int &retcontrol,
+		     int &retN, double &retfreq);
+};
+
+#endif
diff --git a/usrp/host/include/usrp/db_flexrf_mimo.h b/usrp/host/include/usrp/db_flexrf_mimo.h
new file mode 100644
index 000000000..771f3b276
--- /dev/null
+++ b/usrp/host/include/usrp/db_flexrf_mimo.h
@@ -0,0 +1,163 @@
+/*
+ * Copyright 2008,2009 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */ 
+
+#include <usrp/db_flexrf.h>
+
+class db_flexrf_2400_tx_mimo_a : public db_flexrf_2400_tx
+{
+ public:
+  db_flexrf_2400_tx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_2400_rx_mimo_a : public db_flexrf_2400_rx
+{
+ public:
+  db_flexrf_2400_rx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+      
+class db_flexrf_2400_tx_mimo_b : public db_flexrf_2400_tx
+{
+ public:
+  db_flexrf_2400_tx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_2400_rx_mimo_b : public db_flexrf_2400_rx
+{
+ public:
+  db_flexrf_2400_rx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+
+class db_flexrf_1800_tx_mimo_a : public db_flexrf_1800_tx
+{
+ public:
+  db_flexrf_1800_tx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_1800_rx_mimo_a : public db_flexrf_1800_rx
+{
+ public:
+  db_flexrf_1800_rx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_1800_tx_mimo_b : public db_flexrf_1800_tx
+{
+ public:
+  db_flexrf_1800_tx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_1800_rx_mimo_b : public db_flexrf_1800_rx
+{
+ public:
+  db_flexrf_1800_rx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_1200_tx_mimo_a : public db_flexrf_1200_tx
+{
+ public:
+  db_flexrf_1200_tx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_1200_rx_mimo_a : public db_flexrf_1200_rx
+{
+ public:
+  db_flexrf_1200_rx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_1200_tx_mimo_b : public db_flexrf_1200_tx
+{
+ public:
+  db_flexrf_1200_tx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_1200_rx_mimo_b : public db_flexrf_1200_rx
+{
+ public:
+  db_flexrf_1200_rx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_900_tx_mimo_a : public db_flexrf_900_tx
+{
+ public:
+  db_flexrf_900_tx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_900_rx_mimo_a : public db_flexrf_900_rx
+{
+ public:
+  db_flexrf_900_rx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_900_tx_mimo_b : public db_flexrf_900_tx
+{
+ public:
+  db_flexrf_900_tx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_900_rx_mimo_b : public db_flexrf_900_rx
+{
+ public:
+  db_flexrf_900_rx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_400_tx_mimo_a : public db_flexrf_400_tx
+{
+ public:
+  db_flexrf_400_tx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_400_rx_mimo_a : public db_flexrf_400_rx
+{
+ public:
+  db_flexrf_400_rx_mimo_a(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_400_tx_mimo_b : public db_flexrf_400_tx
+{
+ public:
+  db_flexrf_400_tx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
+
+class db_flexrf_400_rx_mimo_b : public db_flexrf_400_rx
+{
+ public:
+  db_flexrf_400_rx_mimo_b(usrp_basic_sptr usrp, int which);
+  int _refclk_divisor();
+};
diff --git a/usrp/host/include/usrp/db_tv_rx.h b/usrp/host/include/usrp/db_tv_rx.h
new file mode 100644
index 000000000..ee3ed2bf6
--- /dev/null
+++ b/usrp/host/include/usrp/db_tv_rx.h
@@ -0,0 +1,56 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+
+#ifndef DB_TV_RX_H
+#define DB_TV_RX_H
+
+#include <usrp/db_base.h>
+
+class db_tv_rx : public db_base
+{
+private:
+  void _set_rfagc(float gain);
+  void _set_ifagc(float gain);
+  void _set_pga(float pga_gain);
+
+  int d_i2c_addr;
+  double d_first_IF, d_second_IF;
+  int d_reference_divisor;
+  bool d_fast_tuning;
+  bool d_inverted;
+
+public:
+  db_tv_rx(usrp_basic_sptr usrp, int which, 
+	   double first_IF, double second_IF);
+  ~db_tv_rx();
+
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  double freq_min();
+  double freq_max();
+  struct freq_result_t set_freq(double target_freq);
+  bool  set_gain(float gain);
+  bool  is_quadrature();
+  bool  spectrum_inverted();
+};
+
+#endif
diff --git a/usrp/host/include/usrp/db_xcvr2450.h b/usrp/host/include/usrp/db_xcvr2450.h
new file mode 100644
index 000000000..305c60d06
--- /dev/null
+++ b/usrp/host/include/usrp/db_xcvr2450.h
@@ -0,0 +1,92 @@
+/* -*- c++ -*- */
+//
+// Copyright 2008,2009 Free Software Foundation, Inc.
+// 
+// This file is part of GNU Radio
+// 
+// GNU Radio is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either asversion 3, or (at your option)
+// any later version.
+// 
+// GNU Radio is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with GNU Radio; see the file COPYING.  If not, write to
+// the Free Software Foundation, Inc., 51 Franklin Street,
+// Boston, MA 02110-1301, USA.
+
+#ifndef DB_XCVR2450_H
+#define DB_XCVR2450_H
+
+#include <usrp/db_base.h>
+#include <boost/shared_ptr.hpp>
+
+class xcvr2450;
+typedef boost::shared_ptr<xcvr2450> xcvr2450_sptr;
+
+
+/******************************************************************************/
+
+
+class db_xcvr2450_base: public db_base
+{
+  /*
+   * Abstract base class for all xcvr2450 boards.
+   * 
+   * Derive board specific subclasses from db_xcvr2450_base_{tx,rx}
+   */
+public:
+  db_xcvr2450_base(usrp_basic_sptr usrp, int which);
+  ~db_xcvr2450_base();
+  struct freq_result_t set_freq(double target_freq);
+  bool is_quadrature();
+  double freq_min();
+  double freq_max();
+
+protected:
+  xcvr2450_sptr d_xcvr;
+  void shutdown_common();
+};
+
+
+/******************************************************************************/
+
+
+class db_xcvr2450_tx : public db_xcvr2450_base
+{
+protected:
+  void shutdown();
+
+public:
+  db_xcvr2450_tx(usrp_basic_sptr usrp, int which);
+  ~db_xcvr2450_tx();
+
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool  set_gain(float gain);
+  bool  i_and_q_swapped();
+};
+
+class db_xcvr2450_rx : public db_xcvr2450_base
+{
+protected:
+  void shutdown();
+
+public:
+  db_xcvr2450_rx(usrp_basic_sptr usrp, int which);
+  ~db_xcvr2450_rx();
+
+  float gain_min();
+  float gain_max();
+  float gain_db_per_step();
+  bool  set_gain(float gain);
+};
+
+
+
+#endif
diff --git a/usrp/host/include/usrp/usrp_basic.h b/usrp/host/include/usrp/usrp_basic.h
new file mode 100644
index 000000000..fbbf49d57
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_basic.h
@@ -0,0 +1,991 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2003,2004,2008,2009 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+/*
+ * ----------------------------------------------------------------------
+ * Mid level interface to the Universal Software Radio Peripheral (Rev 1)
+ *
+ * These classes implement the basic functionality for talking to the
+ * USRP.  They try to be as independent of the signal processing code
+ * in FPGA as possible.  They implement access to the low level
+ * peripherals on the board, provide a common way for reading and
+ * writing registers in the FPGA, and provide the high speed interface
+ * to streaming data across the USB.
+ *
+ * It is expected that subclasses will be derived that provide
+ * access to the functionality to a particular FPGA configuration.
+ * ----------------------------------------------------------------------
+ */
+
+#ifndef INCLUDED_USRP_BASIC_H
+#define INCLUDED_USRP_BASIC_H
+
+#include <usrp/db_base.h>
+#include <usrp/usrp_slots.h>
+#include <string>
+#include <vector>
+#include <boost/utility.hpp>
+#include <usrp/usrp_subdev_spec.h>
+
+struct usb_dev_handle;
+class  fusb_devhandle;
+class  fusb_ephandle;
+
+enum txrx_t {
+  C_RX = 0,
+  C_TX = 1
+};
+
+/*!
+ * \brief abstract base class for usrp operations
+ * \ingroup usrp
+ */
+class usrp_basic : boost::noncopyable
+{
+protected:
+  void shutdown_daughterboards();
+
+protected:
+  struct usb_dev_handle	*d_udh;
+  int			 d_usb_data_rate;	// bytes/sec
+  int			 d_bytes_per_poll;	// how often to poll for overruns
+  bool			 d_verbose;
+  long                   d_fpga_master_clock_freq;
+
+  static const int	 MAX_REGS = 128;
+  unsigned int		 d_fpga_shadows[MAX_REGS];
+
+  int			 d_dbid[2];		// daughterboard ID's (side A, side B)
+
+  /*!
+   * Shared pointers to subclasses of db_base.
+   *
+   * The outer vector is of length 2 (0 = side A, 1 = side B).  The
+   * inner vectors are of length 1, 2 or 3 depending on the number of
+   * subdevices implemented by the daugherboard.  At this time, only
+   * the Basic Rx and LF Rx implement more than 1 subdevice.
+   */
+  std::vector< std::vector<db_base_sptr> > d_db;
+
+  //! One time call, made only only from usrp_standard_*::make after shared_ptr is created.
+  void init_db(usrp_basic_sptr u);
+
+
+  usrp_basic (int which_board,
+	      struct usb_dev_handle *open_interface (struct usb_device *dev),
+	      const std::string fpga_filename = "",
+	      const std::string firmware_filename = "");
+
+  /*!
+   * \brief advise usrp_basic of usb data rate (bytes/sec)
+   *
+   * N.B., this doesn't tweak any hardware.  Derived classes
+   * should call this to inform us of the data rate whenever it's
+   * first set or if it changes.
+   *
+   * \param usb_data_rate	bytes/sec
+   */
+  void set_usb_data_rate (int usb_data_rate);
+  
+  /*!
+   * \brief Write auxiliary digital to analog converter.
+   *
+   * \param slot	Which Tx or Rx slot to write.
+   *    		N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.
+   *          		SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.
+   * \param which_dac	[0,3] RX slots must use only 0 and 1.  TX slots must use only 2 and 3.
+   * \param value	[0,4095]
+   * \returns true iff successful
+   */
+  bool _write_aux_dac (int slot, int which_dac, int value);
+
+  /*!
+   * \brief Read auxiliary analog to digital converter.
+   *
+   * \param slot	2-bit slot number. E.g., SLOT_TX_A
+   * \param which_adc	[0,1]
+   * \param value	return 12-bit value [0,4095]
+   * \returns true iff successful
+   */
+  bool _read_aux_adc (int slot, int which_adc, int *value);
+
+  /*!
+   * \brief Read auxiliary analog to digital converter.
+   *
+   * \param slot	2-bit slot number. E.g., SLOT_TX_A
+   * \param which_adc	[0,1]
+   * \returns value in the range [0,4095] if successful, else READ_FAILED.
+   */
+  int _read_aux_adc (int slot, int which_adc);
+
+
+public:
+  virtual ~usrp_basic ();
+
+
+  /*!
+   * Return a vector of vectors that contain shared pointers
+   * to the daughterboard instance(s) associated with the specified side.
+   *
+   * It is an error to use the returned objects after the usrp_basic
+   * object has been destroyed.
+   */
+  std::vector<std::vector<db_base_sptr> > db() const { return d_db; }
+
+  /*!
+   * Return a vector of size >= 1 that contains shared pointers
+   * to the daughterboard instance(s) associated with the specified side.
+   *
+   * \param which_side	[0,1] which daughterboard
+   *
+   * It is an error to use the returned objects after the usrp_basic
+   * object has been destroyed.
+   */
+  std::vector<db_base_sptr> db(int which_side);
+ 
+  /*!
+   * \brief is the subdev_spec valid?
+   */
+  bool is_valid(const usrp_subdev_spec &ss);
+
+  /*!
+   * \brief given a subdev_spec, return the corresponding daughterboard object.
+   * \throws std::invalid_ argument if ss is invalid.
+   *
+   * \param ss specifies the side and subdevice
+   */
+  db_base_sptr selected_subdev(const usrp_subdev_spec &ss);
+
+  /*!
+   * \brief return frequency of master oscillator on USRP
+   */
+  long fpga_master_clock_freq () const { return d_fpga_master_clock_freq; }
+
+  /*!
+   * Tell API that the master oscillator on the USRP is operating at a non-standard 
+   * fixed frequency. This is only needed for custom USRP hardware modified to 
+   * operate at a different frequency from the default factory configuration. This
+   * function must be called prior to any other API function.
+   * \param master_clock USRP2 FPGA master clock frequency in Hz (10..64 MHz)
+   */
+  void set_fpga_master_clock_freq (long master_clock) { d_fpga_master_clock_freq = master_clock; }
+
+  /*!
+   * \returns usb data rate in bytes/sec
+   */
+  int usb_data_rate () const { return d_usb_data_rate; }
+
+  void set_verbose (bool on) { d_verbose = on; }
+
+  //! magic value used on alternate register read interfaces
+  static const int READ_FAILED = -99999;
+
+  /*!
+   * \brief Write EEPROM on motherboard or any daughterboard.
+   * \param i2c_addr		I2C bus address of EEPROM
+   * \param eeprom_offset	byte offset in EEPROM to begin writing
+   * \param buf			the data to write
+   * \returns true iff sucessful
+   */
+  bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+
+  /*!
+   * \brief Read EEPROM on motherboard or any daughterboard.
+   * \param i2c_addr		I2C bus address of EEPROM
+   * \param eeprom_offset	byte offset in EEPROM to begin reading
+   * \param len			number of bytes to read
+   * \returns the data read if successful, else a zero length string.
+   */
+  std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+
+  /*!
+   * \brief Write to I2C peripheral
+   * \param i2c_addr		I2C bus address (7-bits)
+   * \param buf			the data to write
+   * \returns true iff successful
+   * Writes are limited to a maximum of of 64 bytes.
+   */
+  bool write_i2c (int i2c_addr, const std::string buf);
+
+  /*!
+   * \brief Read from I2C peripheral
+   * \param i2c_addr		I2C bus address (7-bits)
+   * \param len			number of bytes to read
+   * \returns the data read if successful, else a zero length string.
+   * Reads are limited to a maximum of 64 bytes.
+   */
+  std::string read_i2c (int i2c_addr, int len);
+
+  /*!
+   * \brief Set ADC offset correction
+   * \param which_adc	which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
+   * \param offset	16-bit value to subtract from raw ADC input.
+   */
+  bool set_adc_offset (int which_adc, int offset);
+
+  /*!
+   * \brief Set DAC offset correction
+   * \param which_dac	which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
+   * \param offset	10-bit offset value (ambiguous format:  See AD9862 datasheet).
+   * \param offset_pin	1-bit value.  If 0 offset applied to -ve differential pin;
+   *                                  If 1 offset applied to +ve differential pin.
+   */
+  bool set_dac_offset (int which_dac, int offset, int offset_pin);
+
+  /*!
+   * \brief Control ADC input buffer
+   * \param which_adc 	which ADC[0,3]
+   * \param bypass	if non-zero, bypass input buffer and connect input
+   *	                directly to switched cap SHA input of RxPGA.
+   */
+  bool set_adc_buffer_bypass (int which_adc, bool bypass);
+
+  /*!
+   * \brief Enable/disable automatic DC offset removal control loop in FPGA
+   *
+   * \param bits  which control loops to enable
+   * \param mask  which \p bits to pay attention to
+   *
+   * If the corresponding bit is set, enable the automatic DC
+   * offset correction control loop.
+   *
+   * <pre>
+   * The 4 low bits are significant:
+   *
+   *   ADC0 = (1 << 0)
+   *   ADC1 = (1 << 1)
+   *   ADC2 = (1 << 2)
+   *   ADC3 = (1 << 3)
+   * </pre>
+   *
+   * By default the control loop is enabled on all ADC's.
+   */
+  bool set_dc_offset_cl_enable(int bits, int mask);
+
+  /*!
+   * \brief return the usrp's serial number.
+   *
+   * \returns non-zero length string iff successful.
+   */
+  std::string serial_number();
+
+  /*!
+   * \brief Return daughterboard ID for given side [0,1].
+   *
+   * \param which_side	[0,1] which daughterboard
+   *
+   * \return daughterboard id >= 0 if successful
+   * \return -1 if no daugherboard
+   * \return -2 if invalid EEPROM on daughterboard
+   */
+  virtual int daughterboard_id (int which_side) const = 0;
+
+  /*!
+   * \brief Clock ticks to delay rising of T/R signal
+   * \sa write_atr_mask, write_atr_txval, write_atr_rxval
+   */
+  bool write_atr_tx_delay(int value);
+
+  /*!
+   * \brief Clock ticks to delay falling edge of T/R signal
+   * \sa write_atr_mask, write_atr_txval, write_atr_rxval
+   */
+  bool write_atr_rx_delay(int value);
+
+
+  // ================================================================
+  // Routines to access and control daughterboard specific i/o
+  //
+  // Those with a common_ prefix access either the Tx or Rx side depending
+  // on the txrx parameter.  Those without the common_ prefix are virtual
+  // and are overriden in usrp_basic_rx and usrp_basic_tx to access the
+  // the Rx or Tx sides automatically.  We provide the common_ versions
+  // for those daughterboards such as the WBX and XCVR2450 that share
+  // h/w resources (such as the LO) between the Tx and Rx sides.
+
+  // ----------------------------------------------------------------
+  // BEGIN common_  daughterboard control functions
+
+  /*!
+   * \brief Set Programmable Gain Amplifier(PGA)
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_amp	which amp [0,3]
+   * \param gain_in_db	gain value(linear in dB)
+   *
+   * gain is rounded to closest setting supported by hardware.
+   *
+   * \returns true iff sucessful.
+   *
+   * \sa pga_min(), pga_max(), pga_db_per_step()
+   */
+  bool common_set_pga(txrx_t txrx, int which_amp, double gain_in_db);
+
+  /*!
+   * \brief Return programmable gain amplifier gain setting in dB.
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_amp	which amp [0,3]
+   */
+  double common_pga(txrx_t txrx, int which_amp) const;
+
+  /*!
+   * \brief Return minimum legal PGA gain in dB.
+   * \param txrx	Tx or Rx?
+   */
+  double common_pga_min(txrx_t txrx) const;
+
+  /*!
+   * \brief Return maximum legal PGA gain in dB.
+   * \param txrx	Tx or Rx?
+   */
+  double common_pga_max(txrx_t txrx) const;
+
+  /*!
+   * \brief Return hardware step size of PGA(linear in dB).
+   * \param txrx	Tx or Rx?
+   */
+  double common_pga_db_per_step(txrx_t txrx) const;
+
+  /*!
+   * \brief Write direction register(output enables) for pins that go to daughterboard.
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which size
+   * \param value	value to write into register
+   * \param mask	which bits of value to write into reg
+   *
+   * Each d'board has 16-bits of general purpose i/o.
+   * Setting the bit makes it an output from the FPGA to the d'board.
+   *
+   * This register is initialized based on a value stored in the
+   * d'board EEPROM.  In general, you shouldn't be using this routine
+   * without a very good reason.  Using this method incorrectly will
+   * kill your USRP motherboard and/or daughterboard.
+   */
+  bool _common_write_oe(txrx_t txrx, int which_side, int value, int mask);
+
+  /*!
+   * \brief Write daughterboard i/o pin value
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which d'board
+   * \param value	value to write into register
+   * \param mask	which bits of value to write into reg
+   */
+  bool common_write_io(txrx_t txrx, int which_side, int value, int mask);
+
+  /*!
+   * \brief Read daughterboard i/o pin value
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which d'board
+   * \param value	output
+   */
+  bool common_read_io(txrx_t txrx, int which_side, int *value);
+
+  /*!
+   * \brief Read daughterboard i/o pin value
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which d'board
+   * \returns register value if successful, else READ_FAILED
+   */
+  int common_read_io(txrx_t txrx, int which_side);
+
+  /*!
+   * \brief Write daughterboard refclk config register
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which d'board
+   * \param value	value to write into register, see below
+   *
+   * <pre>
+   * Control whether a reference clock is sent to the daughterboards,
+   * and what frequency.  The refclk is sent on d'board i/o pin 0.
+   * 
+   *     3                   2                   1                       
+   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   *  +-----------------------------------------------+-+------------+
+   *  |             Reserved (Must be zero)           |E|   DIVISOR  |
+   *  +-----------------------------------------------+-+------------+
+   * 
+   *  Bit 7  -- 1 turns on refclk, 0 allows IO use
+   *  Bits 6:0 Divider value
+   * </pre>
+   */
+  bool common_write_refclk(txrx_t txrx, int which_side, int value);
+
+  /*!
+   * \brief Automatic Transmit/Receive switching
+   * <pre>
+   *
+   * If automatic transmit/receive (ATR) switching is enabled in the
+   * FR_ATR_CTL register, the presence or absence of data in the FPGA
+   * transmit fifo selects between two sets of values for each of the 4
+   * banks of daughterboard i/o pins.
+   *
+   * Each daughterboard slot has 3 16-bit registers associated with it:
+   *   FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_*
+   *
+   * FR_ATR_MASK_{0,1,2,3}: 
+   *
+   *   These registers determine which of the daugherboard i/o pins are
+   *   affected by ATR switching.  If a bit in the mask is set, the
+   *   corresponding i/o bit is controlled by ATR, else it's output
+   *   value comes from the normal i/o pin output register:
+   *   FR_IO_{0,1,2,3}.
+   *
+   * FR_ATR_TXVAL_{0,1,2,3}:
+   * FR_ATR_RXVAL_{0,1,2,3}:
+   *
+   *   If the Tx fifo contains data, then the bits from TXVAL that are
+   *   selected by MASK are output.  Otherwise, the bits from RXVAL that
+   *   are selected by MASK are output.
+   * </pre>
+   */
+  bool common_write_atr_mask(txrx_t txrx, int which_side, int value);
+  bool common_write_atr_txval(txrx_t txrx, int which_side, int value);
+  bool common_write_atr_rxval(txrx_t txrx, int which_side, int value);
+
+  /*!
+   * \brief Write auxiliary digital to analog converter.
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which d'board
+   *    		N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.
+   *          		SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.
+   * \param which_dac	[2,3] TX slots must use only 2 and 3.
+   * \param value	[0,4095]
+   * \returns true iff successful
+   */
+  bool common_write_aux_dac(txrx_t txrx, int which_side, int which_dac, int value);
+
+  /*!
+   * \brief Read auxiliary analog to digital converter.
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which d'board
+   * \param which_adc	[0,1]
+   * \param value	return 12-bit value [0,4095]
+   * \returns true iff successful
+   */
+  bool common_read_aux_adc(txrx_t txrx, int which_side, int which_adc, int *value);
+
+  /*!
+   * \brief Read auxiliary analog to digital converter.
+   *
+   * \param txrx	Tx or Rx?
+   * \param which_side	[0,1] which d'board
+   * \param which_adc	[0,1]
+   * \returns value in the range [0,4095] if successful, else READ_FAILED.
+   */
+  int common_read_aux_adc(txrx_t txrx, int which_side, int which_adc);
+
+  // END common_ daughterboard control functions
+  // ----------------------------------------------------------------
+  // BEGIN virtual daughterboard control functions
+
+  /*!
+   * \brief Set Programmable Gain Amplifier (PGA)
+   *
+   * \param which_amp	which amp [0,3]
+   * \param gain_in_db	gain value (linear in dB)
+   *
+   * gain is rounded to closest setting supported by hardware.
+   *
+   * \returns true iff sucessful.
+   *
+   * \sa pga_min(), pga_max(), pga_db_per_step()
+   */
+  virtual bool set_pga (int which_amp, double gain_in_db) = 0;
+
+  /*!
+   * \brief Return programmable gain amplifier gain setting in dB.
+   *
+   * \param which_amp	which amp [0,3]
+   */
+  virtual double pga (int which_amp) const = 0;
+
+  /*!
+   * \brief Return minimum legal PGA gain in dB.
+   */
+  virtual double pga_min () const = 0;
+
+  /*!
+   * \brief Return maximum legal PGA gain in dB.
+   */
+  virtual double pga_max () const = 0;
+
+  /*!
+   * \brief Return hardware step size of PGA (linear in dB).
+   */
+  virtual double pga_db_per_step () const = 0;
+
+  /*!
+   * \brief Write direction register (output enables) for pins that go to daughterboard.
+   *
+   * \param which_side	[0,1] which size
+   * \param value	value to write into register
+   * \param mask	which bits of value to write into reg
+   *
+   * Each d'board has 16-bits of general purpose i/o.
+   * Setting the bit makes it an output from the FPGA to the d'board.
+   *
+   * This register is initialized based on a value stored in the
+   * d'board EEPROM.  In general, you shouldn't be using this routine
+   * without a very good reason.  Using this method incorrectly will
+   * kill your USRP motherboard and/or daughterboard.
+   */
+  virtual bool _write_oe (int which_side, int value, int mask) = 0;
+
+  /*!
+   * \brief Write daughterboard i/o pin value
+   *
+   * \param which_side	[0,1] which d'board
+   * \param value	value to write into register
+   * \param mask	which bits of value to write into reg
+   */
+  virtual bool write_io (int which_side, int value, int mask) = 0;
+
+  /*!
+   * \brief Read daughterboard i/o pin value
+   *
+   * \param which_side	[0,1] which d'board
+   * \param value	output
+   */
+  virtual bool read_io (int which_side, int *value) = 0;
+
+  /*!
+   * \brief Read daughterboard i/o pin value
+   *
+   * \param which_side	[0,1] which d'board
+   * \returns register value if successful, else READ_FAILED
+   */
+  virtual int read_io (int which_side) = 0;
+
+  /*!
+   * \brief Write daughterboard refclk config register
+   *
+   * \param which_side	[0,1] which d'board
+   * \param value	value to write into register, see below
+   *
+   * <pre>
+   * Control whether a reference clock is sent to the daughterboards,
+   * and what frequency.  The refclk is sent on d'board i/o pin 0.
+   * 
+   *     3                   2                   1                       
+   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   *  +-----------------------------------------------+-+------------+
+   *  |             Reserved (Must be zero)           |E|   DIVISOR  |
+   *  +-----------------------------------------------+-+------------+
+   * 
+   *  Bit 7  -- 1 turns on refclk, 0 allows IO use
+   *  Bits 6:0 Divider value
+   * </pre>
+   */
+  virtual bool write_refclk(int which_side, int value) = 0;
+
+  virtual bool write_atr_mask(int which_side, int value) = 0;
+  virtual bool write_atr_txval(int which_side, int value) = 0;
+  virtual bool write_atr_rxval(int which_side, int value) = 0;
+
+  /*!
+   * \brief Write auxiliary digital to analog converter.
+   *
+   * \param which_side	[0,1] which d'board
+   *    		N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.
+   *          		SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.
+   * \param which_dac	[2,3] TX slots must use only 2 and 3.
+   * \param value	[0,4095]
+   * \returns true iff successful
+   */
+  virtual bool write_aux_dac (int which_side, int which_dac, int value) = 0;
+
+  /*!
+   * \brief Read auxiliary analog to digital converter.
+   *
+   * \param which_side	[0,1] which d'board
+   * \param which_adc	[0,1]
+   * \param value	return 12-bit value [0,4095]
+   * \returns true iff successful
+   */
+  virtual bool read_aux_adc (int which_side, int which_adc, int *value) = 0;
+
+  /*!
+   * \brief Read auxiliary analog to digital converter.
+   *
+   * \param which_side	[0,1] which d'board
+   * \param which_adc	[0,1]
+   * \returns value in the range [0,4095] if successful, else READ_FAILED.
+   */
+  virtual int read_aux_adc (int which_side, int which_adc) = 0;
+
+  /*!
+   * \brief returns current fusb block size
+   */
+  virtual int block_size() const = 0;
+
+  /*!
+   * \brief returns A/D or D/A converter rate in Hz
+   */
+  virtual long converter_rate() const = 0;
+
+  // END virtual daughterboard control functions
+
+  // ----------------------------------------------------------------
+  // Low level implementation routines.
+  // You probably shouldn't be using these...
+  //
+
+  bool _set_led (int which_led, bool on);
+
+  /*!
+   * \brief Write FPGA register.
+   * \param regno	7-bit register number
+   * \param value	32-bit value
+   * \returns true iff successful
+   */
+  bool _write_fpga_reg (int regno, int value);	//< 7-bit regno, 32-bit value
+
+  /*!
+   * \brief Read FPGA register.
+   * \param regno	7-bit register number
+   * \param value	32-bit value
+   * \returns true iff successful
+   */
+  bool _read_fpga_reg (int regno, int *value);	//< 7-bit regno, 32-bit value
+
+  /*!
+   * \brief Read FPGA register.
+   * \param regno	7-bit register number
+   * \returns register value if successful, else READ_FAILED
+   */
+  int  _read_fpga_reg (int regno);
+
+  /*!
+   * \brief Write FPGA register with mask.
+   * \param regno	7-bit register number
+   * \param value	16-bit value
+   * \param mask 	16-bit value
+   * \returns true if successful
+   * Only use this for registers who actually implement a mask in the verilog firmware, like FR_RX_MASTER_SLAVE
+   */
+  bool _write_fpga_reg_masked (int regno, int value, int mask);
+
+  /*!
+   * \brief Write AD9862 register.
+   * \param which_codec 0 or 1
+   * \param regno	6-bit register number
+   * \param value	8-bit value
+   * \returns true iff successful
+   */
+  bool _write_9862 (int which_codec, int regno, unsigned char value);
+
+  /*!
+   * \brief Read AD9862 register.
+   * \param which_codec 0 or 1
+   * \param regno	6-bit register number
+   * \param value	8-bit value
+   * \returns true iff successful
+   */
+  bool _read_9862 (int which_codec, int regno, unsigned char *value) const;
+
+  /*!
+   * \brief Read AD9862 register.
+   * \param which_codec 0 or 1
+   * \param regno	6-bit register number
+   * \returns register value if successful, else READ_FAILED
+   */
+  int  _read_9862 (int which_codec, int regno) const;
+
+  /*!
+   * \brief Write data to SPI bus peripheral.
+   *
+   * \param optional_header	0,1 or 2 bytes to write before buf.
+   * \param enables		bitmask of peripherals to write. See usrp_spi_defs.h
+   * \param format		transaction format.  See usrp_spi_defs.h SPI_FMT_*
+   * \param buf			the data to write
+   * \returns true iff successful
+   * Writes are limited to a maximum of 64 bytes.
+   *
+   * If \p format specifies that optional_header bytes are present, they are
+   * written to the peripheral immediately prior to writing \p buf.
+   */
+  bool _write_spi (int optional_header, int enables, int format, std::string buf);
+
+  /*
+   * \brief Read data from SPI bus peripheral.
+   *
+   * \param optional_header	0,1 or 2 bytes to write before buf.
+   * \param enables		bitmask of peripheral to read. See usrp_spi_defs.h
+   * \param format		transaction format.  See usrp_spi_defs.h SPI_FMT_*
+   * \param len			number of bytes to read.  Must be in [0,64].
+   * \returns the data read if sucessful, else a zero length string.
+   *
+   * Reads are limited to a maximum of 64 bytes.
+   *
+   * If \p format specifies that optional_header bytes are present, they
+   * are written to the peripheral first.  Then \p len bytes are read from
+   * the peripheral and returned.
+   */
+  std::string _read_spi (int optional_header, int enables, int format, int len);
+
+  /*!
+   * \brief Start data transfers.
+   * Called in base class to derived class order.
+   */
+  bool start ();
+
+  /*!
+   * \brief Stop data transfers.
+   * Called in base class to derived class order.
+   */
+  bool stop ();
+};
+
+/*!
+ * \brief class for accessing the receive side of the USRP
+ * \ingroup usrp
+ */
+class usrp_basic_rx : public usrp_basic 
+{
+private:
+  fusb_devhandle	*d_devhandle;
+  fusb_ephandle		*d_ephandle;
+  int			 d_bytes_seen;		// how many bytes we've seen
+  bool			 d_first_read;
+  bool			 d_rx_enable;
+
+protected:
+  /*!
+   * \param which_board	     Which USRP board on usb (not particularly useful; use 0)
+   * \param fusb_block_size  fast usb xfer block size.  Must be a multiple of 512. 
+   *                         Use zero for a reasonable default.
+   * \param fusb_nblocks     number of fast usb URBs to allocate.  Use zero for a reasonable default. 
+   * \param fpga_filename    name of the rbf file to load
+   * \param firmware_filename name of ihx file to load
+   */
+  usrp_basic_rx (int which_board,
+		 int fusb_block_size=0,
+		 int fusb_nblocks=0,
+		 const std::string fpga_filename = "",
+		 const std::string firmware_filename = ""
+		 );  // throws if trouble
+
+  bool set_rx_enable (bool on);
+  bool rx_enable () const { return d_rx_enable; }
+
+  bool disable_rx ();		// conditional disable, return prev state
+  void restore_rx (bool on);	// conditional set
+
+  void probe_rx_slots (bool verbose);
+
+public:
+  ~usrp_basic_rx ();
+
+  /*!
+   * \brief invokes constructor, returns instance or 0 if trouble
+   *
+   * \param which_board	     Which USRP board on usb (not particularly useful; use 0)
+   * \param fusb_block_size  fast usb xfer block size.  Must be a multiple of 512. 
+   *                         Use zero for a reasonable default.
+   * \param fusb_nblocks     number of fast usb URBs to allocate.  Use zero for a reasonable default. 
+   * \param fpga_filename    name of file that contains image to load into FPGA
+   * \param firmware_filename	name of file that contains image to load into FX2
+   */
+  static usrp_basic_rx *make (int which_board,
+			      int fusb_block_size=0,
+			      int fusb_nblocks=0,
+			      const std::string fpga_filename = "",
+			      const std::string firmware_filename = ""
+			      );
+
+  /*!
+   * \brief tell the fpga the rate rx samples are coming from the A/D's
+   *
+   * div = fpga_master_clock_freq () / sample_rate
+   *
+   * sample_rate is determined by a myriad of registers
+   * in the 9862.  That's why you have to tell us, so
+   * we can tell the fpga.
+   */
+  bool set_fpga_rx_sample_rate_divisor (unsigned int div);
+
+  /*!
+   * \brief read data from the D/A's via the FPGA.
+   * \p len must be a multiple of 512 bytes.
+   *
+   * \returns the number of bytes read, or -1 on error.
+   *
+   * If overrun is non-NULL it will be set true iff an RX overrun is detected.
+   */
+  int read (void *buf, int len, bool *overrun);
+
+
+  //! sampling rate of A/D converter
+  virtual long converter_rate() const { return fpga_master_clock_freq(); } // 64M
+  long adc_rate() const { return converter_rate(); }
+  int daughterboard_id (int which_side) const { return d_dbid[which_side & 0x1]; }
+
+  bool set_pga (int which_amp, double gain_in_db);
+  double pga (int which_amp) const;
+  double pga_min () const;
+  double pga_max () const;
+  double pga_db_per_step () const;
+
+  bool _write_oe (int which_side, int value, int mask);
+  bool write_io (int which_side, int value, int mask);
+  bool read_io (int which_side, int *value);
+  int read_io (int which_side);
+  bool write_refclk(int which_side, int value);
+  bool write_atr_mask(int which_side, int value);
+  bool write_atr_txval(int which_side, int value);
+  bool write_atr_rxval(int which_side, int value);
+
+  bool write_aux_dac (int which_side, int which_dac, int value);
+  bool read_aux_adc (int which_side, int which_adc, int *value);
+  int  read_aux_adc (int which_side, int which_adc);
+
+  int block_size() const;
+
+  // called in base class to derived class order
+  bool start ();
+  bool stop ();
+};
+
+/*!
+ * \brief class for accessing the transmit side of the USRP
+ * \ingroup usrp
+ */
+class usrp_basic_tx : public usrp_basic 
+{
+private:
+  fusb_devhandle	*d_devhandle;
+  fusb_ephandle		*d_ephandle;
+  int			 d_bytes_seen;		// how many bytes we've seen
+  bool			 d_first_write;
+  bool			 d_tx_enable;
+
+ protected:
+  /*!
+   * \param which_board	     Which USRP board on usb (not particularly useful; use 0)
+   * \param fusb_block_size  fast usb xfer block size.  Must be a multiple of 512.
+   *                         Use zero for a reasonable default.
+   * \param fusb_nblocks     number of fast usb URBs to allocate.  Use zero for a reasonable default.
+   * \param fpga_filename    name of file that contains image to load into FPGA
+   * \param firmware_filename	name of file that contains image to load into FX2
+   */
+  usrp_basic_tx (int which_board,
+		 int fusb_block_size=0,
+		 int fusb_nblocks=0,
+		 const std::string fpga_filename = "",
+		 const std::string firmware_filename = ""
+		 );		// throws if trouble
+
+  bool set_tx_enable (bool on);
+  bool tx_enable () const { return d_tx_enable; }
+
+  bool disable_tx ();		// conditional disable, return prev state
+  void restore_tx (bool on);	// conditional set
+
+  void probe_tx_slots (bool verbose);
+
+public:
+
+  ~usrp_basic_tx ();
+
+  /*!
+   * \brief invokes constructor, returns instance or 0 if trouble
+   *
+   * \param which_board	     Which USRP board on usb (not particularly useful; use 0)
+   * \param fusb_block_size  fast usb xfer block size.  Must be a multiple of 512. 
+   *                         Use zero for a reasonable default.
+   * \param fusb_nblocks     number of fast usb URBs to allocate.  Use zero for a reasonable default. 
+   * \param fpga_filename    name of file that contains image to load into FPGA
+   * \param firmware_filename	name of file that contains image to load into FX2
+   */
+  static usrp_basic_tx *make (int which_board, int fusb_block_size=0, int fusb_nblocks=0,
+			      const std::string fpga_filename = "",
+			      const std::string firmware_filename = ""
+			      );
+
+  /*!
+   * \brief tell the fpga the rate tx samples are going to the D/A's
+   *
+   * div = fpga_master_clock_freq () * 2
+   *
+   * sample_rate is determined by a myriad of registers
+   * in the 9862.  That's why you have to tell us, so
+   * we can tell the fpga.
+   */
+  bool set_fpga_tx_sample_rate_divisor (unsigned int div);
+
+  /*!
+   * \brief Write data to the A/D's via the FPGA.
+   *
+   * \p len must be a multiple of 512 bytes.
+   * \returns number of bytes written or -1 on error.
+   *
+   * if \p underrun is non-NULL, it will be set to true iff
+   * a transmit underrun condition is detected.
+   */
+  int write (const void *buf, int len, bool *underrun);
+
+  /*
+   * Block until all outstanding writes have completed.
+   * This is typically used to assist with benchmarking
+   */
+  void wait_for_completion ();
+
+  //! sampling rate of D/A converter
+  virtual long converter_rate() const { return fpga_master_clock_freq () * 2; } // 128M
+  long dac_rate() const { return converter_rate(); }
+  int daughterboard_id (int which_side) const { return d_dbid[which_side & 0x1]; }
+
+  bool set_pga (int which_amp, double gain_in_db);
+  double pga (int which_amp) const;
+  double pga_min () const;
+  double pga_max () const;
+  double pga_db_per_step () const;
+
+  bool _write_oe (int which_side, int value, int mask);
+  bool write_io (int which_side, int value, int mask);
+  bool read_io (int which_side, int *value);
+  int read_io (int which_side);
+  bool write_refclk(int which_side, int value);
+  bool write_atr_mask(int which_side, int value);
+  bool write_atr_txval(int which_side, int value);
+  bool write_atr_rxval(int which_side, int value);
+
+  bool write_aux_dac (int which_side, int which_dac, int value);
+  bool read_aux_adc (int which_side, int which_adc, int *value);
+  int read_aux_adc (int which_side, int which_adc);
+
+  int block_size() const;
+
+  // called in base class to derived class order
+  bool start ();
+  bool stop ();
+};
+
+#endif
diff --git a/usrp/host/include/usrp/usrp_bytesex.h b/usrp/host/include/usrp/usrp_bytesex.h
new file mode 100644
index 000000000..331db31c9
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_bytesex.h
@@ -0,0 +1,108 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+#ifndef INCLUDED_USRP_BYTESEX_H
+#define INCLUDED_USRP_BYTESEX_H
+
+/*!
+ * \brief routines for convertering between host and usrp byte order
+ *
+ * Prior to including this file, the user must include "config.h"
+ * which will or won't define WORDS_BIGENDIAN based on the
+ * result of the AC_C_BIGENDIAN autoconf test.
+ */
+
+#ifdef HAVE_BYTESWAP_H
+#include <byteswap.h>
+#else
+
+#warning Using non-portable code (likely wrong other than ILP32).
+
+static inline unsigned short int
+bswap_16 (unsigned short int x)
+{
+  return ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8));
+}
+
+static inline unsigned int
+bswap_32 (unsigned int x)
+{
+  return ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >>  8) \
+        | (((x) & 0x0000ff00) <<  8) | (((x) & 0x000000ff) << 24));
+}
+#endif
+
+
+#ifdef WORDS_BIGENDIAN
+
+static inline unsigned int
+host_to_usrp_u32 (unsigned int x)
+{
+  return bswap_32(x);
+}
+
+static inline unsigned int
+usrp_to_host_u32 (unsigned int x)
+{
+  return bswap_32(x);
+}
+
+static inline short int
+host_to_usrp_short (short int x)
+{
+  return bswap_16 (x);
+}
+
+static inline short int
+usrp_to_host_short (short int x)
+{
+  return bswap_16 (x);
+}
+
+#else
+
+static inline unsigned int
+host_to_usrp_u32 (unsigned int x)
+{
+  return x;
+}
+
+static inline unsigned int
+usrp_to_host_u32 (unsigned int x)
+{
+  return x;
+}
+
+static inline short int
+host_to_usrp_short (short int x)
+{
+  return x;
+}
+
+static inline short int
+usrp_to_host_short (unsigned short int x)
+{
+  return x;
+}
+
+#endif
+
+#endif /* INCLUDED_USRP_BYTESEX_H */
diff --git a/usrp/host/include/usrp/usrp_local_sighandler.h b/usrp/host/include/usrp/usrp_local_sighandler.h
new file mode 100644
index 000000000..ee336750f
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_local_sighandler.h
@@ -0,0 +1,61 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP_LOCAL_SIGHANDLER_H
+#define INCLUDED_USRP_LOCAL_SIGHANDLER_H
+
+#include <signal.h>
+#include <string>
+
+/*!
+ * \brief Representation of signal.
+ */
+class usrp_signal
+{
+  int	d_signum;
+public:
+  usrp_signal (int signum) : d_signum (signum) {}
+  int signal () const { return d_signum; }
+  std::string name () const;
+};
+
+
+/*!
+ * \brief Get and set signal handler.
+ *
+ * Constructor installs new handler, destructor reinstalls
+ * original value.
+ */
+class usrp_local_sighandler {
+  int			d_signum;
+#ifdef HAVE_SIGACTION
+  struct sigaction	d_old_action;
+#endif
+public:
+  usrp_local_sighandler (int signum, void (*new_handler)(int));
+  ~usrp_local_sighandler ();
+
+  /* throw usrp_signal (signum) */
+  static void throw_signal (int signum) throw (usrp_signal);
+};
+
+#endif /* INCLUDED_USRP_LOCAL_SIGHANDLER_H */
diff --git a/usrp/host/include/usrp/usrp_prims.h b/usrp/host/include/usrp/usrp_prims.h
new file mode 100644
index 000000000..aa0887050
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_prims.h
@@ -0,0 +1,294 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2003,2004,2006,2009 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+/*
+ * Low level primitives for directly messing with USRP hardware.
+ *
+ * If you're trying to use the USRP, you'll probably want to take a look
+ * at the usrp_rx and usrp_tx classes.  They hide a bunch of low level details
+ * and provide high performance streaming i/o.
+ *
+ * This interface is built on top of libusb, which allegedly works under
+ * Linux, *BSD and Mac OS/X.  http://libusb.sourceforge.net
+ */
+
+#ifndef _USRP_PRIMS_H_
+#define _USRP_PRIMS_H_
+
+#include <usrp/usrp_slots.h>
+#include <string>
+
+static const int USRP_HASH_SIZE = 16;
+
+enum usrp_load_status_t { ULS_ERROR = 0, ULS_OK, ULS_ALREADY_LOADED };
+
+struct usb_dev_handle;
+struct usb_device;
+
+/*!
+ * \brief initialize libusb; probe busses and devices.
+ * Safe to call more than once.
+ */
+void usrp_one_time_init ();
+
+/*
+ * force a rescan of the buses and devices
+ */
+void usrp_rescan ();
+
+/*!
+ * \brief locate Nth (zero based) USRP device in system.
+ * Return pointer or 0 if not found.
+ *
+ * The following kinds of devices are considered USRPs:
+ *
+ *   unconfigured USRP (no firwmare loaded)
+ *   configured USRP (firmware loaded)
+ *   unconfigured Cypress FX2 (only if fx2_ok_p is true)
+ */
+struct usb_device *usrp_find_device (int nth, bool fx2_ok_p = false);
+
+bool usrp_usrp_p (struct usb_device *q);		//< is this a USRP
+bool usrp_usrp0_p (struct usb_device *q);		//< is this a USRP Rev 0
+bool usrp_usrp1_p (struct usb_device *q);		//< is this a USRP Rev 1
+bool usrp_usrp2_p (struct usb_device *q);		//< is this a USRP Rev 2
+int  usrp_hw_rev (struct usb_device *q);		//< return h/w rev code
+
+bool usrp_fx2_p (struct usb_device *q);			//< is this an unconfigured Cypress FX2
+
+bool usrp_unconfigured_usrp_p (struct usb_device *q);	//< some kind of unconfigured USRP
+bool usrp_configured_usrp_p (struct usb_device *q);	//< some kind of configured USRP
+
+/*!
+ * \brief given a usb_device return an instance of the appropriate usb_dev_handle
+ *
+ * These routines claim the specified interface and select the
+ * correct alternate interface.  (USB nomenclature is totally screwed!)
+ *
+ * If interface can't be opened, or is already claimed by some other
+ * process, 0 is returned.
+ */
+struct usb_dev_handle *usrp_open_cmd_interface (struct usb_device *dev);
+struct usb_dev_handle *usrp_open_rx_interface (struct usb_device *dev);
+struct usb_dev_handle *usrp_open_tx_interface (struct usb_device *dev);
+
+/*!
+ * \brief close interface.
+ */
+bool usrp_close_interface (struct usb_dev_handle *udh);
+
+/*!
+ * \brief load intel hex format file into USRP/Cypress FX2 (8051).
+ *
+ * The filename extension is typically *.ihx
+ *
+ * Note that loading firmware may cause the device to renumerate.  I.e.,
+ * change its configuration, invalidating the current device handle.
+ */
+
+usrp_load_status_t 
+usrp_load_firmware (struct usb_dev_handle *udh, const char *filename, bool force);
+
+/*!
+ * \brief load intel hex format file into USRP FX2 (8051).
+ *
+ * The filename extension is typically *.ihx
+ *
+ * Note that loading firmware may cause the device to renumerate.  I.e.,
+ * change its configuration, invalidating the current device handle.
+ * If the result is ULS_OK, usrp_load_firmware_nth delays 1 second
+ * then rescans the busses and devices.
+ */
+usrp_load_status_t
+usrp_load_firmware_nth (int nth, const char *filename, bool force);
+
+/*!
+ * \brief load fpga configuration bitstream
+ */
+usrp_load_status_t
+usrp_load_fpga (struct usb_dev_handle *udh, const char *filename, bool force);
+
+/*!
+ * \brief load the regular firmware and fpga bitstream in the Nth USRP.
+ *
+ * This is the normal starting point...
+ */
+bool usrp_load_standard_bits (int nth, bool force,
+			      const std::string fpga_filename = "",
+			      const std::string firmware_filename = "");
+
+/*!
+ * \brief copy the given \p hash into the USRP hash slot \p which.
+ * The usrp implements two hash slots, 0 and 1.
+ */
+bool usrp_set_hash (struct usb_dev_handle *udh, int which,
+		    const unsigned char hash[USRP_HASH_SIZE]);
+
+/*!
+ * \brief retrieve the \p hash from the USRP hash slot \p which.
+ * The usrp implements two hash slots, 0 and 1.
+ */
+bool usrp_get_hash (struct usb_dev_handle *udh, int which,
+		    unsigned char hash[USRP_HASH_SIZE]);
+
+bool usrp_write_fpga_reg (struct usb_dev_handle *udh, int reg, int value);
+bool usrp_read_fpga_reg (struct usb_dev_handle *udh, int reg, int *value);
+bool usrp_set_fpga_reset (struct usb_dev_handle *udh, bool on);
+bool usrp_set_fpga_tx_enable (struct usb_dev_handle *udh, bool on);
+bool usrp_set_fpga_rx_enable (struct usb_dev_handle *udh, bool on);
+bool usrp_set_fpga_tx_reset (struct usb_dev_handle *udh, bool on);
+bool usrp_set_fpga_rx_reset (struct usb_dev_handle *udh, bool on);
+bool usrp_set_led (struct usb_dev_handle *udh, int which, bool on);
+
+bool usrp_check_rx_overrun (struct usb_dev_handle *udh, bool *overrun_p);
+bool usrp_check_tx_underrun (struct usb_dev_handle *udh, bool *underrun_p);
+
+// i2c_read and i2c_write are limited to a maximum len of 64 bytes.
+
+bool usrp_i2c_write (struct usb_dev_handle *udh, int i2c_addr,
+		     const void *buf, int len);
+
+bool usrp_i2c_read (struct usb_dev_handle *udh, int i2c_addr,
+		    void *buf, int len);
+
+// spi_read and spi_write are limited to a maximum of 64 bytes
+// See usrp_spi_defs.h for more info
+
+bool usrp_spi_write (struct usb_dev_handle *udh,
+		     int optional_header, int enables, int format,
+		     const void *buf, int len);
+
+bool usrp_spi_read (struct usb_dev_handle *udh,
+		     int optional_header, int enables, int format,
+		     void *buf, int len);
+
+
+bool usrp_9862_write (struct usb_dev_handle *udh,
+		      int which_codec,			// [0,  1]
+		      int regno,			// [0, 63]
+		      int value);			// [0, 255]	
+
+bool usrp_9862_read (struct usb_dev_handle *udh,
+		     int which_codec,			// [0,  1]
+		     int regno,				// [0, 63]
+		     unsigned char *value);		// [0, 255]
+
+/*!
+ * \brief Write multiple 9862 regs at once.
+ *
+ * \p buf contains alternating register_number, register_value pairs.
+ * \p len must be even and is the length of buf in bytes.
+ */
+bool usrp_9862_write_many (struct usb_dev_handle *udh, int which_codec,
+			   const unsigned char *buf, int len);
+			   
+
+/*!
+ * \brief write specified regs to all 9862's in the system
+ */
+bool usrp_9862_write_many_all (struct usb_dev_handle *udh,
+			       const unsigned char *buf, int len);
+			   
+
+// Write 24LC024 / 24LC025 EEPROM on motherboard or daughterboard.
+// Which EEPROM is determined by i2c_addr.  See i2c_addr.h
+
+bool usrp_eeprom_write (struct usb_dev_handle *udh, int i2c_addr,
+			int eeprom_offset, const void *buf, int len);
+
+
+// Read 24LC024 / 24LC025 EEPROM on motherboard or daughterboard.
+// Which EEPROM is determined by i2c_addr.  See i2c_addr.h
+
+bool usrp_eeprom_read (struct usb_dev_handle *udh, int i2c_addr,
+		       int eeprom_offset, void *buf, int len);
+
+
+// Slot specific i/o routines
+
+/*!
+ * \brief write to the specified aux dac.
+ *
+ * \p slot: which Tx or Rx slot to write.
+ *    N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's
+ *          SLOT_TX_B and SLOT_RX_B share the same AUX DAC's
+ *
+ * \p which_dac: [0,3]  RX slots must use only 0 and 1.
+ *			TX slots must use only 2 and 3.
+ *
+ * AUX DAC 3 is really the 9862 sigma delta output.
+ *
+ * \p value to write to aux dac.  All dacs take straight
+ * binary values.  Although dacs 0, 1 and 2 are 8-bit and dac 3 is 12-bit,
+ * the interface is in terms of 12-bit values [0,4095]
+ */
+bool usrp_write_aux_dac (struct usb_dev_handle *uhd, int slot,
+			 int which_dac, int value);
+
+/*!
+ * \brief Read the specified aux adc
+ *
+ * \p slot: which Tx or Rx slot to read aux dac
+ * \p which_adc: [0,1]  which of the two adcs to read
+ * \p *value: return value, 12-bit straight binary.
+ */
+bool usrp_read_aux_adc (struct usb_dev_handle *udh, int slot,
+			int which_adc, int *value);
+
+
+/*!
+ * \brief usrp daughterboard id to name mapping
+ */
+const std::string usrp_dbid_to_string (int dbid);
+
+
+enum usrp_dbeeprom_status_t { UDBE_OK, UDBE_BAD_SLOT, UDBE_NO_EEPROM, UDBE_INVALID_EEPROM };
+
+struct usrp_dboard_eeprom {
+  unsigned short	id;		// d'board identifier code
+  unsigned short	oe;		// fpga output enables:
+					//   If bit set, i/o pin is an output from FPGA.
+  short			offset[2];	// ADC/DAC offset correction
+};
+
+/*!
+ * \brief Read and return parsed daughterboard eeprom
+ */
+usrp_dbeeprom_status_t
+usrp_read_dboard_eeprom (struct usb_dev_handle *udh,
+			 int slot_id, usrp_dboard_eeprom *eeprom);
+
+/*!
+ * \brief write ADC/DAC offset calibration constants to d'board eeprom
+ */
+bool usrp_write_dboard_offsets (struct usb_dev_handle *udh, int slot_id,
+				short offset0, short offset1);
+
+/*!
+ * \brief return a usrp's serial number.
+ *
+ * Note that this only works on a configured usrp.
+ * \returns non-zero length string iff successful.
+ */
+std::string usrp_serial_number(struct usb_dev_handle *udh);
+
+#endif /* _USRP_PRIMS_H_ */
diff --git a/usrp/host/include/usrp/usrp_slots.h b/usrp/host/include/usrp/usrp_slots.h
new file mode 100644
index 000000000..d2c50fc47
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_slots.h
@@ -0,0 +1,33 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP_SLOTS_H
+#define INCLUDED_USRP_SLOTS_H
+
+// daughterboard slot numbers used in some calls
+
+static const int SLOT_TX_A = 0;
+static const int SLOT_RX_A = 1;
+static const int SLOT_TX_B = 2;
+static const int SLOT_RX_B = 3;
+
+#endif /* INCLUDED_USRP_SLOTS_H */
diff --git a/usrp/host/include/usrp/usrp_standard.h b/usrp/host/include/usrp/usrp_standard.h
new file mode 100644
index 000000000..a631f8b09
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_standard.h
@@ -0,0 +1,452 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004,2008,2009 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP_STANDARD_H
+#define INCLUDED_USRP_STANDARD_H
+
+#include <usrp/usrp_basic.h>
+#include <boost/shared_ptr.hpp>
+#include <usrp/usrp_tune_result.h>
+
+class usrp_standard_tx;
+class usrp_standard_rx;
+
+typedef boost::shared_ptr<usrp_standard_tx> usrp_standard_tx_sptr;
+typedef boost::shared_ptr<usrp_standard_rx> usrp_standard_rx_sptr;
+
+/*!
+ * \ingroup usrp
+ */
+class usrp_standard_common
+{
+  int	d_fpga_caps;		// capability register val
+
+protected:
+  usrp_standard_common(usrp_basic *parent);
+
+public:
+  /*!
+   *\brief does the FPGA implement the final Rx half-band filter?
+   * If it doesn't, the maximum decimation factor with proper gain 
+   * is 1/2 of what it would otherwise be.
+   */
+  bool has_rx_halfband() const;
+
+  /*!
+   * \brief number of digital downconverters implemented in the FPGA
+   * This will be 0, 1, 2 or 4.
+   */
+  int nddcs() const;
+
+  /*!
+   *\brief does the FPGA implement the initial Tx half-band filter?
+   */
+  bool has_tx_halfband() const;
+
+  /*!
+   * \brief number of digital upconverters implemented in the FPGA
+   * This will be 0, 1, or 2.
+   */
+  int nducs() const;
+
+  /*!
+   * \brief Calculate the frequency to use for setting the digital up or down converter.
+   *
+   * \param target_freq is the desired RF frequency (Hz).
+   * \param baseband_freq is the RF frequency that corresponds to DC in the IF coming from the d'board.
+   * \param  fs is the sampling frequency.
+   * \param[out] dxc_freq the frequency to program into the DDC (or DUC).
+   * \param[out] inverted is true if we're operating in an inverted Nyquist zone.
+   */
+  static void calc_dxc_freq(double target_freq, double baseband_freq, double fs,
+			    double *dxc_freq, bool *inverted);
+};
+
+/*!
+ * \brief The C++ interface the receive side of the USRP
+ * \ingroup usrp
+ *
+ * This is the recommended interface to USRP receive functionality
+ * for applications that use the USRP but not GNU Radio.
+ */
+class usrp_standard_rx : public usrp_basic_rx, public usrp_standard_common
+{
+ private:
+  static const int	MAX_CHAN = 4;
+  unsigned int		d_decim_rate;
+  int			d_nchan;
+  int			d_sw_mux;
+  int			d_hw_mux;
+  double		d_rx_freq[MAX_CHAN];
+
+ protected:
+  usrp_standard_rx (int which_board,
+		    unsigned int decim_rate,
+		    int nchan = 1,
+		    int mux = -1,
+		    int mode = 0,
+		    int fusb_block_size = 0,
+		    int fusb_nblocks = 0,
+		    const std::string fpga_filename = "",
+		    const std::string firmware_filename = ""
+		    );  // throws if trouble
+
+  bool write_hw_mux_reg ();
+
+ public:
+
+  enum {
+    FPGA_MODE_NORMAL     = 0x00,
+    FPGA_MODE_LOOPBACK   = 0x01,
+    FPGA_MODE_COUNTING   = 0x02,
+    FPGA_MODE_COUNTING_32BIT   = 0x04
+  };
+
+  ~usrp_standard_rx ();
+
+  /*!
+   * \brief invokes constructor, returns shared_ptr or shared_ptr equivalent of 0 if trouble
+   *
+   * \param which_board	     Which USRP board on usb (not particularly useful; use 0)
+   * \param decim_rate	     decimation factor
+   * \param nchan	     number of channels
+   * \param mux		     Rx mux setting, \sa set_mux
+   * \param mode	     mode
+   * \param fusb_block_size  fast usb xfer block size.  Must be a multiple of 512. 
+   *                         Use zero for a reasonable default.
+   * \param fusb_nblocks     number of fast usb URBs to allocate.  Use zero for a reasonable default. 
+   * \param fpga_filename    Name of rbf file to load
+   * \param firmware_filename Name of ihx file to load
+   */
+  static usrp_standard_rx_sptr make(int which_board,
+				    unsigned int decim_rate,
+				    int nchan = 1,
+				    int mux = -1,
+				    int mode = 0,
+				    int fusb_block_size = 0,
+				    int fusb_nblocks = 0,
+				    const std::string fpga_filename = "",
+				    const std::string firmware_filename = ""
+				    );
+  /*!
+   * \brief Set decimator rate.  \p rate MUST BE EVEN and in [8, 256].
+   *
+   * The final complex sample rate across the USB is
+   *   adc_freq () / decim_rate () * nchannels ()
+   */
+  bool set_decim_rate  (unsigned int rate);
+
+  /*!
+   * \brief Set number of active channels.  \p nchannels must be 1, 2 or 4.
+   *
+   * The final complex sample rate across the USB is
+   *   adc_freq () / decim_rate () * nchannels ()
+   */
+  bool set_nchannels (int nchannels);
+
+  /*!
+   * \brief Set input mux configuration.
+   *
+   * This determines which ADC (or constant zero) is connected to 
+   * each DDC input.  There are 4 DDCs.  Each has two inputs.
+   *
+   * <pre>
+   * Mux value:
+   *
+   *    3                   2                   1                       
+   *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   * +-------+-------+-------+-------+-------+-------+-------+-------+
+   * |   Q3  |   I3  |   Q2  |   I2  |   Q1  |   I1  |   Q0  |   I0  |
+   * +-------+-------+-------+-------+-------+-------+-------+-------+
+   *
+   * Each 4-bit I field is either 0,1,2,3
+   * Each 4-bit Q field is either 0,1,2,3 or 0xf (input is const zero)
+   * All Q's must be 0xf or none of them may be 0xf
+   * </pre>
+   */
+  bool set_mux  (int mux);
+
+  /*!
+   * Determine the appropriate Rx mux value as a function of the subdevice choosen
+   * and the characteristics of the respective daughterboard.
+   */
+  int determine_rx_mux_value(const usrp_subdev_spec &ss);
+  int determine_rx_mux_value(const usrp_subdev_spec &ss_a, const usrp_subdev_spec &ss_b);
+
+  /*!
+   * \brief set the frequency of the digital down converter.
+   *
+   * \p channel must be in the range [0,3].  \p freq is the center
+   * frequency in Hz.  \p freq may be either negative or postive.
+   * The frequency specified is quantized.  Use rx_freq to retrieve
+   * the actual value used.
+   */
+  bool set_rx_freq (int channel, double freq);  
+
+  /*!
+   * \brief set fpga mode
+   */
+  bool set_fpga_mode (int mode);
+
+  /*!
+   * \brief Set the digital down converter phase register.
+   *
+   * \param channel	which ddc channel [0, 3]
+   * \param phase	32-bit integer phase value.
+   */
+  bool set_ddc_phase(int channel, int phase);
+
+  /*!
+   * \brief Specify Rx data format.
+   *
+   * \param format	format specifier
+   *
+   * Rx data format control register
+   *
+   *     3                   2                   1                       
+   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   *  +-----------------------------------------+-+-+---------+-------+
+   *  |          Reserved (Must be zero)        |B|Q|  WIDTH  | SHIFT |
+   *  +-----------------------------------------+-+-+---------+-------+
+   *
+   *  SHIFT specifies arithmetic right shift [0, 15]
+   *  WIDTH specifies bit-width of I & Q samples across the USB [1, 16] (not all valid)
+   *  Q     if set deliver both I & Q, else just I
+   *  B     if set bypass half-band filter.
+   *
+   * Right now the acceptable values are:
+   *
+   *   B  Q  WIDTH  SHIFT
+   *   0  1    16     0
+   *   0  1     8     8
+   *
+   * More valid combos to come.
+   *
+   * Default value is 0x00000300  16-bits, 0 shift, deliver both I & Q.
+   */
+  bool set_format(unsigned int format);
+
+  static unsigned int make_format(int width=16, int shift=0,
+				  bool want_q=true, bool bypass_halfband=false);
+  static int format_width(unsigned int format);
+  static int format_shift(unsigned int format);
+  static bool format_want_q(unsigned int format);
+  static bool format_bypass_halfband(unsigned int format);
+
+  /*!
+   * \brief High-level "tune" method.  Works for the single channel case.
+   *
+   * This method adjusts both the daughterboard LO and the DDC so that
+   * target_freq ends up at DC in the complex baseband samples.
+   *
+   * \param chan  which DDC channel we're controlling (almost always 0).
+   * \param db    the daughterboard we're controlling.
+   * \param target_freq the RF frequency we want at DC in the complex baseband.
+   * \param[out] result details how the hardware was configured.
+   *
+   * \returns true iff everything was successful.
+   */
+  bool tune(int chan, db_base_sptr db, double target_freq, usrp_tune_result *result);
+  
+
+  // ACCESSORS
+  unsigned int decim_rate () const;
+  double rx_freq (int channel) const;
+  int nchannels () const;
+  int mux () const;
+  unsigned int format () const;
+
+  // called in base class to derived class order
+  bool start ();
+  bool stop ();
+};
+
+// ----------------------------------------------------------------
+
+/*!
+ * \brief The C++ interface the transmit side of the USRP
+ * \ingroup usrp
+ *
+ * This is the recommended interface to USRP transmit functionality
+ * for applications that use the USRP but not GNU Radio.
+ *
+ * Uses digital upconverter (coarse & fine modulators) in AD9862...
+ */
+class usrp_standard_tx : public usrp_basic_tx, public usrp_standard_common
+{
+ public:
+  enum coarse_mod_t {
+    CM_NEG_FDAC_OVER_4,		// -32 MHz
+    CM_NEG_FDAC_OVER_8,		// -16 MHz
+    CM_OFF,
+    CM_POS_FDAC_OVER_8,		// +16 MHz
+    CM_POS_FDAC_OVER_4		// +32 MHz
+  };
+
+ protected:
+  static const int	MAX_CHAN = 2;
+  unsigned int		d_interp_rate;
+  int			d_nchan;
+  int			d_sw_mux;
+  int			d_hw_mux;
+  double		d_tx_freq[MAX_CHAN];
+  coarse_mod_t		d_coarse_mod[MAX_CHAN];
+  unsigned char		d_tx_modulator_shadow[MAX_CHAN];
+
+  virtual bool set_coarse_modulator (int channel, coarse_mod_t cm);
+  usrp_standard_tx::coarse_mod_t coarse_modulator (int channel) const;
+
+ protected:
+  usrp_standard_tx (int which_board,
+		    unsigned int interp_rate,
+		    int nchan = 1,
+		    int	mux = -1,
+		    int fusb_block_size = 0,
+		    int fusb_nblocks = 0,
+		    const std::string fpga_filename = "",
+		    const std::string firmware_filename = ""
+		    );	// throws if trouble
+
+  bool write_hw_mux_reg ();
+
+ public:
+  ~usrp_standard_tx ();
+
+  /*!
+   * \brief invokes constructor, returns shared_ptr or shared_ptr equivalent of 0 if trouble
+   *
+   * \param which_board	     Which USRP board on usb (not particularly useful; use 0)
+   * \param interp_rate	     interpolation factor
+   * \param nchan	     number of channels
+   * \param mux		     Tx mux setting, \sa set_mux
+   * \param fusb_block_size  fast usb xfer block size.  Must be a multiple of 512. 
+   *                         Use zero for a reasonable default.
+   * \param fusb_nblocks     number of fast usb URBs to allocate.  Use zero for a reasonable default. 
+   * \param fpga_filename    Name of rbf file to load
+   * \param firmware_filename Name of ihx file to load
+   */
+  static usrp_standard_tx_sptr make(int which_board,
+				    unsigned int interp_rate,
+				    int nchan = 1,
+				    int mux = -1,
+				    int fusb_block_size = 0,
+				    int fusb_nblocks = 0,
+				    const std::string fpga_filename = "",
+				    const std::string firmware_filename = ""
+				    );
+
+  /*!
+   * \brief Set interpolator rate.  \p rate must be in [4, 512] and a multiple of 4.
+   *
+   * The final complex sample rate across the USB is
+   *   dac_freq () / interp_rate () * nchannels ()
+   */
+  virtual bool set_interp_rate (unsigned int rate);
+
+  /*!
+   * \brief Set number of active channels.  \p nchannels must be 1 or 2.
+   *
+   * The final complex sample rate across the USB is
+   *   dac_freq () / decim_rate () * nchannels ()
+   */
+  bool set_nchannels  (int nchannels);
+
+  /*!
+   * \brief Set output mux configuration.
+   *
+   * <pre>
+   *     3                   2                   1                       
+   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   *  +-------------------------------+-------+-------+-------+-------+
+   *  |                               | DAC3  | DAC2  | DAC1  |  DAC0 |
+   *  +-------------------------------+-------+-------+-------+-------+
+   * 
+   *  There are two interpolators with complex inputs and outputs.
+   *  There are four DACs.
+   * 
+   *  Each 4-bit DACx field specifies the source for the DAC and
+   *  whether or not that DAC is enabled.  Each subfield is coded
+   *  like this: 
+   * 
+   *     3 2 1 0
+   *    +-+-----+
+   *    |E|  N  |
+   *    +-+-----+
+   * 
+   *  Where E is set if the DAC is enabled, and N specifies which
+   *  interpolator output is connected to this DAC.
+   * 
+   *   N   which interp output
+   *  ---  -------------------
+   *   0   chan 0 I
+   *   1   chan 0 Q
+   *   2   chan 1 I
+   *   3   chan 1 Q
+   * </pre>
+   */
+  bool set_mux  (int mux);
+
+  /*!
+   * Determine the appropriate Tx mux value as a function of the subdevice choosen
+   * and the characteristics of the respective daughterboard.
+   */
+  int determine_tx_mux_value(const usrp_subdev_spec &ss);
+  int determine_tx_mux_value(const usrp_subdev_spec &ss_a, const usrp_subdev_spec &ss_b);
+
+  /*!
+   * \brief set the frequency of the digital up converter.
+   *
+   * \p channel must be in the range [0,1].  \p freq is the center
+   * frequency in Hz.  It must be in the range [-44M, 44M].
+   * The frequency specified is quantized.  Use tx_freq to retrieve
+   * the actual value used.
+   */
+  virtual bool set_tx_freq (int channel, double freq);  // chan: [0,1]
+
+  // ACCESSORS
+  unsigned int interp_rate () const;
+  double tx_freq (int channel) const;
+  int nchannels () const;
+  int mux () const;
+
+  /*!
+   * \brief High-level "tune" method.  Works for the single channel case.
+   *
+   * This method adjusts both the daughterboard LO and the DUC so that
+   * DC in the complex baseband samples ends up at RF target_freq.
+   *
+   * \param chan  which DUC channel we're controlling (usually == which_side).
+   * \param db    the daughterboard we're controlling.
+   * \param target_freq the RF frequency we want our baseband translated to.
+   * \param[out] result details how the hardware was configured.
+   *
+   * \returns true iff everything was successful.
+   */
+  bool tune(int chan, db_base_sptr db, double target_freq, usrp_tune_result *result);
+
+
+  // called in base class to derived class order
+  bool start ();
+  bool stop ();
+};
+
+#endif /* INCLUDED_USRP_STANDARD_H */
diff --git a/usrp/host/include/usrp/usrp_subdev_spec.h b/usrp/host/include/usrp/usrp_subdev_spec.h
new file mode 100644
index 000000000..e841ff832
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_subdev_spec.h
@@ -0,0 +1,50 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifndef INCLUDED_USRP_SUBDEV_SPEC_H
+#define INCLUDED_USRP_SUBDEV_SPEC_H
+
+/*!
+ * \brief specify a daughterboard and subdevice on a daughterboard.
+ *
+ * In the USRP1, there are two sides, A and B.
+ *
+ * A daughterboard generally implements a single subdevice, but may in
+ * general implement any number of subdevices.  At this time, all daughterboards
+ * with the exception of the Basic Rx and LF Rx implement a single subdevice.
+ *
+ * The Basic Rx and LF Rx implement 2 subdevices (soon 3).  Subdevice
+ * 0 routes input RX-A to the DDC I input and routes a constant zero
+ * to the DDC Q input.  Similarly, subdevice 1 routes input RX-B to
+ * the DDC I input and routes a constant zero to the DDC Q
+ * input.  Subdevice 2 (when implemented) will route RX-A to the DDC I
+ * input and RX-B to the DDC Q input.
+ */
+
+struct usrp_subdev_spec {
+  unsigned int	side;		// 0 -> A; 1 -> B
+  unsigned int	subdev;		// which subdevice (usually zero)
+
+  usrp_subdev_spec(unsigned int _side = 0, unsigned int _subdev = 0)
+    : side(_side), subdev(_subdev) {}
+};
+
+#endif /* INCLUDED_USRP_SUBDEV_SPEC_H */
diff --git a/usrp/host/include/usrp/usrp_tune_result.h b/usrp/host/include/usrp/usrp_tune_result.h
new file mode 100644
index 000000000..200541a37
--- /dev/null
+++ b/usrp/host/include/usrp/usrp_tune_result.h
@@ -0,0 +1,44 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef INCLUDED_USRP_TUNE_RESULT_H
+#define INCLUDED_USRP_TUNE_RESULT_H
+
+class usrp_tune_result
+{
+public:
+  // RF frequency that corresponds to DC in the IF
+  double baseband_freq;
+
+  // frequency programmed into the DDC/DUC
+  double dxc_freq;
+
+  // residual frequency (typically < 0.01 Hz)
+  double residual_freq;
+
+  // is the spectrum inverted?
+  bool inverted;
+
+  usrp_tune_result(double baseband=0, double dxc=0, double residual=0, bool _inverted=false)
+    : baseband_freq(baseband), dxc_freq(dxc),
+      residual_freq(residual), inverted(_inverted) {}
+};
+
+#endif /* INCLUDED_USRP_TUNE_RESULT_H */