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authormatt2007-03-20 01:03:10 +0000
committermatt2007-03-20 01:03:10 +0000
commit5a83b3327d0c38f35187b72aef11110110002f4a (patch)
tree8d2b3643122f3593960a03c623e7a172beb2f90b /usrp/fpga
parent315b13bc36682df0566623b5f5f1bc2428b1ae05 (diff)
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allow for varying the bitwidth
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4781 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'usrp/fpga')
-rwxr-xr-xusrp/fpga/sdr_lib/cic_interp.v3
1 files changed, 2 insertions, 1 deletions
diff --git a/usrp/fpga/sdr_lib/cic_interp.v b/usrp/fpga/sdr_lib/cic_interp.v
index 0dd621623..732f82ce0 100755
--- a/usrp/fpga/sdr_lib/cic_interp.v
+++ b/usrp/fpga/sdr_lib/cic_interp.v
@@ -82,7 +82,8 @@ module cic_interp(clock,reset,enable,rate,strobe_in,strobe_out,signal_in,signal_
wire [bw+maxbitgain-1:0] signal_out_unnorm = integrator[N-1];
- cic_int_shifter cic_int_shifter(rate,signal_out_unnorm,signal_out);
+ cic_int_shifter #(bw)
+ cic_int_shifter(rate,signal_out_unnorm,signal_out);
endmodule // cic_interp