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authorJohnathan Corgan2010-02-28 12:47:43 -0800
committerJohnathan Corgan2010-02-28 12:47:43 -0800
commita2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 (patch)
tree77121ca27b951f9bd687dbba33f6a9383ac74d5a /usrp/fpga/tb/run_fullchip
parentdb29a2cfc18554ae0a3c55a4e13dc4cbfa86317f (diff)
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Remove usrp1 and usrp2 FPGA files. These are now hosted at:
git://ettus.sourcerepo.com/ettus/fpga.git ...under the 'usrp1' and 'usrp2' top-level directories.
Diffstat (limited to 'usrp/fpga/tb/run_fullchip')
-rwxr-xr-xusrp/fpga/tb/run_fullchip4
1 files changed, 0 insertions, 4 deletions
diff --git a/usrp/fpga/tb/run_fullchip b/usrp/fpga/tb/run_fullchip
deleted file mode 100755
index eb81d7ff7..000000000
--- a/usrp/fpga/tb/run_fullchip
+++ /dev/null
@@ -1,4 +0,0 @@
-#!/bin/sh
-
-iverilog -y ../toplevel/fullchip -y ../sdr_lib -y ../models -y . -o fullchip_tb fullchip_tb.v
-