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authorJohnathan Corgan2010-02-28 12:47:43 -0800
committerJohnathan Corgan2010-02-28 12:47:43 -0800
commita2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 (patch)
tree77121ca27b951f9bd687dbba33f6a9383ac74d5a /usrp/fpga/tb/makesine.pl
parentdb29a2cfc18554ae0a3c55a4e13dc4cbfa86317f (diff)
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Remove usrp1 and usrp2 FPGA files. These are now hosted at:
git://ettus.sourcerepo.com/ettus/fpga.git ...under the 'usrp1' and 'usrp2' top-level directories.
Diffstat (limited to 'usrp/fpga/tb/makesine.pl')
-rwxr-xr-xusrp/fpga/tb/makesine.pl14
1 files changed, 0 insertions, 14 deletions
diff --git a/usrp/fpga/tb/makesine.pl b/usrp/fpga/tb/makesine.pl
deleted file mode 100755
index 9aebd6947..000000000
--- a/usrp/fpga/tb/makesine.pl
+++ /dev/null
@@ -1,14 +0,0 @@
-#!/usr/bin/perl
-
-$angle = 0;
-$angle_inc = 2*3.14159/87.2;
-$amp = 1;
-$amp_rate = 1.0035;
-for($i=0;$i<3500;$i++)
- {
- printf("@(posedge clk);xi<= #1 16'h%x;yi<= #1 16'h%x;\n",65535&int($amp*cos($angle)),65535&int($amp*sin($angle)));
- $angle += $angle_inc;
- $amp *= $amp_rate;
- }
-
-printf("\$finish;\n");