Remove usrp1 and usrp2 FPGA files. These are now hosted at:

git://ettus.sourcerepo.com/ettus/fpga.git

...under the 'usrp1' and 'usrp2' top-level directories.

1 files changed, 0 insertions, 7 deletions

diff --git a/usrp/fpga/megacells/mylpm_addsub_inst.v b/usrp/fpga/megacells/mylpm_addsub_inst.v
deleted file mode 100755
index dd732bd6d..000000000
--- a/usrp/fpga/megacells/mylpm_addsub_inst.v
+++ /dev/null
@@ -1,7 +0,0 @@
-mylpm_addsub	mylpm_addsub_inst (
-	.add_sub ( add_sub_sig ),
-	.dataa ( dataa_sig ),
-	.datab ( datab_sig ),
-	.clock ( clock_sig ),
-	.result ( result_sig )
-	);