Remove usrp1 and usrp2 FPGA files. These are now hosted at:

git://ettus.sourcerepo.com/ettus/fpga.git

...under the 'usrp1' and 'usrp2' top-level directories.

1 files changed, 0 insertions, 5 deletions

diff --git a/usrp/fpga/megacells/add32_inst.v b/usrp/fpga/megacells/add32_inst.v
deleted file mode 100755
index bc7e6d441..000000000
--- a/usrp/fpga/megacells/add32_inst.v
+++ /dev/null
@@ -1,5 +0,0 @@
-add32	add32_inst (
-	.dataa ( dataa_sig ),
-	.datab ( datab_sig ),
-	.result ( result_sig )
-	);