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author | jcorgan | 2009-04-04 05:59:44 +0000 |
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committer | jcorgan | 2009-04-04 05:59:44 +0000 |
commit | 40402fb8f5c1009b6fa205303c7a57b0ae918148 (patch) | |
tree | 9faab37d57dc43f2e5c7a56ccec54926929a64c3 /gr-usrp2/src | |
parent | 0907e015a341269f1d9fdb556fcadd8c051c7f81 (diff) | |
download | gnuradio-40402fb8f5c1009b6fa205303c7a57b0ae918148.tar.gz gnuradio-40402fb8f5c1009b6fa205303c7a57b0ae918148.tar.bz2 gnuradio-40402fb8f5c1009b6fa205303c7a57b0ae918148.zip |
Merged r10712:10765 from jcorgan/gpio into trunk. Adds out-of-band and streaming GPIO functions for USRP2.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@10766 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'gr-usrp2/src')
-rw-r--r-- | gr-usrp2/src/usrp2.i | 41 | ||||
-rw-r--r-- | gr-usrp2/src/usrp2_sink_base.cc | 20 | ||||
-rw-r--r-- | gr-usrp2/src/usrp2_sink_base.h | 20 | ||||
-rw-r--r-- | gr-usrp2/src/usrp2_source_base.cc | 30 | ||||
-rw-r--r-- | gr-usrp2/src/usrp2_source_base.h | 25 |
5 files changed, 132 insertions, 4 deletions
diff --git a/gr-usrp2/src/usrp2.i b/gr-usrp2/src/usrp2.i index 216aec937..3d6da0606 100644 --- a/gr-usrp2/src/usrp2.i +++ b/gr-usrp2/src/usrp2.i @@ -81,6 +81,12 @@ public: bool daughterboard_id(int *dbid); unsigned int overruns(); unsigned int missing(); + bool set_gpio_ddr(uint16_t value, uint16_t mask); + bool set_gpio_sels(std::string sels); + bool write_gpio(uint16_t value, uint16_t mask); + %rename(_real_read_gpio) read_gpio; + bool read_gpio(uint16_t *value); + bool enable_gpio_streaming(int enable); }; // ---------------------------------------------------------------- @@ -147,6 +153,11 @@ public: double freq_max(); %rename(_real_daughterboard_id) daughterboard_id; bool daughterboard_id(int *dbid); + bool set_gpio_ddr(uint16_t value, uint16_t mask); + bool set_gpio_sels(std::string sels); + bool write_gpio(uint16_t value, uint16_t mask); + %rename(_real_read_gpio) read_gpio; + bool read_gpio(uint16_t *value); }; // ---------------------------------------------------------------- @@ -189,12 +200,15 @@ public: // some utility functions to allow Python to deal with pointers %{ - long *make_long_ptr() { return (long *)malloc(sizeof(long)); } + long *make_long_ptr() { return new long; } long deref_long_ptr(long *l) { return *l; } - void free_long_ptr(long *l) { free(l); } - int *make_int_ptr() { return (int *)malloc(sizeof(int)); } + void free_long_ptr(long *l) { delete l; } + int *make_int_ptr() { return new int; } int deref_int_ptr(int *l) { return *l; } - void free_int_ptr(int *l) { free(l); } + void free_int_ptr(int *l) { delete l; } + uint16_t *make_uint16_ptr() { return new uint16_t; } + int deref_uint16_ptr(uint16_t *l) { return *l; } + void free_uint16_ptr(uint16_t *l) { delete l; } %} long *make_long_ptr(); @@ -203,6 +217,9 @@ void free_long_ptr(long *l); int *make_int_ptr(); int deref_int_ptr(int *l); void free_int_ptr(int *l); +uint16_t *make_uint16_ptr(); +int deref_uint16_ptr(uint16_t *l); +void free_uint16_ptr(uint16_t *l); // create a more pythonic interface %pythoncode %{ @@ -273,6 +290,17 @@ def __default_tx_scale_iq(self, interp): self._real_default_tx_scale_iq(interp, scale_i, scale_q) return (deref_int_ptr(scale_i), deref_int_ptr(scale_q)) +def __read_gpio(self): + value = make_uint16_ptr() + r = self._real_read_gpio(value) + if r: + result = deref_uint16_ptr(value) + else: + result = None + free_uint16_ptr(value) + return result + + usrp2_source_32fc_sptr.set_center_freq = __set_center_freq usrp2_source_16sc_sptr.set_center_freq = __set_center_freq usrp2_sink_32fc_sptr.set_center_freq = __set_center_freq @@ -306,4 +334,9 @@ usrp2_sink_16sc_sptr.daughterboard_id = __daughterboard_id usrp2_sink_32fc_sptr.default_scale_iq = __default_tx_scale_iq usrp2_sink_16sc_sptr.default_scale_iq = __default_tx_scale_iq +usrp2_source_32fc_sptr.read_gpio = __read_gpio +usrp2_source_16sc_sptr.read_gpio = __read_gpio +usrp2_sink_32fc_sptr.read_gpio = __read_gpio +usrp2_sink_16sc_sptr.read_gpio = __read_gpio + %} diff --git a/gr-usrp2/src/usrp2_sink_base.cc b/gr-usrp2/src/usrp2_sink_base.cc index 8118407c5..4579d1651 100644 --- a/gr-usrp2/src/usrp2_sink_base.cc +++ b/gr-usrp2/src/usrp2_sink_base.cc @@ -129,3 +129,23 @@ usrp2_sink_base::daughterboard_id(int *dbid) { return d_u2->tx_daughterboard_id(dbid); } + +bool usrp2_sink_base::set_gpio_ddr(uint16_t value, uint16_t mask) +{ + return d_u2->set_gpio_ddr(usrp2::GPIO_TX_BANK, value, mask); +} + +bool usrp2_sink_base::set_gpio_sels(std::string sels) +{ + return d_u2->set_gpio_sels(usrp2::GPIO_TX_BANK, sels); +} + +bool usrp2_sink_base::write_gpio(uint16_t value, uint16_t mask) +{ + return d_u2->write_gpio(usrp2::GPIO_TX_BANK, value, mask); +} + +bool usrp2_sink_base::read_gpio(uint16_t *value) +{ + return d_u2->read_gpio(usrp2::GPIO_TX_BANK, value); +} diff --git a/gr-usrp2/src/usrp2_sink_base.h b/gr-usrp2/src/usrp2_sink_base.h index 37905f4e8..f973e805c 100644 --- a/gr-usrp2/src/usrp2_sink_base.h +++ b/gr-usrp2/src/usrp2_sink_base.h @@ -114,6 +114,26 @@ public: * -2 if invalid EEPROM on daughterboard. */ bool daughterboard_id(int *dbid); + + /*! + * \brief Set daughterboard GPIO data direction register. + */ + bool set_gpio_ddr(uint16_t value, uint16_t mask); + + /*! + * \brief Set daughterboard GPIO output selection register. + */ + bool set_gpio_sels(std::string sels); + + /*! + * \brief Set daughterboard GPIO pin values. + */ + bool write_gpio(uint16_t value, uint16_t mask); + + /*! + * \brief Read daughterboard GPIO pin values + */ + bool read_gpio(uint16_t *value); }; #endif /* INCLUDED_USRP2_SINK_BASE_H */ diff --git a/gr-usrp2/src/usrp2_source_base.cc b/gr-usrp2/src/usrp2_source_base.cc index 8bcac5d69..0ad7008a6 100644 --- a/gr-usrp2/src/usrp2_source_base.cc +++ b/gr-usrp2/src/usrp2_source_base.cc @@ -147,3 +147,33 @@ usrp2_source_base::stop() { return d_u2->stop_rx_streaming(0); // FIXME: someday sources will have channel #s } + +bool +usrp2_source_base::set_gpio_ddr(uint16_t value, uint16_t mask) +{ + return d_u2->set_gpio_ddr(usrp2::GPIO_RX_BANK, value, mask); +} + +bool +usrp2_source_base::set_gpio_sels(std::string sels) +{ + return d_u2->set_gpio_sels(usrp2::GPIO_RX_BANK, sels); +} + +bool +usrp2_source_base::write_gpio(uint16_t value, uint16_t mask) +{ + return d_u2->write_gpio(usrp2::GPIO_RX_BANK, value, mask); +} + +bool +usrp2_source_base::read_gpio(uint16_t *value) +{ + return d_u2->read_gpio(usrp2::GPIO_RX_BANK, value); +} + +bool +usrp2_source_base::enable_gpio_streaming(int enable) +{ + return d_u2->enable_gpio_streaming(usrp2::GPIO_RX_BANK, enable); +} diff --git a/gr-usrp2/src/usrp2_source_base.h b/gr-usrp2/src/usrp2_source_base.h index f98d329fd..2e2d51fc3 100644 --- a/gr-usrp2/src/usrp2_source_base.h +++ b/gr-usrp2/src/usrp2_source_base.h @@ -129,6 +129,31 @@ public: * \brief Called by scheduler when stopping flowgraph */ virtual bool stop(); + + /*! + * \brief Set daughterboard GPIO data direction register. + */ + bool set_gpio_ddr(uint16_t value, uint16_t mask); + + /*! + * \brief Set daughterboard GPIO output selection register. + */ + bool set_gpio_sels(std::string sels); + + /*! + * \brief Set daughterboard GPIO pin values. + */ + bool write_gpio(uint16_t value, uint16_t mask); + + /*! + * \brief Read daughterboard GPIO pin values + */ + bool read_gpio(uint16_t *value); + + /*! + * \brief Enable streaming GPIO in sample LSBs + */ + bool enable_gpio_streaming(int enable); }; #endif /* INCLUDED_USRP2_SOURCE_BASE_H */ |