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authorJohnathan Corgan2010-06-19 11:27:56 -0700
committerJohnathan Corgan2010-06-19 11:27:56 -0700
commite20160b7cc480176ba629ebfbe9fb073963c25d3 (patch)
tree5651ad07a8d2ccf7869edf6c33a5a22b2831846c /gr-usrp2/src/usrp2_sink_base.h
parentf0b3dab8125979630651e8d016be296ae607c641 (diff)
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gr-usrp2: implement start_streaming_at(usrp2::fpga_timestamp time)
This new method on usrp2.sink_* causes the first TX sample data to be sent at the FPGA clock time specified, with all further data immediately following. u = usrp2.sink_32fc() # or 16sc ...configure sink here... u.sync_to_pps() ...delay a second for PPS to have happened u.start_streaming_at(int(100e6)) # start TX stream one second later ...start flowgraph here... If this function is not called, all transmit data will be sent immediately (the prior behavior).
Diffstat (limited to 'gr-usrp2/src/usrp2_sink_base.h')
-rw-r--r--gr-usrp2/src/usrp2_sink_base.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/gr-usrp2/src/usrp2_sink_base.h b/gr-usrp2/src/usrp2_sink_base.h
index 38dc4f236..d831d4df6 100644
--- a/gr-usrp2/src/usrp2_sink_base.h
+++ b/gr-usrp2/src/usrp2_sink_base.h
@@ -37,6 +37,9 @@ protected:
const std::string &mac)
throw (std::runtime_error);
+ bool d_should_wait;
+ usrp2::fpga_timestamp d_tx_time;
+
public:
~usrp2_sink_base();
@@ -139,6 +142,11 @@ public:
* \brief Read daughterboard GPIO pin values
*/
bool read_gpio(uint16_t *value);
+
+ /*!
+ * \brief First samples begin streaming to USRP2 at given time
+ */
+ bool start_streaming_at(usrp2::fpga_timestamp time);
};
#endif /* INCLUDED_USRP2_SINK_BASE_H */