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author | Josh Blum | 2011-10-06 13:39:21 -0700 |
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committer | Josh Blum | 2011-11-07 18:56:28 -0800 |
commit | 84c3e0e0fb2df99213ed238ac4f032411d003b30 (patch) | |
tree | 632786ca70e7c564a8a3b463236e9e816bb8c100 /gr-uhd/grc/gen_uhd_usrp_blocks.py | |
parent | 5b0ae93c8f319bbc367254172719d40f11a0f55b (diff) | |
download | gnuradio-84c3e0e0fb2df99213ed238ac4f032411d003b30.tar.gz gnuradio-84c3e0e0fb2df99213ed238ac4f032411d003b30.tar.bz2 gnuradio-84c3e0e0fb2df99213ed238ac4f032411d003b30.zip |
uhd: python/swig/grc tweaks until it works
Diffstat (limited to 'gr-uhd/grc/gen_uhd_usrp_blocks.py')
-rw-r--r-- | gr-uhd/grc/gen_uhd_usrp_blocks.py | 46 |
1 files changed, 25 insertions, 21 deletions
diff --git a/gr-uhd/grc/gen_uhd_usrp_blocks.py b/gr-uhd/grc/gen_uhd_usrp_blocks.py index 19e64d2fd..5a5b2d3ca 100644 --- a/gr-uhd/grc/gen_uhd_usrp_blocks.py +++ b/gr-uhd/grc/gen_uhd_usrp_blocks.py @@ -28,7 +28,7 @@ MAIN_TMPL = """\ <make>uhd.usrp_$(sourk)( device_addr=\$dev_addr, stream_args=uhd.stream_args( - cpu_format='\$type.type', + cpu_format='\$type', otw_format='\$otw.format', args='\$otw.args', channels=range(\$nchan), @@ -88,63 +88,67 @@ self.\$(id).set_bandwidth(\$bw$(n), $n) <key>type</key> <type>enum</type> <option> - <name>complex float32</name> - <key>complex</key> - <opt>type:fc32</opt> + <name>Complex float32</name> + <key>fc32</key> + <opt>type:complex</opt> <opt>vlen:1</opt> </option> <option> - <name>complex uint16</name> - <key>short</key> - <opt>type:sc16</opt> + <name>Complex int16</name> + <key>sc16</key> + <opt>type:short</opt> <opt>vlen:2</opt> </option> <option> - <name>real float32</name> - <key>float</key> - <opt>type:f32</opt> + <name>Real float32</name> + <key>f32</key> + <opt>type:float</opt> <opt>vlen:1</opt> </option> <option> - <name>real uint16</name> - <key>short</key> - <opt>type:s16</opt> + <name>Real uint16</name> + <key>s16</key> + <opt>type:short</opt> <opt>vlen:1</opt> </option> </param> <param> <name>Wire Format</name> - <key>otw_format</key> + <key>otw</key> <type>enum</type> <option> - <name>complex uint16</name> + <name>Complex int16</name> <key>sc16</key> <opt>format:sc16</opt> <opt>args:</opt> </option> <option> - <name>complex uint8</name> + <name>Complex int8</name> <key>sc8</key> <opt>format:sc8</opt> <opt>args:</opt> </option> <option> - <name>real uint16</name> + <name>Real int16</name> + <key>s16</key> <opt>format:s16</opt> <opt>args:</opt> </option> <option> - <name>real uint8</name> + <name>Real int8</name> + <key>s8</key> <opt>format:s8</opt> <opt>args:</opt> </option> <option> - <name>magnitude uint16</name> + <name>Magnitude int16</name> + <key>s16_mag</key> <opt>format:s16</opt> <opt>args:magnitude</opt> </option> <option> - <name>magnitude uint8</name> + <name>Magnitude int8</name> + <key>s8_mag</key> <opt>format:s8</opt> <opt>args:magnitude</opt> </option> @@ -263,7 +267,7 @@ self.\$(id).set_bandwidth(\$bw$(n), $n) <check>\$nchan >= \$num_mboards</check> <$sourk> <name>$direction</name> - <type>\$type</type> + <type>\$type.type</type> <vlen>\$type.vlen</vlen> <nports>\$nchan</nports> </$sourk> |