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author | jcorgan | 2007-06-05 04:21:29 +0000 |
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committer | jcorgan | 2007-06-05 04:21:29 +0000 |
commit | e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5 (patch) | |
tree | 0081a8487d3a4bb7a65404c2662d0a7480f50421 /gr-sounder/src/fpga/top | |
parent | 389906ea28957c6d7a08b5cd43a4ac2ab0c9d24d (diff) | |
download | gnuradio-e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5.tar.gz gnuradio-e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5.tar.bz2 gnuradio-e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5.zip |
Merged r5566:5676 from jcorgan/snd into trunk, with minor changes. Component gr-sounder is now complete for recording impulse responses to a file.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@5679 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'gr-sounder/src/fpga/top')
-rw-r--r--[-rwxr-xr-x] | gr-sounder/src/fpga/top/usrp_sounder.qsf | 9 | ||||
-rwxr-xr-x | gr-sounder/src/fpga/top/usrp_sounder.rbf | bin | 112186 -> 113716 bytes | |||
-rw-r--r-- | gr-sounder/src/fpga/top/usrp_sounder.v | 8 |
3 files changed, 10 insertions, 7 deletions
diff --git a/gr-sounder/src/fpga/top/usrp_sounder.qsf b/gr-sounder/src/fpga/top/usrp_sounder.qsf index 5ff52583f..4d60f5f13 100755..100644 --- a/gr-sounder/src/fpga/top/usrp_sounder.qsf +++ b/gr-sounder/src/fpga/top/usrp_sounder.qsf @@ -236,7 +236,7 @@ set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
set_global_assignment -name IO_PLACEMENT_OPTIMIZATION OFF
-set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
+set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
set_global_assignment -name INC_PLC_MODE OFF
set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF
set_instance_assignment -name IO_STANDARD LVTTL -to usbdata[12]
@@ -368,13 +368,15 @@ set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-set_global_assignment -name VERILOG_FILE ../lib/strobe.v
+set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING OFF
+set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE REALISTIC
set_global_assignment -name VERILOG_FILE ../lib/lfsr_constants.v
set_global_assignment -name VERILOG_FILE ../lib/lfsr.v
set_global_assignment -name VERILOG_FILE ../lib/dac_interface.v
set_global_assignment -name VERILOG_FILE ../lib/dacpll.v
set_global_assignment -name VERILOG_FILE ../lib/sounder_rx.v
set_global_assignment -name VERILOG_FILE ../lib/sounder_tx.v
+set_global_assignment -name VERILOG_FILE ../lib/sounder_ctrl.v
set_global_assignment -name VERILOG_FILE ../lib/sounder.v
set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/atr_delay.v
set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/sign_extend.v
@@ -390,4 +392,5 @@ set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/master_co set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/rssi.v
set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/rx_dcoffset.v
set_global_assignment -name VERILOG_FILE ../../../../usrp/fpga/sdr_lib/serial_io.v
-set_global_assignment -name VERILOG_FILE usrp_sounder.v
\ No newline at end of file +set_global_assignment -name VERILOG_FILE usrp_sounder.v
+set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
\ No newline at end of file diff --git a/gr-sounder/src/fpga/top/usrp_sounder.rbf b/gr-sounder/src/fpga/top/usrp_sounder.rbf Binary files differindex b6f494227..e2c9db6c4 100755 --- a/gr-sounder/src/fpga/top/usrp_sounder.rbf +++ b/gr-sounder/src/fpga/top/usrp_sounder.rbf diff --git a/gr-sounder/src/fpga/top/usrp_sounder.v b/gr-sounder/src/fpga/top/usrp_sounder.v index bb6305691..a88b2388e 100644 --- a/gr-sounder/src/fpga/top/usrp_sounder.v +++ b/gr-sounder/src/fpga/top/usrp_sounder.v @@ -151,8 +151,8 @@ module usrp_sounder sounder sounder ( .clk_i(clk64),.saddr_i(serial_addr),.sdata_i(serial_data),.s_strobe_i(serial_strobe), - .tx_strobe_i(tx_sample_strobe),.tx_dac_i_o(tx_i),.tx_dac_q_o(tx_q), - .rx_strobe_i(rx_sample_strobe),.rx_adc_i_i(rx_adc0_i),.rx_adc_q_i(rx_adc0_q), + .tx_strobe_o(tx_sample_strobe),.tx_dac_i_o(tx_i),.tx_dac_q_o(tx_q), + .rx_adc_i_i(rx_adc0_i),.rx_adc_q_i(rx_adc0_q), .rx_strobe_o(rx_strobe),.rx_imp_i_o(rx_buf_i),.rx_imp_q_o(rx_buf_q) ); @@ -170,7 +170,7 @@ module usrp_sounder ( .master_clk(clk64),.serial_clock(SCLK),.serial_data_in(SDI), .enable(SEN_FPGA),.reset(1'b0),.serial_data_out(SDO), .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), - .readback_0(),.readback_1(),.readback_2(capabilities),.readback_3(), + .readback_0({io_rx_a,io_tx_a}),.readback_1({io_rx_b,io_tx_b}),.readback_2(capabilities),.readback_3(32'hf0f0931a), .readback_4(),.readback_5(),.readback_6(),.readback_7() ); @@ -182,7 +182,7 @@ module usrp_sounder .tx_dsp_reset(tx_dsp_reset),.rx_dsp_reset(rx_dsp_reset), .enable_tx(enable_tx),.enable_rx(enable_rx), .interp_rate(),.decim_rate(), - .tx_sample_strobe(tx_sample_strobe),.strobe_interp(), + .tx_sample_strobe(),.strobe_interp(), .rx_sample_strobe(rx_sample_strobe),.strobe_decim(), .tx_empty(tx_empty), .debug_0(),.debug_1(), |