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author | jcorgan | 2007-06-05 04:21:29 +0000 |
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committer | jcorgan | 2007-06-05 04:21:29 +0000 |
commit | e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5 (patch) | |
tree | 0081a8487d3a4bb7a65404c2662d0a7480f50421 /gr-sounder/src/fpga/lib | |
parent | 389906ea28957c6d7a08b5cd43a4ac2ab0c9d24d (diff) | |
download | gnuradio-e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5.tar.gz gnuradio-e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5.tar.bz2 gnuradio-e283fe844c88aa33b6bde4a7cb74f0d1c2ddbbc5.zip |
Merged r5566:5676 from jcorgan/snd into trunk, with minor changes. Component gr-sounder is now complete for recording impulse responses to a file.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@5679 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'gr-sounder/src/fpga/lib')
-rw-r--r-- | gr-sounder/src/fpga/lib/Makefile.am | 1 | ||||
-rw-r--r-- | gr-sounder/src/fpga/lib/dac_interface.v | 4 | ||||
-rw-r--r-- | gr-sounder/src/fpga/lib/lfsr.v | 4 | ||||
-rw-r--r--[-rwxr-xr-x] | gr-sounder/src/fpga/lib/lfsr_constants.v | 66 | ||||
-rw-r--r-- | gr-sounder/src/fpga/lib/sounder.v | 34 | ||||
-rw-r--r-- | gr-sounder/src/fpga/lib/sounder_ctrl.v | 97 | ||||
-rw-r--r-- | gr-sounder/src/fpga/lib/sounder_rx.v | 74 | ||||
-rw-r--r-- | gr-sounder/src/fpga/lib/sounder_tx.v | 11 | ||||
-rw-r--r-- | gr-sounder/src/fpga/lib/strobe.v | 48 |
9 files changed, 193 insertions, 146 deletions
diff --git a/gr-sounder/src/fpga/lib/Makefile.am b/gr-sounder/src/fpga/lib/Makefile.am index 0a03147a2..1c8f39ba1 100644 --- a/gr-sounder/src/fpga/lib/Makefile.am +++ b/gr-sounder/src/fpga/lib/Makefile.am @@ -25,6 +25,7 @@ EXTRA_DIST = \ dac_interface.v \ dacpll.v \ sounder.v \ + sounder_ctrl.v \ sounder_rx.v \ sounder_tx.v diff --git a/gr-sounder/src/fpga/lib/dac_interface.v b/gr-sounder/src/fpga/lib/dac_interface.v index 9042e1c53..93c72cca6 100644 --- a/gr-sounder/src/fpga/lib/dac_interface.v +++ b/gr-sounder/src/fpga/lib/dac_interface.v @@ -43,11 +43,11 @@ module dac_interface(clk_i,rst_i,ena_i,strobe_i,tx_i_i,tx_q_i,tx_data_o,tx_sync_ // Register the clk64 clock in the clk128 domain always @(posedge clk128) - clk64_d <= clk_i; + clk64_d <= #1 clk_i; // Register the tx data in the clk128 domain always @(posedge clk128) - tx_data_o <= clk64_d ? tx_i_i : tx_q_i; + tx_data_o <= #1 clk64_d ? tx_i_i : tx_q_i; assign tx_sync_o = clk64_d; diff --git a/gr-sounder/src/fpga/lib/lfsr.v b/gr-sounder/src/fpga/lib/lfsr.v index 6ae967ba9..bd0743e9c 100644 --- a/gr-sounder/src/fpga/lib/lfsr.v +++ b/gr-sounder/src/fpga/lib/lfsr.v @@ -36,10 +36,10 @@ module lfsr(clk_i,rst_i,ena_i,strobe_i,mask_i,pn_o); always @(posedge clk_i) if (rst_i | ~ena_i) - shifter <= 1; + shifter <= #5 1; else if (strobe_i) - shifter <= {shifter[width-2:0],parity}; + shifter <= #5 {shifter[width-2:0],parity}; assign pn_o = shifter[0]; diff --git a/gr-sounder/src/fpga/lib/lfsr_constants.v b/gr-sounder/src/fpga/lib/lfsr_constants.v index 55ee613d2..e23ed6601 100755..100644 --- a/gr-sounder/src/fpga/lib/lfsr_constants.v +++ b/gr-sounder/src/fpga/lib/lfsr_constants.v @@ -19,33 +19,45 @@ // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA // -module lfsr_constants(degree_i,mask_o,len_o); - input wire [4:0] degree_i; - output reg [15:0] mask_o; - output wire [15:0] len_o; - - assign len_o = (1 << degree_i) - 1; +module lfsr_constants(clk_i,rst_i,degree_i,mask_o,len_o); + input clk_i; + input rst_i; + input [4:0] degree_i; + output reg [15:0] mask_o; + output reg [16:0] len_o; + + integer len; - always @* - case (degree_i) - 5'd00: mask_o = 16'h0000; - 5'd01: mask_o = 16'h0001; - 5'd02: mask_o = 16'h0003; - 5'd03: mask_o = 16'h0005; - 5'd04: mask_o = 16'h0009; - 5'd05: mask_o = 16'h0012; - 5'd06: mask_o = 16'h0021; - 5'd07: mask_o = 16'h0041; - 5'd08: mask_o = 16'h008E; - 5'd09: mask_o = 16'h0108; - 5'd10: mask_o = 16'h0204; - 5'd11: mask_o = 16'h0402; - 5'd12: mask_o = 16'h0829; - 5'd13: mask_o = 16'h100D; - 5'd14: mask_o = 16'h2015; - 5'd15: mask_o = 16'h4001; - 5'd16: mask_o = 16'h8016; - default: mask_o = 16'h0000; - endcase // case(degree_i) + always @(posedge clk_i) + if (rst_i) + begin + len_o <= #5 17'b0; + mask_o <= #5 16'b0; + end + else + begin + len_o <= #5 ((1 << degree_i) << 1)-3; + + case (degree_i) + 5'd00: mask_o <= #5 16'h0000; + 5'd01: mask_o <= #5 16'h0001; + 5'd02: mask_o <= #5 16'h0003; + 5'd03: mask_o <= #5 16'h0005; + 5'd04: mask_o <= #5 16'h0009; + 5'd05: mask_o <= #5 16'h0012; + 5'd06: mask_o <= #5 16'h0021; + 5'd07: mask_o <= #5 16'h0041; + 5'd08: mask_o <= #5 16'h008E; + 5'd09: mask_o <= #5 16'h0108; + 5'd10: mask_o <= #5 16'h0204; + 5'd11: mask_o <= #5 16'h0402; + 5'd12: mask_o <= #5 16'h0829; + 5'd13: mask_o <= #5 16'h100D; + 5'd14: mask_o <= #5 16'h2015; + 5'd15: mask_o <= #5 16'h4001; + 5'd16: mask_o <= #5 16'h8016; + default: mask_o <= #5 16'h0000; + endcase // case(degree_i) + end // else: !if(rst_i) endmodule // lfsr_constants diff --git a/gr-sounder/src/fpga/lib/sounder.v b/gr-sounder/src/fpga/lib/sounder.v index 58b563448..675be8881 100644 --- a/gr-sounder/src/fpga/lib/sounder.v +++ b/gr-sounder/src/fpga/lib/sounder.v @@ -23,8 +23,8 @@ `include "../../../../usrp/firmware/include/fpga_regs_standard.v" module sounder(clk_i, saddr_i, sdata_i, s_strobe_i, - tx_strobe_i, tx_dac_i_o,tx_dac_q_o, - rx_strobe_i, rx_adc_i_i,rx_adc_q_i, + tx_strobe_o, tx_dac_i_o, tx_dac_q_o, + rx_adc_i_i,rx_adc_q_i, rx_strobe_o, rx_imp_i_o,rx_imp_q_o); // System interface @@ -34,12 +34,11 @@ module sounder(clk_i, saddr_i, sdata_i, s_strobe_i, input s_strobe_i; // Configuration bus write // Transmit subsystem - input tx_strobe_i; // Generate an transmitter output sample + output tx_strobe_o; // Generate an transmitter output sample output [13:0] tx_dac_i_o; // I channel transmitter output to DAC output [13:0] tx_dac_q_o; // Q channel transmitter output to DAC // Receive subsystem - input rx_strobe_i; // Indicates receive sample ready from ADC output rx_strobe_o; // Indicates output samples ready for Rx FIFO input [15:0] rx_adc_i_i; // I channel input from ADC interface module input [15:0] rx_adc_q_i; // Q channel input from ADC interface module @@ -53,18 +52,17 @@ module sounder(clk_i, saddr_i, sdata_i, s_strobe_i, wire loopback; wire [4:0] degree; + wire [13:0] ampl; wire [15:0] mask; - wire [15:0] len; - - setting_reg #(`FR_USER_0) sr_mode - ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i), - .out({loopback,receive,transmit,reset}) ); - - setting_reg #(`FR_USER_1) sr_lfsr_degree - ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),.out(degree) ); - - lfsr_constants constants(.degree_i(degree),.mask_o(mask),.len_o(len)); + wire ref_strobe; + wire sum_strobe; + sounder_ctrl master(.clk_i(clk_i),.rst_i(reset),.saddr_i(saddr_i), + .sdata_i(sdata_i),.s_strobe_i(s_strobe_i), + .reset_o(reset),.transmit_o(transmit),.receive_o(receive),.loopback_o(loopback), + .degree_o(degree),.ampl_o(ampl),.mask_o(mask),.tx_strobe_o(tx_strobe_o), + .rx_strobe_o(rx_strobe_o),.sum_strobe_o(sum_strobe),.ref_strobe_o(ref_strobe)); + // Loopback implementation wire [13:0] tx_i, tx_q; wire [15:0] tx_i_ext, tx_q_ext; @@ -80,13 +78,13 @@ module sounder(clk_i, saddr_i, sdata_i, s_strobe_i, sounder_tx transmitter ( .clk_i(clk_i),.rst_i(reset),.ena_i(transmit), - .strobe_i(tx_strobe_i),.mask_i(mask), + .strobe_i(tx_strobe_o),.mask_i(mask),.ampl_i(ampl), .tx_i_o(tx_i),.tx_q_o(tx_q) ); sounder_rx receiver ( .clk_i(clk_i),.rst_i(reset),.ena_i(receive), - .rx_strobe_i(rx_strobe_i),.tx_strobe_i(tx_strobe_i),.mask_i(mask),.degree_i(degree),.len_i(len), - .rx_in_i_i(rx_i),.rx_in_q_i(rx_q),.rx_i_o(rx_imp_i_o),.rx_q_o(rx_imp_q_o), - .rx_strobe_o(rx_strobe_o),.loop_i(loopback)); + .sum_strobe_i(sum_strobe),.ref_strobe_i(ref_strobe), + .mask_i(mask),.degree_i(degree), + .rx_in_i_i(rx_i),.rx_in_q_i(rx_q),.rx_i_o(rx_imp_i_o),.rx_q_o(rx_imp_q_o)); endmodule // sounder diff --git a/gr-sounder/src/fpga/lib/sounder_ctrl.v b/gr-sounder/src/fpga/lib/sounder_ctrl.v new file mode 100644 index 000000000..6e967a5ba --- /dev/null +++ b/gr-sounder/src/fpga/lib/sounder_ctrl.v @@ -0,0 +1,97 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2007 Corgan Enterprises LLC +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA +// + +`include "../../../../usrp/firmware/include/fpga_regs_common.v" +`include "../../../../usrp/firmware/include/fpga_regs_standard.v" + +module sounder_ctrl(clk_i,rst_i,saddr_i,sdata_i,s_strobe_i, + reset_o,transmit_o,receive_o,loopback_o, + degree_o,ampl_o,mask_o, + tx_strobe_o,rx_strobe_o,sum_strobe_o,ref_strobe_o); + + input clk_i; // Master clock @ 64 MHz + input rst_i; // Master synchronous reset + input [6:0] saddr_i; // Configuration bus address + input [31:0] sdata_i; // Configuration bus data + input s_strobe_i; // Configuration bus write + output reset_o; + output transmit_o; + output receive_o; + output loopback_o; + output [4:0] degree_o; + output [13:0] ampl_o; + output [15:0] mask_o; + output tx_strobe_o; + output rx_strobe_o; + output sum_strobe_o; + output ref_strobe_o; + + setting_reg #(`FR_USER_0) sr_mode + ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i), + .out({loopback_o,receive_o,transmit_o,reset_o}) ); + + setting_reg #(`FR_USER_1) sr_lfsr_degree + ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i), + .out(degree_o) ); + + setting_reg #(`FR_USER_2) sr_lfsr_ampl + ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i), + .out(ampl_o) ); + + wire [16:0] len; + lfsr_constants constants + (.clk_i(clk_i),.rst_i(rst_i),.degree_i(degree_o),.mask_o(mask_o), + .len_o(len) ); + + reg [15:0] phase; + assign tx_strobe_o = ~phase[0]; + assign ref_strobe_o = tx_strobe_o & !(phase>>1 == len>>1); + assign sum_strobe_o = (phase == len); + + reg rx_strobe_o; + always @(posedge clk_i) + if (rst_i) + begin + phase <= #5 16'hFFFF; + rx_strobe_o <= #5 0; + end + else + if (sum_strobe_o) + begin + phase <= #5 0; + rx_strobe_o <= #5 1'b1; + end + else + begin + phase <= #5 phase + 16'b1; + rx_strobe_o <= #5 0; + end + + + + + + + + + + +endmodule // sounder_ctrl diff --git a/gr-sounder/src/fpga/lib/sounder_rx.v b/gr-sounder/src/fpga/lib/sounder_rx.v index 338afd55e..18038a3a1 100644 --- a/gr-sounder/src/fpga/lib/sounder_rx.v +++ b/gr-sounder/src/fpga/lib/sounder_rx.v @@ -19,75 +19,63 @@ // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA // -module sounder_rx(clk_i,rst_i,ena_i,rx_strobe_i,tx_strobe_i,mask_i,degree_i,len_i, - rx_in_i_i,rx_in_q_i,rx_i_o,rx_q_o,rx_strobe_o, - loop_i); +module sounder_rx(clk_i,rst_i,ena_i,sum_strobe_i,ref_strobe_i, + mask_i,degree_i,rx_in_i_i,rx_in_q_i,rx_i_o,rx_q_o); input clk_i; // Master clock input rst_i; // Subsystem reset input ena_i; // Subsystem enable - input rx_strobe_i; // Strobe every received sample - input tx_strobe_i; // Strobe every transmitted sample + input sum_strobe_i; // Strobe on last sample per period + input ref_strobe_i; // PN code reference retarded one sample per period input [15:0] mask_i; // PN code LFSR mask input [4:0] degree_i; // PN code LFSR sequency degree - input [15:0] len_i; // PN code LFSR sequence length + input [15:0] rx_in_i_i; // I channel on receive input [15:0] rx_in_q_i; // Q channel on receive output [15:0] rx_i_o; // I channel of impulse response output [15:0] rx_q_o; // Q channel of impulse response - output rx_strobe_o; // Impulse response value ready - - input loop_i; // Implement loopback - - wire strobe_in = loop_i ? tx_strobe_i : rx_strobe_i; - wire [16:0] len = loop_i ? (len_i - 1) : ((len_i << 1) - 2); - - strobe #(17) phase_strobe(.clk_i(clk_i),.rst_i(rst_i),.ena_i(ena_i), - .rate_i(len),.strobe_i(strobe_in),.strobe_o(rx_strobe_o), - .count_o()); - - wire pn_ref; - wire ref_strobe = tx_strobe_i & ~rx_strobe_o; // Retard reference phase once per period - lfsr ref_code - ( .clk_i(clk_i),.rst_i(rst_i),.ena_i(ena_i),.strobe_i(ref_strobe),.mask_i(mask_i),.pn_o(pn_ref) ); - wire [5:0] offset = (5'd16-degree_i); - reg [31:0] sum_i, sum_q; reg [31:0] total_i, total_q; - wire [31:0] scaled_i = total_i << offset; - wire [31:0] scaled_q = total_q << offset; wire [31:0] i_ext, q_ext; sign_extend #(16,32) i_extender(rx_in_i_i, i_ext); sign_extend #(16,32) q_extender(rx_in_q_i, q_ext); + wire pn_ref; + lfsr ref_code + ( .clk_i(clk_i),.rst_i(rst_i),.ena_i(ena_i),.strobe_i(ref_strobe_i),.mask_i(mask_i),.pn_o(pn_ref) ); + wire [31:0] prod_i = pn_ref ? i_ext : -i_ext; wire [31:0] prod_q = pn_ref ? q_ext : -q_ext; - + always @(posedge clk_i) if (rst_i | ~ena_i) begin - sum_i <= 0; - sum_q <= 0; - total_i <= 0; - total_q <= 0; + sum_i <= #5 0; + sum_q <= #5 0; + total_i <= #5 0; + total_q <= #5 0; end - else if (rx_strobe_o) - begin - total_i <= sum_i + prod_i; - total_q <= sum_q + prod_q; - sum_i <= 0; - sum_q <= 0; - end - else if (strobe_in) - begin - sum_i = sum_i + prod_i; - sum_q = sum_q + prod_q; - end - + else + if (sum_strobe_i) + begin + total_i <= #5 sum_i; + total_q <= #5 sum_q; + sum_i <= #5 prod_i; + sum_q <= #5 prod_q; + end + else + begin + sum_i <= #5 sum_i + prod_i; + sum_q <= #5 sum_q + prod_q; + end + + wire [5:0] offset = (5'd16-degree_i); + wire [31:0] scaled_i = total_i << offset; + wire [31:0] scaled_q = total_q << offset; assign rx_i_o = scaled_i[31:16]; assign rx_q_o = scaled_q[31:16]; diff --git a/gr-sounder/src/fpga/lib/sounder_tx.v b/gr-sounder/src/fpga/lib/sounder_tx.v index 46165dde5..148b1e500 100644 --- a/gr-sounder/src/fpga/lib/sounder_tx.v +++ b/gr-sounder/src/fpga/lib/sounder_tx.v @@ -22,24 +22,23 @@ `include "../../../../usrp/firmware/include/fpga_regs_common.v" `include "../../../../usrp/firmware/include/fpga_regs_standard.v" -`define MAX_VALUE 14'h1FFF // 2s complement -`define MIN_VALUE 14'h2001 - -module sounder_tx(clk_i,rst_i,ena_i,strobe_i,mask_i,tx_i_o,tx_q_o); +module sounder_tx(clk_i,rst_i,ena_i,strobe_i,ampl_i,mask_i,tx_i_o,tx_q_o); input clk_i; input rst_i; input ena_i; input strobe_i; + input [13:0] ampl_i; input [15:0] mask_i; output [13:0] tx_i_o; output [13:0] tx_q_o; wire pn; - + wire [13:0] min_value = (~ampl_i)+14'b1; + lfsr pn_code ( .clk_i(clk_i),.rst_i(rst_i),.ena_i(ena_i),.strobe_i(strobe_i),.mask_i(mask_i),.pn_o(pn) ); - assign tx_i_o = ena_i ? (pn ? `MAX_VALUE : `MIN_VALUE) : 14'b0; // Bipolar + assign tx_i_o = ena_i ? (pn ? ampl_i : min_value) : 14'b0; // Bipolar assign tx_q_o = 14'b0; endmodule // sounder_tx diff --git a/gr-sounder/src/fpga/lib/strobe.v b/gr-sounder/src/fpga/lib/strobe.v deleted file mode 100644 index ed07f21f4..000000000 --- a/gr-sounder/src/fpga/lib/strobe.v +++ /dev/null @@ -1,48 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2007 Corgan Enterprises LLC -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -module strobe(clk_i,rst_i,ena_i,rate_i,strobe_i,strobe_o,count_o); - parameter width = 16; - - input clk_i; - input rst_i; - input ena_i; - input [width-1:0] rate_i; // Desired period minus one - input strobe_i; - output strobe_o; - output [width-1:0] count_o; - - - reg [width-1:0] counter; - - always @(posedge clk_i) - if(rst_i | ~ena_i) - counter <= 32'hFFFFFFFF; // First period is short by one - else if(strobe_i) - if(counter == rate_i) - counter <= 0; - else - counter <= counter + 1; - - assign strobe_o = (counter == rate_i) & strobe_i; - assign count_o = counter; - -endmodule // strobe |