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authorjcorgan2007-05-21 05:58:05 +0000
committerjcorgan2007-05-21 05:58:05 +0000
commit2711e51f33e4c83b07d8293ceca5d6db7830656e (patch)
tree21be31385aa79dc8d6f3075acd093f8ca9775f3d /gr-sounder/src/fpga/lib/dac_interface.v
parent9b7e0f924e4294bff46fa55b9a993b4d529f499a (diff)
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Merged r5463:5504 from jcorgan/snd into trunk. Work in progress, adds digital loopback and receive to FPGA code. Host receive code is still debugging only.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@5505 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'gr-sounder/src/fpga/lib/dac_interface.v')
-rw-r--r--gr-sounder/src/fpga/lib/dac_interface.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/gr-sounder/src/fpga/lib/dac_interface.v b/gr-sounder/src/fpga/lib/dac_interface.v
index b97ffa77f..9042e1c53 100644
--- a/gr-sounder/src/fpga/lib/dac_interface.v
+++ b/gr-sounder/src/fpga/lib/dac_interface.v
@@ -27,16 +27,16 @@ module dac_interface(clk_i,rst_i,ena_i,strobe_i,tx_i_i,tx_q_i,tx_data_o,tx_sync_
input ena_i;
input strobe_i;
- input [15:0] tx_i_i;
- input [15:0] tx_q_i;
+ input [13:0] tx_i_i;
+ input [13:0] tx_q_i;
- output [15:0] tx_data_o;
+ output [13:0] tx_data_o;
output tx_sync_o;
`ifdef TX_RATE_MAX
wire clk128;
reg clk64_d;
- reg [15:0] tx_data_o;
+ reg [13:0] tx_data_o;
// Create a 128 MHz clock
dacpll pll128(.areset(rst_i),.inclk0(clk_i),.c0(clk128));