Merged r7611:7614 from jcorgan/gpio into trunk. Adds custom

FPGA build for streaming digital I/O to/from GPIO pins through LSB of I and Q
datastreams, with example programs of use.

git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@7618 221aa14e-8319-0410-a670-987f0aec2ac5

1 files changed, 444 insertions, 0 deletions

diff --git a/gr-gpio/src/fpga/top/usrp_gpio.csf b/gr-gpio/src/fpga/top/usrp_gpio.csf
new file mode 100644
index 000000000..8a6a0b466
--- /dev/null
+++ b/gr-gpio/src/fpga/top/usrp_gpio.csf
@@ -0,0 +1,444 @@
+COMPILER_SETTINGS
+{
+	IO_PLACEMENT_OPTIMIZATION = OFF;
+	ENABLE_DRC_SETTINGS = OFF;
+	PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF;
+	PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF;
+	PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF;
+	DRC_FANOUT_EXCEEDING = 30;
+	DRC_REPORT_FANOUT_EXCEEDING = OFF;
+	DRC_TOP_FANOUT = 50;
+	DRC_REPORT_TOP_FANOUT = OFF;
+	RUN_DRC_DURING_COMPILATION = OFF;
+	ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON;
+	ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF;
+	ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF;
+	ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF;
+	SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF;
+	MERGE_HEX_FILE = OFF;
+	TRUE_WYSIWYG_FLOW = OFF;
+	SEED = 1;
+	FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY;
+	FAMILY = Cyclone;
+	DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
+	DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1";
+	DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1";
+	DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
+	DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1";
+	DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1";
+	DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
+	DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1";
+	DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1";
+	DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
+	DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
+	DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3";
+	DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3";
+	DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB";
+	DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB";
+	DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB";
+	DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3";
+	DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
+	DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
+	DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4";
+	DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3";
+	DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS";
+	DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS";
+	DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS";
+	STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2";
+	PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2";
+	PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2";
+	STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1";
+	FAST_FIT_COMPILATION = OFF;
+	SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF;
+	OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = ON;
+	OPTIMIZE_TIMING = "NORMAL COMPILATION";
+	OPTIMIZE_HOLD_TIMING = OFF;
+	COMPILATION_LEVEL = FULL;
+	SAVE_DISK_SPACE = OFF;
+	SPEED_DISK_USAGE_TRADEOFF = NORMAL;
+	LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF;
+	SIGNALPROBE_ALLOW_OVERUSE = OFF;
+	FOCUS_ENTITY_NAME = |usrp_gpio;
+	ROUTING_BACK_ANNOTATION_MODE = OFF;
+	INC_PLC_MODE = OFF;
+	FIT_ONLY_ONE_ATTEMPT = OFF;
+}
+DEFAULT_DEVICE_OPTIONS
+{
+	GENERATE_CONFIG_HEXOUT_FILE = OFF;
+	GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON;
+	GENERATE_CONFIG_JBC_FILE = OFF;
+	GENERATE_CONFIG_JAM_FILE = OFF;
+	GENERATE_CONFIG_ISC_FILE = OFF;
+	GENERATE_CONFIG_SVF_FILE = OFF;
+	GENERATE_JBC_FILE_COMPRESSED = ON;
+	GENERATE_JBC_FILE = OFF;
+	GENERATE_JAM_FILE = OFF;
+	GENERATE_ISC_FILE = OFF;
+	GENERATE_SVF_FILE = OFF;
+	RESERVE_PIN = "AS INPUT TRI-STATED";
+	RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND";
+	HEXOUT_FILE_COUNT_DIRECTION = UP;
+	HEXOUT_FILE_START_ADDRESS = 0;
+	GENERATE_HEX_FILE = OFF;
+	GENERATE_RBF_FILE = OFF;
+	GENERATE_TTF_FILE = OFF;
+	RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED";
+	RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF;
+	AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON;
+	EPROM_USE_CHECKSUM_AS_USERCODE = OFF;
+	FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	STRATIX_CONFIGURATION_DEVICE = AUTO;
+	CYCLONE_CONFIGURATION_DEVICE = AUTO;
+	FLEX10K_CONFIGURATION_DEVICE = AUTO;
+	FLEX6K_CONFIGURATION_DEVICE = AUTO;
+	MERCURY_CONFIGURATION_DEVICE = AUTO;
+	EXCALIBUR_CONFIGURATION_DEVICE = AUTO;
+	APEX20K_CONFIGURATION_DEVICE = AUTO;
+	USE_CONFIGURATION_DEVICE = ON;
+	ENABLE_INIT_DONE_OUTPUT = OFF;
+	FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
+	ENABLE_DEVICE_WIDE_OE = OFF;
+	ENABLE_DEVICE_WIDE_RESET = OFF;
+	RELEASE_CLEARS_BEFORE_TRI_STATES = OFF;
+	AUTO_RESTART_CONFIGURATION = OFF;
+	ENABLE_VREFB_PIN = OFF;
+	ENABLE_VREFA_PIN = OFF;
+	SECURITY_BIT = OFF;
+	USER_START_UP_CLOCK = OFF;
+	APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	CYCLONE_CONFIGURATION_SCHEME = "ACTIVE SERIAL";
+	STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	STRATIX_UPDATE_MODE = STANDARD;
+	USE_CHECKSUM_AS_USERCODE = OFF;
+	MAX7000_USE_CHECKSUM_AS_USERCODE = OFF;
+	MAX7000_JTAG_USER_CODE = FFFFFFFF;
+	FLEX10K_JTAG_USER_CODE = 7F;
+	MERCURY_JTAG_USER_CODE = FFFFFFFF;
+	APEX20K_JTAG_USER_CODE = FFFFFFFF;
+	STRATIX_JTAG_USER_CODE = FFFFFFFF;
+	MAX7000S_JTAG_USER_CODE = FFFF;
+	RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
+	FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF;
+	ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
+	MAX7000_ENABLE_JTAG_BST_SUPPORT = ON;
+	ENABLE_JTAG_BST_SUPPORT = OFF;
+	CONFIGURATION_CLOCK_DIVISOR = 1;
+	CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ";
+	CLOCK_SOURCE = INTERNAL;
+	COMPRESSION_MODE = OFF;
+	ON_CHIP_BITSTREAM_DECOMPRESSION = OFF;
+}
+AUTO_SLD_HUB_ENTITY
+{
+	AUTO_INSERT_SLD_HUB_ENTITY = ENABLE;
+	HUB_INSTANCE_NAME = SLD_HUB_INST;
+	HUB_ENTITY_NAME = SLD_HUB;
+}
+SIGNALTAP_LOGIC_ANALYZER_SETTINGS
+{
+	ENABLE_SIGNALTAP = Off;
+	AUTO_ENABLE_SMART_COMPILE = On;
+}
+CHIP(usrp_gpio)
+{
+	DEVICE = EP1C12Q240C8;
+	DEVICE_FILTER_PACKAGE = "ANY QFP";
+	DEVICE_FILTER_PIN_COUNT = 240;
+	DEVICE_FILTER_SPEED_GRADE = ANY;
+	AUTO_RESTART_CONFIGURATION = OFF;
+	RELEASE_CLEARS_BEFORE_TRI_STATES = OFF;
+	USER_START_UP_CLOCK = OFF;
+	ENABLE_DEVICE_WIDE_RESET = OFF;
+	ENABLE_DEVICE_WIDE_OE = OFF;
+	ENABLE_INIT_DONE_OUTPUT = OFF;
+	FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
+	ENABLE_JTAG_BST_SUPPORT = OFF;
+	MAX7000_ENABLE_JTAG_BST_SUPPORT = ON;
+	APEX20K_JTAG_USER_CODE = FFFFFFFF;
+	MERCURY_JTAG_USER_CODE = FFFFFFFF;
+	FLEX10K_JTAG_USER_CODE = 7F;
+	MAX7000_JTAG_USER_CODE = FFFFFFFF;
+	MAX7000S_JTAG_USER_CODE = FFFF;
+	STRATIX_JTAG_USER_CODE = FFFFFFFF;
+	APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	CYCLONE_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
+	USE_CONFIGURATION_DEVICE = OFF;
+	APEX20K_CONFIGURATION_DEVICE = AUTO;
+	MERCURY_CONFIGURATION_DEVICE = AUTO;
+	FLEX6K_CONFIGURATION_DEVICE = AUTO;
+	FLEX10K_CONFIGURATION_DEVICE = AUTO;
+	EXCALIBUR_CONFIGURATION_DEVICE = AUTO;
+	STRATIX_CONFIGURATION_DEVICE = AUTO;
+	CYCLONE_CONFIGURATION_DEVICE = AUTO;
+	STRATIX_UPDATE_MODE = STANDARD;
+	APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
+	AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON;
+	DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF;
+	COMPRESSION_MODE = OFF;
+	ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
+	FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF;
+	FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
+	EPROM_USE_CHECKSUM_AS_USERCODE = OFF;
+	USE_CHECKSUM_AS_USERCODE = OFF;
+	MAX7000_USE_CHECKSUM_AS_USERCODE = OFF;
+	GENERATE_TTF_FILE = OFF;
+	GENERATE_RBF_FILE = ON;
+	GENERATE_HEX_FILE = OFF;
+	SECURITY_BIT = OFF;
+	ENABLE_VREFA_PIN = OFF;
+	ENABLE_VREFB_PIN = OFF;
+	GENERATE_SVF_FILE = OFF;
+	GENERATE_ISC_FILE = OFF;
+	GENERATE_JAM_FILE = OFF;
+	GENERATE_JBC_FILE = OFF;
+	GENERATE_JBC_FILE_COMPRESSED = ON;
+	GENERATE_CONFIG_SVF_FILE = OFF;
+	GENERATE_CONFIG_ISC_FILE = OFF;
+	GENERATE_CONFIG_JAM_FILE = OFF;
+	GENERATE_CONFIG_JBC_FILE = OFF;
+	GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON;
+	GENERATE_CONFIG_HEXOUT_FILE = OFF;
+	ON_CHIP_BITSTREAM_DECOMPRESSION = OFF;
+	BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE = OFF;
+	HEXOUT_FILE_START_ADDRESS = 0;
+	HEXOUT_FILE_COUNT_DIRECTION = UP;
+	RESERVE_ALL_UNUSED_PINS = "AS INPUT TRI-STATED";
+	STRATIX_DEVICE_IO_STANDARD = LVTTL;
+	CLOCK_SOURCE = INTERNAL;
+	CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ";
+	CONFIGURATION_CLOCK_DIVISOR = 1;
+	RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED";
+	RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
+	SCLK : LOCATION = Pin_101;
+	SDI : LOCATION = Pin_100;
+	SEN : LOCATION = Pin_98;
+	SLD : LOCATION = Pin_95;
+	adc1_data[0] : LOCATION = Pin_5;
+	adc1_data[10] : LOCATION = Pin_235;
+	adc1_data[11] : LOCATION = Pin_234;
+	adc1_data[1] : LOCATION = Pin_4;
+	adc1_data[2] : LOCATION = Pin_3;
+	adc1_data[3] : LOCATION = Pin_2;
+	adc1_data[4] : LOCATION = Pin_1;
+	adc1_data[4] : IO_STANDARD = LVTTL;
+	adc1_data[5] : LOCATION = Pin_240;
+	adc1_data[6] : LOCATION = Pin_239;
+	adc1_data[7] : LOCATION = Pin_238;
+	adc1_data[8] : LOCATION = Pin_237;
+	adc1_data[9] : LOCATION = Pin_236;
+	adc2_data[0] : LOCATION = Pin_20;
+	adc2_data[10] : LOCATION = Pin_8;
+	adc2_data[11] : LOCATION = Pin_7;
+	adc2_data[1] : LOCATION = Pin_19;
+	adc2_data[2] : LOCATION = Pin_18;
+	adc2_data[3] : LOCATION = Pin_17;
+	adc2_data[4] : LOCATION = Pin_16;
+	adc2_data[5] : LOCATION = Pin_15;
+	adc2_data[6] : LOCATION = Pin_14;
+	adc2_data[7] : LOCATION = Pin_13;
+	adc2_data[8] : LOCATION = Pin_12;
+	adc2_data[9] : LOCATION = Pin_11;
+	adc3_data[0] : LOCATION = Pin_200;
+	adc3_data[10] : LOCATION = Pin_184;
+	adc3_data[11] : LOCATION = Pin_183;
+	adc3_data[1] : LOCATION = Pin_197;
+	adc3_data[2] : LOCATION = Pin_196;
+	adc3_data[3] : LOCATION = Pin_195;
+	adc3_data[4] : LOCATION = Pin_194;
+	adc3_data[5] : LOCATION = Pin_193;
+	adc3_data[6] : LOCATION = Pin_188;
+	adc3_data[7] : LOCATION = Pin_187;
+	adc3_data[8] : LOCATION = Pin_186;
+	adc3_data[9] : LOCATION = Pin_185;
+	adc4_data[0] : LOCATION = Pin_222;
+	adc4_data[10] : LOCATION = Pin_203;
+	adc4_data[11] : LOCATION = Pin_202;
+	adc4_data[1] : LOCATION = Pin_219;
+	adc4_data[2] : LOCATION = Pin_217;
+	adc4_data[3] : LOCATION = Pin_216;
+	adc4_data[4] : LOCATION = Pin_215;
+	adc4_data[5] : LOCATION = Pin_214;
+	adc4_data[6] : LOCATION = Pin_213;
+	adc4_data[7] : LOCATION = Pin_208;
+	adc4_data[8] : LOCATION = Pin_207;
+	adc4_data[9] : LOCATION = Pin_206;
+	adc_oeb[0] : LOCATION = Pin_228;
+	adc_oeb[1] : LOCATION = Pin_21;
+	adc_oeb[2] : LOCATION = Pin_181;
+	adc_oeb[3] : LOCATION = Pin_218;
+	adc_otr[0] : LOCATION = Pin_233;
+	adc_otr[1] : LOCATION = Pin_6;
+	adc_otr[2] : LOCATION = Pin_182;
+	adc_otr[3] : LOCATION = Pin_201;
+	adclk0 : LOCATION = Pin_224;
+	adclk1 : LOCATION = Pin_226;
+	clk0 : LOCATION = Pin_28;
+	clk0 : RESERVE_PIN = "AS INPUT TRI-STATED";
+	clk0 : IO_STANDARD = LVTTL;
+	clk1 : LOCATION = Pin_29;
+	clk1 : RESERVE_PIN = "AS INPUT TRI-STATED";
+	clk1 : IO_STANDARD = LVTTL;
+	clk3 : LOCATION = Pin_152;
+	clk3 : RESERVE_PIN = "AS INPUT TRI-STATED";
+	clk3 : IO_STANDARD = LVTTL;
+	clk_120mhz : LOCATION = Pin_153;
+	clk_120mhz : IO_STANDARD = LVTTL;
+	clk_out : LOCATION = Pin_63;
+	clk_out : IO_STANDARD = LVTTL;
+	dac1_data[0] : LOCATION = Pin_165;
+	dac1_data[10] : LOCATION = Pin_177;
+	dac1_data[11] : LOCATION = Pin_178;
+	dac1_data[12] : LOCATION = Pin_179;
+	dac1_data[13] : LOCATION = Pin_180;
+	dac1_data[1] : LOCATION = Pin_166;
+	dac1_data[2] : LOCATION = Pin_167;
+	dac1_data[3] : LOCATION = Pin_168;
+	dac1_data[4] : LOCATION = Pin_169;
+	dac1_data[5] : LOCATION = Pin_170;
+	dac1_data[6] : LOCATION = Pin_173;
+	dac1_data[7] : LOCATION = Pin_174;
+	dac1_data[8] : LOCATION = Pin_175;
+	dac1_data[9] : LOCATION = Pin_176;
+	dac2_data[0] : LOCATION = Pin_159;
+	dac2_data[10] : LOCATION = Pin_163;
+	dac2_data[11] : LOCATION = Pin_139;
+	dac2_data[12] : LOCATION = Pin_164;
+	dac2_data[13] : LOCATION = Pin_138;
+	dac2_data[1] : LOCATION = Pin_158;
+	dac2_data[2] : LOCATION = Pin_160;
+	dac2_data[3] : LOCATION = Pin_156;
+	dac2_data[4] : LOCATION = Pin_161;
+	dac2_data[5] : LOCATION = Pin_144;
+	dac2_data[6] : LOCATION = Pin_162;
+	dac2_data[7] : LOCATION = Pin_141;
+	dac2_data[8] : LOCATION = Pin_143;
+	dac2_data[9] : LOCATION = Pin_140;
+	dac3_data[0] : LOCATION = Pin_122;
+	dac3_data[10] : LOCATION = Pin_134;
+	dac3_data[11] : LOCATION = Pin_135;
+	dac3_data[12] : LOCATION = Pin_136;
+	dac3_data[13] : LOCATION = Pin_137;
+	dac3_data[1] : LOCATION = Pin_123;
+	dac3_data[2] : LOCATION = Pin_124;
+	dac3_data[3] : LOCATION = Pin_125;
+	dac3_data[4] : LOCATION = Pin_126;
+	dac3_data[5] : LOCATION = Pin_127;
+	dac3_data[6] : LOCATION = Pin_128;
+	dac3_data[7] : LOCATION = Pin_131;
+	dac3_data[8] : LOCATION = Pin_132;
+	dac3_data[9] : LOCATION = Pin_133;
+	dac4_data[0] : LOCATION = Pin_104;
+	dac4_data[10] : LOCATION = Pin_118;
+	dac4_data[11] : LOCATION = Pin_119;
+	dac4_data[12] : LOCATION = Pin_120;
+	dac4_data[13] : LOCATION = Pin_121;
+	dac4_data[1] : LOCATION = Pin_105;
+	dac4_data[2] : LOCATION = Pin_106;
+	dac4_data[3] : LOCATION = Pin_107;
+	dac4_data[4] : LOCATION = Pin_108;
+	dac4_data[5] : LOCATION = Pin_113;
+	dac4_data[6] : LOCATION = Pin_114;
+	dac4_data[7] : LOCATION = Pin_115;
+	dac4_data[8] : LOCATION = Pin_116;
+	dac4_data[9] : LOCATION = Pin_117;
+	enable_rx : LOCATION = Pin_88;
+	enable_tx : LOCATION = Pin_93;
+	gndbus[0] : LOCATION = Pin_223;
+	gndbus[0] : RESERVE_PIN = "AS INPUT TRI-STATED";
+	gndbus[0] : IO_STANDARD = LVTTL;
+	gndbus[1] : LOCATION = Pin_225;
+	gndbus[1] : RESERVE_PIN = "AS INPUT TRI-STATED";
+	gndbus[1] : IO_STANDARD = LVTTL;
+	gndbus[2] : LOCATION = Pin_227;
+	gndbus[2] : RESERVE_PIN = "AS INPUT TRI-STATED";
+	gndbus[2] : IO_STANDARD = LVTTL;
+	gndbus[3] : LOCATION = Pin_62;
+	gndbus[3] : RESERVE_PIN = "AS INPUT TRI-STATED";
+	gndbus[3] : IO_STANDARD = LVTTL;
+	gndbus[4] : LOCATION = Pin_64;
+	gndbus[4] : RESERVE_PIN = "AS INPUT TRI-STATED";
+	gndbus[4] : IO_STANDARD = LVTTL;
+	misc_pins[0] : LOCATION = Pin_87;
+	misc_pins[0] : IO_STANDARD = LVTTL;
+	misc_pins[10] : LOCATION = Pin_76;
+	misc_pins[10] : IO_STANDARD = LVTTL;
+	misc_pins[11] : LOCATION = Pin_74;
+	misc_pins[11] : IO_STANDARD = LVTTL;
+	misc_pins[1] : LOCATION = Pin_86;
+	misc_pins[1] : IO_STANDARD = LVTTL;
+	misc_pins[2] : LOCATION = Pin_85;
+	misc_pins[2] : IO_STANDARD = LVTTL;
+	misc_pins[3] : LOCATION = Pin_84;
+	misc_pins[3] : IO_STANDARD = LVTTL;
+	misc_pins[4] : LOCATION = Pin_83;
+	misc_pins[4] : IO_STANDARD = LVTTL;
+	misc_pins[5] : LOCATION = Pin_82;
+	misc_pins[5] : IO_STANDARD = LVTTL;
+	misc_pins[6] : LOCATION = Pin_79;
+	misc_pins[6] : IO_STANDARD = LVTTL;
+	misc_pins[7] : LOCATION = Pin_78;
+	misc_pins[7] : IO_STANDARD = LVTTL;
+	misc_pins[8] : LOCATION = Pin_77;
+	misc_pins[8] : IO_STANDARD = LVTTL;
+	misc_pins[9] : LOCATION = Pin_75;
+	misc_pins[9] : IO_STANDARD = LVTTL;
+	reset : LOCATION = Pin_94;
+	usbclk : LOCATION = Pin_55;
+	usbctl[0] : LOCATION = Pin_56;
+	usbctl[1] : LOCATION = Pin_54;
+	usbctl[2] : LOCATION = Pin_53;
+	usbctl[3] : LOCATION = Pin_58;
+	usbctl[4] : LOCATION = Pin_57;
+	usbctl[5] : LOCATION = Pin_44;
+	usbdata[0] : LOCATION = Pin_73;
+	usbdata[10] : LOCATION = Pin_41;
+	usbdata[11] : LOCATION = Pin_39;
+	usbdata[12] : LOCATION = Pin_38;
+	usbdata[12] : IO_STANDARD = LVTTL;
+	usbdata[13] : LOCATION = Pin_37;
+	usbdata[14] : LOCATION = Pin_24;
+	usbdata[15] : LOCATION = Pin_23;
+	usbdata[1] : LOCATION = Pin_68;
+	usbdata[2] : LOCATION = Pin_67;
+	usbdata[3] : LOCATION = Pin_66;
+	usbdata[4] : LOCATION = Pin_65;
+	usbdata[5] : LOCATION = Pin_61;
+	usbdata[6] : LOCATION = Pin_60;
+	usbdata[7] : LOCATION = Pin_59;
+	usbdata[8] : LOCATION = Pin_43;
+	usbdata[9] : LOCATION = Pin_42;
+	usbrdy[0] : LOCATION = Pin_45;
+	usbrdy[1] : LOCATION = Pin_46;
+	usbrdy[2] : LOCATION = Pin_47;
+	usbrdy[3] : LOCATION = Pin_48;
+	usbrdy[4] : LOCATION = Pin_49;
+	usbrdy[5] : LOCATION = Pin_50;
+	clear_status : LOCATION = Pin_99;
+}