1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
entity inline_08 is
end entity inline_08;
----------------------------------------------------------------
architecture test of inline_08 is
begin
process_2_c : process is
-- code from book:
type opcodes is
(nop, add, subtract, load, store, jump, jumpsub, branch, halt);
subtype control_transfer_opcodes is opcodes range jump to branch;
-- end of code from book
variable opcode : opcodes;
variable operand : integer;
constant memory_operand : integer := 1;
constant address_operand : integer := 2;
begin
for i in opcodes loop
opcode := i;
-- code from book:
case opcode is
when load | add | subtract =>
operand := memory_operand;
when store | jump | jumpsub | branch =>
operand := address_operand;
when others =>
operand := 0;
end case;
--
case opcode is
when add to load =>
operand := memory_operand;
when branch downto store =>
operand := address_operand;
when others =>
operand := 0;
end case;
-- end of code from book
case opcode is
when add to load =>
operand := memory_operand;
-- code from book:
when control_transfer_opcodes | store =>
operand := address_operand;
-- end of code from book
when others =>
operand := 0;
end case;
end loop;
wait;
end process process_2_c;
end architecture test;
|
