1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc1655.vhd,v 1.2 2001-10-26 16:29:42 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
package c09s00b00x00p05n01i01655pkg is
procedure cpc (constant loc : string);
end c09s00b00x00p05n01i01655pkg;
package body c09s00b00x00p05n01i01655pkg is
procedure cpc (constant loc : string) is -- concurrent procedure
begin
assert false
report "Concurrent procedure called from " & loc
severity note ;
end cpc;
end c09s00b00x00p05n01i01655pkg;
use work.c09s00b00x00p05n01i01655pkg.all;
entity c09s00b00x00p05n01i01655ent_a is
port (signal pi : in bit;
signal po : out bit
);
begin
cas : assert false
report "Labeled concurrent assert called from component."
severity note ;
cpcc : cpc("component entity");
ppsc : -- passive process stmt
process (pi)
begin
assert false
report "Passive process can be labeled in component."
severity note ;
end process;
end c09s00b00x00p05n01i01655ent_a;
architecture c09s00b00x00p05n01i01655arch_a of c09s00b00x00p05n01i01655ent_a is
begin
cpc("component architecture");
end;
use work.c09s00b00x00p05n01i01655pkg.all, work.c09s00b00x00p05n01i01655ent_a;
ENTITY c09s00b00x00p05n01i01655ent IS
port (signal pi : in bit;
signal po : out bit
);
begin
cas : assert false
report "Labeled concurrent assert called from entity."
severity note ;
cpce : cpc("entity.");
ppse : -- passive process stmt
process (pi)
begin
assert false
report "Passive process can be labeled in entity."
severity note ;
end process;
END c09s00b00x00p05n01i01655ent;
ARCHITECTURE c09s00b00x00p05n01i01655arch OF c09s00b00x00p05n01i01655ent IS
signal lab_sig : boolean := true;
component comp
port (signal pi : in bit;
signal po : out bit
);
end component; -- comp
for lcia : comp use entity work.c09s00b00x00p05n01i01655ent_a(c09s00b00x00p05n01i01655arch_a)
port map (pi, po);
BEGIN
casa : assert false
report "Labeled concurrent assert called from architecture."
severity note ;
cpca : cpc("architecture.");
ppsa : process (pi)
begin
assert false
report "Passive process can be labeled in architecture."
severity note ;
end process;
lba: block
begin
cpcb : cpc("block.");
casb : assert false
report "Labeled concurrent assert called from labeled block."
severity note ;
end block lba;
csa : lab_sig <= false;
assert lab_sig
report "Labeled concurrent signal assignment executed in architecture."
severity note ;
lcia : comp
port map (pi => pi, po => po);
TESTING: PROCESS
BEGIN
assert FALSE
report "***PASSED TEST: c09s00b00x00p05n01i01655 - This test need manual check to the ASSERTION statement."
severity NOTE;
wait;
END PROCESS TESTING;
END c09s00b00x00p05n01i01655arch;
|
