ghdl/.git - VHDL 2008/93/87 simulator

Age	Commit message (Expand)	Author
2015-05-09	Rename Get_Location_Str to Image.	Tristan Gingold
2015-05-09	Report incorrect use of 'Base.	Tristan Gingold
2015-05-09	Avoid crash if name of subprogram also denotes a non-subprogram declaration.	Tristan Gingold
2015-03-31	Fix entity instantiation with extended identifier.	Tristan Gingold
2015-03-15	ortho_llvm: handle debug info for incomplete access type.	Tristan Gingold
2015-03-14	Disable overflow checks in Eval_Discrete_Range_Length.	Tristan Gingold
2015-03-14	procedure call: avoid crash with individual associations and signals.	Tristan Gingold
2015-03-01	Elaborate generics in two steps. Fix -c/-e for llvm builds.	Tristan Gingold
2015-01-30	grt: fix protected object lock during elaboration.	Tristan Gingold
2015-01-24	iirs.ads: fix indentation and adjust pnodes.py	Tristan Gingold
2015-01-24	Move Makefile from xtools to vhdl.	Tristan Gingold
2015-01-24	simulation: use invalid_instance_slot instead of 0.	Tristan Gingold
2015-01-24	Fix typos in grt and translation.adb for vhdl2008 (gcc).	Tristan Gingold
2015-01-23	Simulation: renaming.	Tristan Gingold
2015-01-23	simulation: rework scope_level.	Tristan Gingold
2015-01-23	Style fix.	Tristan Gingold
2015-01-22	Use 64 bits for universal integer type.	Tristan Gingold
2015-01-21	Detect and report UTF BOM at beginning of source files.	Tristan Gingold
2015-01-21	Translate: fix thinko for implicit conversion after conversion in assoc.	Tristan Gingold
2015-01-20	sem_names: extract Free_Old_Entity_Name (from Finish_Sem_Name). Add comments.	Tristan Gingold
2015-01-20	Minor rework of overflow in physical units: defer until execution.	Tristan Gingold
2015-01-18	Style fixes.	Tristan Gingold
2015-01-18	simulation: adjust for vhdl08 configurations.	Tristan Gingold
2015-01-18	execution: fix v87 concat with element.	Tristan Gingold
2015-01-17	simulation: handle v87 concatenation.	Tristan Gingold
2015-01-17	debugger: add list command.	Tristan Gingold
2015-01-17	ghdlsimul: adjust after use of name for block_specification.	Tristan Gingold
2015-01-16	Fix build of ghdl_simul (WIP).	Tristan Gingold
2015-01-16	Keep and handle simple name for Block_Specification.	Tristan Gingold
2015-01-16	disp_tree: add Max_Depth to limit recursion.	Tristan Gingold
2015-01-16	canon: fix after previous change (do not generate default config for for-gen)	Tristan Gingold
2015-01-15	PSL: add comments, scan endpoint.	Tristan Gingold
2015-01-15	Evaluation: implement array compare for discrete arrays.	Tristan Gingold
2015-01-15	Create the Sem_Qualified_Expression function.	Tristan Gingold
2015-01-15	parser: improve error message and recovery on = for default expression.	Tristan Gingold
2015-01-15	Evaluation: implement array comparaison (greater or less).	Tristan Gingold
2015-01-14	xrefs: adjust for vhdl08.	Tristan Gingold
2015-01-14	disp_vhdl: adjust for vhdl2008 (generate, bit string).	Tristan Gingold
2015-01-12	sem: fix Can_Collapse_Signals regression.	Tristan Gingold
2015-01-12	grt: improve --disp-signals-table output.	Tristan Gingold
2015-01-12	vhdl2008: expanded names in for-generate statements.	Tristan Gingold
2015-01-12	vhdl2008: handle expanded names in if-generate statements.	Tristan Gingold
2015-01-11	Fix ticket #29: add instance label in created symbols name.	Tristan Gingold
2015-01-10	Handle overflow during evaluation of type conversion. Forward on 'image.	Tristan Gingold
2015-01-10	vhdl08: forbid simple block_specification for labeled if-generate statement.	Tristan Gingold
2015-01-10	vhdl08: block configuration for if-generate statements.	Tristan Gingold
2015-01-08	Canon: do not free old concurrent statement.	Tristan Gingold
2015-01-07	Handle vhdl08 if generate statements	Tristan Gingold
2015-01-04	Rework for vhdl08 generate: change rtis.	Tristan Gingold
2015-01-03	Initial rework for vhdl 2008 generate statements.	Tristan Gingold