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VHDL 2008/93/87 simulator
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Author
2016-01-27
simul: use Tables instead of GNAT.Table
Tristan Gingold
2016-01-27
simul: handle declarations in configuration.
Tristan Gingold
2016-01-26
simul: fix attribute specification, noop type conversion, indiv sig assoc.
Tristan Gingold
2016-01-24
simul: handle default assignment to unconstrained ports.
Tristan Gingold
2016-01-24
simul: fix various issues.
Tristan Gingold
2016-01-19
simulate: fix handling of deferred constants.
Tristan Gingold
2015-12-21
cleanup in errorout.
Tristan Gingold
2015-12-19
Adjust simulation after sigptr changes.
Tristan Gingold
2015-12-03
ghdl_simul debugger: handle break on operator, handle end of file.
Tristan Gingold
2015-12-03
ghdl_simul debugger: add nstmt and fstmt.
Tristan Gingold
2015-11-30
ghdl_simul debugger: add auto-repeat.
Tristan Gingold
2015-11-30
ghdl_simul debugger: handle function call, consider entity declarations.
Tristan Gingold
2015-11-30
Fix ghdl_simul build.
Tristan Gingold
2015-06-02
Fix simulate backend.
Tristan Gingold
2015-01-24
simulation: use invalid_instance_slot instead of 0.
Tristan Gingold
2015-01-23
Simulation: renaming.
Tristan Gingold
2015-01-23
simulation: rework scope_level.
Tristan Gingold
2015-01-18
Style fixes.
Tristan Gingold
2015-01-18
simulation: adjust for vhdl08 configurations.
Tristan Gingold
2015-01-18
execution: fix v87 concat with element.
Tristan Gingold
2015-01-17
simulation: handle v87 concatenation.
Tristan Gingold
2015-01-17
debugger: add list command.
Tristan Gingold
2015-01-17
ghdlsimul: adjust after use of name for block_specification.
Tristan Gingold
2015-01-16
Fix build of ghdl_simul (WIP).
Tristan Gingold
2014-11-05
Move translate and simulate.
Tristan Gingold
