ghdl/.git - VHDL 2008/93/87 simulator

Age	Commit message (Expand)	Author
2015-05-26	Rework of overload resolution in implicit conversions.	Tristan Gingold
2015-05-23	Preliminary work to support external names (parse, semantic)	Tristan Gingold
2015-05-17	errors: remove error_msg and warning_msg.	Tristan Gingold
2015-05-16	Give priority to function calls without implicit conversion.	Tristan Gingold
2015-05-13	Change library format: now store file checksum instead of file time stamp.	Tristan Gingold
2015-05-12	Add context declaration and reference (vhdl 2008).	Tristan Gingold
2015-01-12	vhdl2008: expanded names in for-generate statements.	Tristan Gingold
2015-01-12	vhdl2008: handle expanded names in if-generate statements.	Tristan Gingold
2015-01-10	vhdl08: forbid simple block_specification for labeled if-generate statement.	Tristan Gingold
2015-01-03	Initial rework for vhdl 2008 generate statements.	Tristan Gingold
2014-12-30	vhdl 2008: handle sized bit strings.	Tristan Gingold
2014-12-29	Rework string literals: store literals position.	Tristan Gingold
2014-12-23	Fix ghdl -m for jit: handle multiple libraries.	Tristan Gingold
2014-12-22	Reduce size of library_declaration.	Tristan Gingold
2014-12-15	Use same node for implicit and explicit subprogram declarations.	Tristan Gingold
2014-12-14	reduce size of enumeration_literal.	Tristan Gingold
2014-12-14	iirs: reduce size of interface objects.	Tristan Gingold
2014-12-14	iirs: reduce size of signal_declaration.	Tristan Gingold
2014-12-14	iirs: reduce memory size.	Tristan Gingold
2014-12-14	Put attribute_value_chain in parent.	Tristan Gingold
2014-12-13	iirs: move delay_mechanism to flag1; adjust xtools/pnodes.py for new sources.	Tristan Gingold
2014-11-04	Create src/vhdl subdirectory.	Tristan Gingold