| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-12-16 | Recognize some ieee.std_logic_1164 functions. | Tristan Gingold |
| 2014-12-15 | Use same node for implicit and explicit subprogram declarations. | Tristan Gingold |
| 2014-12-14 | Reduce size of configuration declaration and guard signal declaration. | Tristan Gingold |
| 2014-12-14 | reduce size of enumeration_literal. | Tristan Gingold |
| 2014-12-14 | iirs: reduce size of interface objects. | Tristan Gingold |
| 2014-12-14 | iirs: reduce size of signal_declaration. | Tristan Gingold |
| 2014-12-14 | iirs: reduce memory size. | Tristan Gingold |
| 2014-12-14 | Put attribute_value_chain in parent. | Tristan Gingold |
| 2014-12-13 | iirs: move delay_mechanism to flag1; adjust xtools/pnodes.py for new sources. | Tristan Gingold |
| 2014-11-04 | Create src/vhdl subdirectory. | Tristan Gingold |
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index : ghdl/.git | |
| VHDL 2008/93/87 simulator |
| summaryrefslogtreecommitdiff |