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VHDL 2008/93/87 simulator
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2016-01-24
simul: fix various issues.
Tristan Gingold
2016-01-16
Add support for conditional assignments.
Tristan Gingold
2015-11-30
ghdl_simul debugger: handle function call, consider entity declarations.
Tristan Gingold
2015-09-08
canon: do not optimize concurrent procedure calls if not whole_analyze.
Tristan Gingold
2015-05-12
Add context declaration and reference (vhdl 2008).
Tristan Gingold
2015-01-16
Keep and handle simple name for Block_Specification.
Tristan Gingold
2015-01-16
canon: fix after previous change (do not generate default config for for-gen)
Tristan Gingold
2015-01-10
vhdl08: block configuration for if-generate statements.
Tristan Gingold
2015-01-08
Canon: do not free old concurrent statement.
Tristan Gingold
2015-01-07
Handle vhdl08 if generate statements
Tristan Gingold
2015-01-03
Initial rework for vhdl 2008 generate statements.
Tristan Gingold
2014-12-15
Use same node for implicit and explicit subprogram declarations.
Tristan Gingold
2014-12-14
iirs: reduce size of signal_declaration.
Tristan Gingold
2014-12-14
Put attribute_value_chain in parent.
Tristan Gingold
2014-11-04
Create src/vhdl subdirectory.
Tristan Gingold