Age | Commit message (Expand) | Author |
---|---|---|
2014-09-25 | Add a python script to automatically generate disp_tree. | Tristan Gingold |
2014-09-02 | Keep names in the tree. | Tristan Gingold |
2014-06-28 | Resolve expression in variable assignment when target is an aggregate. | Tristan Gingold |
2014-06-24 | Use library unit instead of design unit. | Tristan Gingold |
2013-12-17 | Sync tree: add parsing of AMS-VHDL, add Darwin syntax in asm files. | Tristan Gingold |
2010-01-12 | ghdl 0.29 release. | gingold |
2008-09-06 | New feature: all-sensitized processes (for vhdl 2008) | gingold |
2006-10-02 | direct drivers and bugs fix | gingold |
2005-09-24 | First import from sources | gingold |