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-rw-r--r--src/vhdl/translate/trans-chap7.adb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb
index 6c0ec50..db6eafc 100644
--- a/src/vhdl/translate/trans-chap7.adb
+++ b/src/vhdl/translate/trans-chap7.adb
@@ -1564,7 +1564,7 @@ package body Trans.Chap7 is
end if;
-- For a non-null bounds result.
- if Flags.Vhdl_Std > Vhdl_87 then
+ if Flags.Vhdl_Std > Vhdl_87 or Flag_Relaxed_Rules then
-- Vhdl 93 case: lean and simple.
Chap3.Create_Range_From_Length
(Index_Type, Var_Length, Get_Res_Range, Left);