diff options
-rw-r--r-- | testsuite/gna/bug24326/repro1.vhdl | 7 | ||||
-rw-r--r-- | testsuite/gna/bug24326/tb_thingy7.vhdl | 27 | ||||
-rw-r--r-- | testsuite/gna/bug24326/tb_thingy9.vhdl | 27 | ||||
-rwxr-xr-x | testsuite/gna/bug24326/testsuite.sh | 11 |
4 files changed, 72 insertions, 0 deletions
diff --git a/testsuite/gna/bug24326/repro1.vhdl b/testsuite/gna/bug24326/repro1.vhdl new file mode 100644 index 0000000..624a7a7 --- /dev/null +++ b/testsuite/gna/bug24326/repro1.vhdl @@ -0,0 +1,7 @@ +entity repro1 is +end; + +architecture behav of repro1 is + constant c : natural := 5 % 4; +begin +end; diff --git a/testsuite/gna/bug24326/tb_thingy7.vhdl b/testsuite/gna/bug24326/tb_thingy7.vhdl new file mode 100644 index 0000000..6df4205 --- /dev/null +++ b/testsuite/gna/bug24326/tb_thingy7.vhdl @@ -0,0 +1,27 @@ +entity tb_thingy is +end tb_thingy; + +architecture tb of tb_thingy is + component thingy is + generic ( + a_a : integer + ); + port ( + x_x : in bit; + y_y : out bit + ); + end component; + signal stimuli : bit; + signal response : bit; +begin + + dut : thingy + generic map ( + a_a => 42 + ) + port map ( + x%x => stimuli, -- <== + y_y => response + ); + +end tb; diff --git a/testsuite/gna/bug24326/tb_thingy9.vhdl b/testsuite/gna/bug24326/tb_thingy9.vhdl new file mode 100644 index 0000000..493b20d --- /dev/null +++ b/testsuite/gna/bug24326/tb_thingy9.vhdl @@ -0,0 +1,27 @@ +entity tb_thingy is +end tb_thingy; + +architecture tb of tb_thingy is + component thingy is + generic ( + a_a : integer + ); + port ( + x%x : in bit; -- <== + y_y : out bit + ); + end component; + signal stimuli : bit; + signal response : bit; +begin + + dut : thingy + generic map ( + a_a => 42 + ) + port map ( + x_x => stimuli, + y_y => response + ); + +end tb; diff --git a/testsuite/gna/bug24326/testsuite.sh b/testsuite/gna/bug24326/testsuite.sh new file mode 100755 index 0000000..a30c5a0 --- /dev/null +++ b/testsuite/gna/bug24326/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure tb_thingy7.vhdl +analyze_failure tb_thingy9.vhdl +analyze_failure repro1.vhdl + +clean + +echo "Test successful" |