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author | Tristan Gingold | 2013-12-20 04:48:54 +0100 |
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committer | Tristan Gingold | 2013-12-20 04:48:54 +0100 |
commit | 6c3f709174e8e4d5411f851cedb7d84c38d3b04a (patch) | |
tree | bd12c79c71a2ee65899a9ade9919ec2045addef8 /testsuite/vests/vhdl-ams/ashenden/compliant/util/src_sine.vhd | |
parent | bd4aff0f670351c0652cf24e9b04361dc0e3a01c (diff) | |
download | ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.gz ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.bz2 ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.zip |
Import vests testsuite
Diffstat (limited to 'testsuite/vests/vhdl-ams/ashenden/compliant/util/src_sine.vhd')
-rw-r--r-- | testsuite/vests/vhdl-ams/ashenden/compliant/util/src_sine.vhd | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-ams/ashenden/compliant/util/src_sine.vhd b/testsuite/vests/vhdl-ams/ashenden/compliant/util/src_sine.vhd new file mode 100644 index 0000000..f5b82c8 --- /dev/null +++ b/testsuite/vests/vhdl-ams/ashenden/compliant/util/src_sine.vhd @@ -0,0 +1,56 @@ + +-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc + +-- This file is part of VESTs (Vhdl tESTs). + +-- VESTs is free software; you can redistribute it and/or modify it +-- under the terms of the GNU General Public License as published by the +-- Free Software Foundation; either version 2 of the License, or (at +-- your option) any later version. + +-- VESTs is distributed in the hope that it will be useful, but WITHOUT +-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +library IEEE; use IEEE.MATH_REAL.all; +library IEEE_proposed; use IEEE_proposed.ELECTRICAL_SYSTEMS.all; + +entity src_sine is + + generic ( freq : real; -- frequency [Hertz] + amplitude : voltage; -- amplitude [Volts] + phase : real := 0.0; -- initial phase [Degrees] + offset : voltage := 0.0; -- DC value [Volts] + df : real := 0.0; -- damping factor [1/second] + ac_mag : voltage := 1.0; -- AC magnitude [Volts] + ac_phase : real := 0.0); -- AC phase [Degrees] + + port ( quantity output : out real ); + +end entity src_sine; + + +architecture ideal of src_sine is + + -- Declare quantity for phase in radians (calculated below) + quantity phase_rad : real; + -- Declare quantity in frequency domain for AC analysis + quantity ac_spec : real spectrum ac_mag, math_2_pi * ac_phase / 360.0; + +begin + + -- Convert phase to radians + phase_rad == math_2_pi *(freq * now + phase / 360.0); + + if domain = quiescent_domain or domain = time_domain use + output == offset + amplitude * sin(phase_rad) * exp(-now * df); + else + output == ac_spec; -- used for Frequency (AC) analysis + end use; + +end architecture ideal; |