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authorTristan Gingold2013-12-20 04:48:54 +0100
committerTristan Gingold2013-12-20 04:48:54 +0100
commit6c3f709174e8e4d5411f851cedb7d84c38d3b04a (patch)
treebd12c79c71a2ee65899a9ade9919ec2045addef8 /testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute
parentbd4aff0f670351c0652cf24e9b04361dc0e3a01c (diff)
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Import vests testsuite
Diffstat (limited to 'testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute')
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/across.ams72
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/step_limit.ams65
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/through.ams72
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_contribution.ams72
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_left.ams80
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_reference.ams67
6 files changed, 428 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/across.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/across.ams
new file mode 100644
index 0000000..be1ba84
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/across.ams
@@ -0,0 +1,72 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: across.ams,v 1.2 2003-08-05 15:14:24 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH Ground reference;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalsystem.all;
+
+--entity declaration
+
+ENTITY RLC IS
+
+END RLC;
+
+--architecture declaration
+
+ARCHITECTURE behavior OF RLC IS
+
+ terminal n1,n2: electrical;
+ constant r1 : real := 10.0;
+ constant r2 : real := 20.0;
+ constant r3 : real := 20.0;
+ quantity vr1 across ir1 through n1 to n2;
+ quantity vr2 across ir2 through Ground;
+ quantity vr3 across ir3 through n2;
+ quantity vs across n1 to ground;
+ quantity contrib: electrical'across;
+BEGIN
+
+v1: vr1 == ir1 *r1;
+v2: vr2 == ir2 *r2;
+v3: vr3 == ir3 *r3;
+fr: contrib == n1'contribution;
+vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source
+ * real(time'pos(now)) * 1.0e-9);
+
+END architecture behavior;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/step_limit.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/step_limit.ams
new file mode 100644
index 0000000..71f416e
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/step_limit.ams
@@ -0,0 +1,65 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: step_limit.ams,v 1.2 2003-08-05 15:14:24 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH Ground reference;
+ FUNCTION SIN (X : real ) RETURN real;
+ FUNCTION COS (X : real ) RETURN real;
+ FUNCTION EXP (X : real ) RETURN real;
+END PACKAGE electricalSystem;
+
+USE work.electricalSystem.all;
+
+--entity declaration
+ENTITY hwr IS
+END hwr;
+
+--architecture declaration
+ARCHITECTURE behavior OF hwr IS
+
+ terminal t1, t2 : electrical;
+ constant step : real := 5.0e12;
+ quantity v2 across i2 through t1 ;
+ quantity vs across t1 ;
+ limit vs:real with step/1000.0;
+ quantity vikram:real;
+ limit v2,vs:real with 2.0e9;
+BEGIN -- behavior
+
+ eqn1: v2 == 100.0 * i2;
+
+ --voltage source equation
+ eqn2: vs == 5.0 * sin(2.0 * 3.14 * 100000.0 *
+ real(time'pos(now)) * 1.0e-12 );
+
+END behavior ;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/through.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/through.ams
new file mode 100644
index 0000000..305b7da
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/through.ams
@@ -0,0 +1,72 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: through.ams,v 1.2 2003-08-05 15:14:24 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH Ground reference;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalsystem.all;
+
+--entity declaration
+
+ENTITY RLC IS
+
+END RLC;
+
+--architecture declaration
+
+ARCHITECTURE behavior OF RLC IS
+
+ terminal n1,n2: electrical;
+ constant r1 : real := 10.0;
+ constant r2 : real := 20.0;
+ constant r3 : real := 20.0;
+ quantity vr1 across ir1 through n1 to n2;
+ quantity vr2 across ir2 through ground;
+ quantity vr3 across ir3 through n2;
+ quantity vs across n1 to ground;
+ quantity contrib: electrical'through;
+BEGIN
+
+v1: vr1 == ir1 *r1;
+v2: vr2 == ir2 *r2;
+v3: vr3 == ir3 *r3;
+fr: contrib == n1'reference;
+vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source
+ * real(time'pos(now)) * 1.0e-9);
+
+END architecture behavior;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_contribution.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_contribution.ams
new file mode 100644
index 0000000..b82427e
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_contribution.ams
@@ -0,0 +1,72 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: tick_contribution.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH Ground reference;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalsystem.all;
+
+--entity declaration
+
+ENTITY RLC IS
+
+END RLC;
+
+--architecture declaration
+
+ARCHITECTURE behavior OF RLC IS
+
+ terminal n1,n2: electrical;
+ constant r1 : real := 10.0;
+ constant r2 : real := 20.0;
+ constant r3 : real := 20.0;
+ quantity vr1 across ir1 through n1 to n2;
+ quantity vr2 across ir2 through n2;
+ quantity vr3 across ir3 through n2;
+ quantity vs across n1;
+ quantity contrib:real;
+BEGIN
+
+v1: vr1 == ir1 *r1;
+v2: vr2 == ir2 *r2;
+v3: vr3 == ir3 *r3;
+fr: contrib == n2'contribution;
+vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source
+ * real(time'pos(now)) * 1.0e-9);
+
+END architecture behavior;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_left.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_left.ams
new file mode 100644
index 0000000..bb2cf7d
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_left.ams
@@ -0,0 +1,80 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: tick_left.ams,v 1.2 2003-08-05 15:14:24 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+-- A simple RC circuit but both R & C are in between array terminals.
+-- trying to use 'left, 'right, 'low, 'high attributes.
+
+PACKAGE electricalSystem IS
+ subtype voltage is real ;
+ subtype current is real ;
+
+ NATURE electrical IS real ACROSS real THROUGH ground REFERENCE;
+ NATURE electrical_vector is array(natural range<>) of electrical ;
+ subnature el_vect4 is electrical_vector(1 to 2);
+
+ FUNCTION SIN(X : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalsystem.all;
+
+--entity declaration
+
+ENTITY RLC IS
+
+END RLC;
+
+--architecture declaration
+
+ARCHITECTURE behavior OF RLC IS
+
+
+ terminal n1: electrical;
+ terminal n2: el_vect4;
+
+ quantity vr1 across ir1 through n1 to n2;
+ quantity vr2 across ir2 through n2 to Ground;
+ quantity vs across n1 ;
+ constant r1 : REAL := 1000.0;
+ constant cap : REAL := 100.0e-9;
+
+BEGIN
+
+res11 : vr1(n2'left) == ir1(n2'left) * r1;
+res12 : vr1(el_vect4'right) == ir1(el_vect4'right) * r1;
+cap11 : ir2(el_vect4'low) == vr2(1)'dot * cap;
+cap12 : ir2(el_vect4'high) == cap * vr2(2)'dot;
+
+vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 15.0 --sine source
+ * real(time'pos(now)) * 1.0e-13);
+
+END architecture behavior;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_reference.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_reference.ams
new file mode 100644
index 0000000..563dddd
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/attribute/tick_reference.ams
@@ -0,0 +1,67 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: tick_reference.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH Ground reference;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalsystem.all;
+
+--entity declaration
+
+ENTITY RLC IS
+
+END RLC;
+
+--architecture declaration
+
+ARCHITECTURE behavior OF RLC IS
+
+ terminal n1,n2: electrical;
+ constant r1 : real := 10.0;
+ constant r2 : real := 20.0;
+ quantity ir1 through n1 to n2;
+ quantity vr2 across ir2 through n2;
+ quantity vs across n1;
+BEGIN
+
+i1 : ir1 == (n1'reference - n2'reference)/ r1 ;
+v1 : vr2 == ir2*r2;
+vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source
+ * real(time'pos(now)) * 1.0e-9);
+
+END architecture behavior;