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author | Tristan Gingold | 2013-12-20 04:48:54 +0100 |
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committer | Tristan Gingold | 2013-12-20 04:48:54 +0100 |
commit | 6c3f709174e8e4d5411f851cedb7d84c38d3b04a (patch) | |
tree | bd12c79c71a2ee65899a9ade9919ec2045addef8 /testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements | |
parent | bd4aff0f670351c0652cf24e9b04361dc0e3a01c (diff) | |
download | ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.gz ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.bz2 ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.zip |
Import vests testsuite
Diffstat (limited to 'testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements')
7 files changed, 165 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/block-statements/simple-grouping-block.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/block-statements/simple-grouping-block.vhdl new file mode 100644 index 0000000..c10bd22 --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/block-statements/simple-grouping-block.vhdl @@ -0,0 +1,26 @@ +entity test is +end test; + +architecture only of test is + signal delay_line_in : bit := '0'; + signal delay_line_out : bit := '0'; +begin -- only + delay: block + begin -- block delay + delay_line_out <= delay_line_in after 1 ns; + end block delay; + + start: process + begin -- process + delay_line_in <= '1'; + wait; + end process; + + check: process( delay_line_out ) + begin + if delay_line_out = '1' then + assert now = 1 ns report "TEST FAILED - delay did not happen as expected!" severity FAILURE; + assert not(now = 1 ns) report "TEST PASSED" severity FAILURE; + end if; + end process; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_package_procedure_for_loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_package_procedure_for_loop.vhdl new file mode 100644 index 0000000..48d810f --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_package_procedure_for_loop.vhdl @@ -0,0 +1,30 @@ +package pkg is + procedure iterate ( + input : in bit_vector); +end pkg; + +package body pkg is + procedure iterate ( + input : in bit_vector) is + variable j : integer := input'range'left; + begin -- iterate + for i in input'range loop + assert i = j report "TEST FAILED" severity failure; + j := j + 1; + end loop; -- i in 1 to 10 + assert j = input'range'right + 1 report "TEST FAILED" severity failure; + end iterate; +end pkg; + +entity test is +end test; + +architecture only of test is +begin -- only + doit: process + begin -- process doit + work.pkg.iterate("0000"); + report "TEST PASSED"; + wait; + end process doit; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_procedure_for_loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_procedure_for_loop.vhdl new file mode 100644 index 0000000..0ce8eda --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/dynamic_procedure_for_loop.vhdl @@ -0,0 +1,22 @@ +entity test is +end test; + +architecture only of test is + procedure iterate ( + input : in bit_vector) is + variable j : integer := input'range'left; + begin -- iterate + for i in input'range loop + assert i = j report "TEST FAILED" severity failure; + j := j + 1; + end loop; -- i in 1 to 10 + assert j = input'range'right + 1 report "TEST FAILED" severity failure; + end iterate; +begin -- only + doit: process + begin -- process doit + iterate("0000"); + report "TEST PASSED"; + wait; + end process doit; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop-constrained.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop-constrained.vhdl new file mode 100644 index 0000000..647642e --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop-constrained.vhdl @@ -0,0 +1,17 @@ +entity test is +end test; + +architecture only of test is +begin -- only +p: process + type color is ( red, blue, green ); + variable x : color; +begin -- process p + for i in red to blue loop + x := i; + end loop; -- i + assert x = blue report "TEST FAILED x was " & color'image(x) severity ERROR; + report "TEST PASSED" severity NOTE; + wait; +end process p; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop.vhdl new file mode 100644 index 0000000..2330e18 --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/enumeration-for-loop.vhdl @@ -0,0 +1,17 @@ +entity test is +end test; + +architecture only of test is +begin -- only +p: process + type color is ( red, blue, green ); + variable x : color; +begin -- process p + for i in red to green loop + x := i; + end loop; -- i + assert x = green report "TEST FAILED x was " & color'image(x) severity ERROR; + report "TEST PASSED" severity NOTE; + wait; +end process p; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/integer-for-loop.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/integer-for-loop.vhdl new file mode 100644 index 0000000..1a7db2f --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/for-loops/integer-for-loop.vhdl @@ -0,0 +1,16 @@ +entity test is +end test; + +architecture only of test is +begin -- only +p: process + variable x : integer; +begin -- process p + for i in 1 to 10 loop + x := i; + end loop; -- i + assert x = 10 report "TEST FAILED x was " & integer'image(x) severity ERROR; + report "TEST PASSED" severity NOTE; + wait; +end process p; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/if-statements/simple-if-statement.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/if-statements/simple-if-statement.vhdl new file mode 100644 index 0000000..d84b85f --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/statements/if-statements/simple-if-statement.vhdl @@ -0,0 +1,37 @@ +entity test is +end test; + +architecture only of test is + +begin -- only + doit: process + variable one, two, three : boolean := false; + begin -- process doit + if true then + one := true; + else + + end if; + + if false then + one := false; + else + two := true; + end if; + + if false then + one := false; + elsif true then + three := true; + else + two := false; + end if; + + assert one report "TEST FAILED - first if test failed" severity failure; + assert two report "TEST FAILED - second if test failed" severity failure; + assert three report "TEST FAILED - third if test failed" severity failure; + report "TEST PASSED" severity note; + + wait; + end process doit; +end only; |