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author | Tristan Gingold | 2013-12-20 04:48:54 +0100 |
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committer | Tristan Gingold | 2013-12-20 04:48:54 +0100 |
commit | 6c3f709174e8e4d5411f851cedb7d84c38d3b04a (patch) | |
tree | bd12c79c71a2ee65899a9ade9919ec2045addef8 /testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions | |
parent | bd4aff0f670351c0652cf24e9b04361dc0e3a01c (diff) | |
download | ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.gz ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.bz2 ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.zip |
Import vests testsuite
Diffstat (limited to 'testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions')
5 files changed, 118 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/integer-type-overload.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/integer-type-overload.vhdl new file mode 100644 index 0000000..3809b2d --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/integer-type-overload.vhdl @@ -0,0 +1,28 @@ +entity test is +end test; + +architecture only of test is + type integer_t1 is range 0 to 2; + type integer_t2 is range 2 to 4; + function test_function ( constant param : integer_t1 ) + return boolean is + begin + return true; + end function; + + function test_function ( constant param : integer_t2 ) + return boolean is + begin + return true; + end function; +begin -- only + test: process + variable result : boolean; + variable param1 : integer_t1 := 3; + variable param2 : integer_t2 := 5; + begin -- process + result := test_function( param1 ); + result := test_function( param2 ); + wait; + end process; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-out-parameter.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-out-parameter.vhdl new file mode 100644 index 0000000..7131e45 --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-out-parameter.vhdl @@ -0,0 +1,18 @@ +entity test is +end test; + +architecture only of test is + procedure out_param ( one : out integer ) is + begin + one := 1; + end out_param; +begin -- only + doit: process + variable one : integer := 0; + begin -- process doit + out_param( one ); + assert one = 1 report "TEST FAILED" severity failure; + report "TEST PASSED"; + wait; + end process doit; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-procedure-call.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-procedure-call.vhdl new file mode 100644 index 0000000..16068cd --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-procedure-call.vhdl @@ -0,0 +1,16 @@ +entity test is +end test; + +architecture only of test is + procedure doit is + begin + report "PROCEDURE CALLED!"; + end procedure; +begin -- only + process + begin -- process doit + doit; + report "TEST PASSED"; + wait; + end process; +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-resolution-function.vhd b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-resolution-function.vhd new file mode 100644 index 0000000..249b1dc --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/simple-resolution-function.vhd @@ -0,0 +1,38 @@ +entity test is +end test; + +architecture only of test is + -- forward declaration of the function. + function wired_or( s : bit_vector ) return bit; + -- declare the subtype. + subtype rbit is wired_or bit; + + -- declare the actual function. + function wired_or( s : bit_vector ) return bit is + begin + report "resolution function called!" severity note; + if ( (s(0) = '1') or (s(1) = '1')) then + return '1'; + end if; + return '0'; + end wired_or; + + -- declare a signal of that type. a resolved signal. + signal s : rbit; + +begin + + -- a concurrent signal assignment. driver # 1. + s <= '1'; + + testing: process + begin + -- verify that resolution function getting called. + s <= '1' after 10 ns; + wait on s; + assert ( s = '1' ) report "TEST FAILED" severity failure; + report "TEST PASSED"; + wait; + end process testing; + +end only; diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/unconstrained_parameter.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/unconstrained_parameter.vhdl new file mode 100644 index 0000000..38a9f9a --- /dev/null +++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/functions/unconstrained_parameter.vhdl @@ -0,0 +1,18 @@ +entity test is +end test; + +architecture only of test is +begin -- onlty + doit: process + function returns_last( p : bit_vector ) + return bit is + begin + return p( p'length - 1 ); + end function; + begin -- process doit + assert returns_last( "00" ) = '0' report "TEST FAILED" severity failure; + assert returns_last( "11" ) = '1' report "TEST FAILED" severity failure; + report "TEST PASSED"; + wait; + end process doit; +end only; |