summaryrefslogtreecommitdiff
path: root/testsuite/gna/bug04/std_logic_warning.vhdl
diff options
context:
space:
mode:
authorTristan Gingold2015-01-20 15:21:35 +0100
committerTristan Gingold2015-01-20 15:21:35 +0100
commit4b6f841fcd09ce8f0a80e87d4031d9417c0eabb5 (patch)
treedd64dfc80757b1bfa334ed09b2fef263d3b6b002 /testsuite/gna/bug04/std_logic_warning.vhdl
parent68379e7e41aa07de23978535e1f1dc82986e0bfc (diff)
downloadghdl-4b6f841fcd09ce8f0a80e87d4031d9417c0eabb5.tar.gz
ghdl-4b6f841fcd09ce8f0a80e87d4031d9417c0eabb5.tar.bz2
ghdl-4b6f841fcd09ce8f0a80e87d4031d9417c0eabb5.zip
Add bug04 testcase.
Diffstat (limited to 'testsuite/gna/bug04/std_logic_warning.vhdl')
-rw-r--r--testsuite/gna/bug04/std_logic_warning.vhdl64
1 files changed, 64 insertions, 0 deletions
diff --git a/testsuite/gna/bug04/std_logic_warning.vhdl b/testsuite/gna/bug04/std_logic_warning.vhdl
new file mode 100644
index 0000000..a71b2dd
--- /dev/null
+++ b/testsuite/gna/bug04/std_logic_warning.vhdl
@@ -0,0 +1,64 @@
+library ieee;
+use ieee.std_logic_1164.std_logic;
+use ieee.std_logic_1164.to_x01;
+use ieee.std_logic_1164.is_x;
+
+package std_logic_warning is
+ function "="(l, r : std_logic) return boolean;
+end package;
+
+package body std_logic_warning is
+
+ use ieee.std_logic_1164."=";
+
+ function "="(l, r : std_logic) return boolean is
+ begin
+ if is_x(l) or is_x(r) then
+ report "std_logic_warning.""="": metavalue detected, returning FALSE"
+ severity WARNING;
+ return FALSE;
+ end if;
+ return l = r; -- std_logic_1164."="(l, r);
+ end function;
+
+end package body;
+
+library ieee;
+use ieee.std_logic_1164.std_ulogic;
+use ieee.std_logic_1164.std_logic;
+-- use ieee.std_logic_1164.all;
+
+use work.std_logic_warning.all;
+entity warning_test is
+end entity;
+
+architecture foo of warning_test is
+ signal a: std_logic;
+ signal b: std_logic;
+begin
+
+UNLABELLED:
+ process
+ begin
+ wait for 1 ns;
+ a <= 'X';
+ wait for 1 ns;
+ b <= '1';
+ wait for 1 ns;
+ a <= '0';
+ wait for 1 ns;
+ b <= '0';
+ wait;
+ end process;
+
+MONITOR:
+ process (a,b)
+ begin
+ assert a = b
+ report "a = b " & "( " & std_logic'image(a)
+ & "=" & std_logic'image(b) & " )"
+ severity NOTE;
+ end process;
+
+end architecture;
+