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author | Tristan Gingold | 2015-08-29 08:01:46 +0200 |
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committer | Tristan Gingold | 2015-08-29 08:01:46 +0200 |
commit | b461845ffeb94e902d84c058238fcfcd4074f1a6 (patch) | |
tree | 5a2bcc7733b32a649cfe8661f872f50051179657 /testsuite/gna/bug011/phonybench.vhdl | |
parent | b75d703676ab830ea3e5731e1965d1d89879a456 (diff) | |
download | ghdl-b461845ffeb94e902d84c058238fcfcd4074f1a6.tar.gz ghdl-b461845ffeb94e902d84c058238fcfcd4074f1a6.tar.bz2 ghdl-b461845ffeb94e902d84c058238fcfcd4074f1a6.zip |
Rename gnat/bug directories for non-gna bugs to avoid confusion.
Diffstat (limited to 'testsuite/gna/bug011/phonybench.vhdl')
-rw-r--r-- | testsuite/gna/bug011/phonybench.vhdl | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/testsuite/gna/bug011/phonybench.vhdl b/testsuite/gna/bug011/phonybench.vhdl new file mode 100644 index 0000000..0409804 --- /dev/null +++ b/testsuite/gna/bug011/phonybench.vhdl @@ -0,0 +1,59 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity phonybench is + generic ( + GENSTR : string := "adrien"; + GENSTDLV : std_logic_vector(5 downto 0) := "111000"; + GENSTDL : std_logic := '1'; + GENNAT : natural := 22 + ); +end phonybench; + +architecture bench of phonybench is + + type char2std_t is array(character) of std_ulogic; + + constant char2std_c : char2std_t := ( + 'U' => 'U', + 'X' => 'X', + '0' => '0', + '1' => '1', + 'Z' => 'Z', + 'W' => 'W', + 'L' => 'L', + 'H' => 'H', + '-' => '-', + others => 'X' + ); + + function str2std(arg : string) return std_logic_vector is + variable result : std_logic_vector(arg'length - 1 downto 0); + variable j : integer; + begin + j := arg'length - 1; + for i in arg'range loop + result(j) := char2std_c(arg(i)); + j := j - 1; + end loop; + return result; + end function; + + signal sigvec1 : std_logic_vector(5 downto 0) := str2std(GENSTR); + signal sigvec2 : std_logic_vector(5 downto 0) := GENSTDLV; + signal siglog : std_logic := GENSTDL; + signal signat : natural := GENNAT; + + signal clk : std_logic := '0'; + +begin + + clk <= not clk after 5 ms; + + sigvec1 <= str2std(GENSTR); + sigvec2 <= GENSTDLV; + siglog <= GENSTDL; + signat <= GENNAT; + +end architecture; |